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|Effect of preformed IMC Layer on Electromigration of Solder Capped Cu Pillar Bump Interconnection on an organic substrate|
|Keywords: electromigration, cu pillar, organic substrate|
|The electromigration (EM) behavior of 80μm pitch C2 (Chip Connection) interconnection is studied and discussed. C2 is a low cost, peripheral ultra fine pitch flip chip interconnection technology using the solder capped Cu pillar bumps. The Cu pillar bumps are formed on Al pads that are commonly used in the wirebonding (WB) technique. It thus makes utmost use of the already existing infrastructure. Because C2 bumps are connected to OSP surface treated Cu pads on an organic substrate by reflow with no-clean process, it has a high throughput and is SMT (Surface Mount Technology) compatible. Since the space between dies and substrates is determined by the Cu pillar height, the collapse control of the solder bump is not required. Also, the pre-solder on substrates is also not required. It is an ideal technology for the systems requiring fine pitch structures. In 2011, the EM tests were performed on 80μm pitch C2 flip chip interconnection and the effects of Ni barrier layers on the Cu pillars and the pre-formed intermetallic compound (IMC) layers on the EM tests were studied. The EM test conditions of the test vehicles were 7-10 kA/cm2 at 125-170°C. The Cu pillar height is 45μm and the solder height is 25μm. The solder composition is Sn-2.5Ag. Aged condition for pre-formed IMCs was 2,000 hrs at 150°C. The results suggest that the formation of the pre-formed IMC layers and the insertion of Ni barrier layers are effective in preventing the Cu atoms from dissociating into the solder. In this report, it is studied that either Cu3Sn or Cu6Sn5 IMC is effective to prevent the Cu atoms from dissociating into the solder. And the relation between the thickness of Cu3Sn IMC layer and the Cu migration is also studied. The anti-EM effect of the preformed IMC layer is deeply discussed.|
|Yasumitsu Orii, Manager & STSM
IBM Research Tokyo