Here is the abstract you requested from the nano_2012 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|Development of Through Glass Via (TGV) Substrates for 3D-IC Integration|
|Keywords: Glass, Via, Substrate|
|Through-substrate vias are critical for 3D-IC integration. The choice of glass as an interposer substrate, TGV, present some interesting challenges and opportunities, making glass a compelling alternative to silicon. There are two primary challenges to begin building a precision interposer in thin glass. The first is high quality thin glass wafers (300 mm OD, thickness < 0.10 mm, warp and TTV of 30 µm and 1 µm respectively). The second challenge is developing a process capable of providing small precision holes in a cost-effective way. Glass represents a large class of materials with a wide range of material properties. The first step in developing TGV is to identify the most appropriate glass composition for the application, which furthermore defines important properties such as coefficient of thermal expansion (CTE) and other mechanical properties, chemical durability and electrical properties. The manufacturing process used to develop the glass has a significant impact on quality and manufacturability. Fusion formed glass provides a solution for high volume manufacturing supply in an as-formed, ultra-thin, pristine glass manufactured to tight tolerances, and avoids the issues associated with polishing or thinning. The supply of < 100 µm as-formed ultra-thin glass wafers can compare very favorably in cost relative to polished or thinned glass as well as thinned silicon wafers. Substantial progress has been made to meet the challenges of providing small (< 30 um) holes in glass. Specific characterization data from some of these processes will be presented.|
|Aric Shorey, Sr. Technical Manager