Micross

Abstract Preview

Here is the abstract you requested from the HiTEN_2013 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.

Enhanced High Temperature Performance of PD-SOI MOSFET in Analog Circuits Using Reverse Body Biasing
Keywords: PD-SOI, Reverse body biasing, Intrinsic gain
Analog circuit design realised in a PD-SOI (Partially-Depleted Silicon on Insulator) CMOS process for a wide temperature range up to 400°C is significantly affected by the MOSFET device characteristics at high temperatures. As leakage currents increase with temperature, the intrinsic device performance, i.e. intrinsic gain and bandwidth tend to decrease. Both effects influence the precision of analog circuits and lead to malfunction of the circuitry at high temperatures. Enhancement of the MOSFET device performance and improved design techniques are required to handle these issues. In this paper we show that reverse body biasing (RBB) is a useful method to improve the analog performance of PD-SOI transistors and also to push the limit of analog circuit design in SOI technology beyond 300°C. It allows beneficial FD (fully depleted) device characteristics in a 1.0 µm PD-SOI CMOS process by manipulating the depletion condition of the silicon film. Due to reduced leakage currents, operation in the lower moderate inversion region of the SOI transistor device up to 400°C is feasible. The method is verified by experimental results of HGATE transistors, an analog transmission gate and a basic current mirror. The normalised leakage current Id/(W/L) of NHGATE and PHGATE devices can be reduced by more than one order of magnitude to 20nA at 400°C. Thus the gm/Id factor is improved significantly. The intrinsic gain of the HGATE is increased by 20dB at 350°C and 10dB at 400°C. The leakage current of the analog switch is reduced by one order of magnitude. The error of a basic current mirror is decreased from 67% to 1% at 350°C and from 900% to 6% at 400°C. In conclusion the presented results show the relevance of RBB for analog circuit design at high temperatures. A reverse bias generation approach as well as resulting design considerations will be discussed.
Alexander Schmidt,
Fraunhofer Institute for Microelectronic Circuits and Systems
Duisburg, Nordrhein-Westfalen
Germany


CORPORATE PREMIER MEMBERS
  • Amkor
  • ASE
  • Canon
  • EMD Performance Materials
  • Honeywell
  • Indium
  • Kester
  • Kyocera America
  • Master Bond
  • Micro Systems Technologies
  • MRSI
  • NGK NTK
  • Palomar
  • Plexus
  • Promex
  • Qualcomm
  • Quik-Pak
  • Raytheon
  • Specialty Coating Systems