Micross

Abstract Preview

Here is the abstract you requested from the IMAPS_2013 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.

Inspection and metrology solutions for Cu Pillar and TSV High-Volume Manufacturing
Keywords: Cu Pillar Bump, TSV, Inspection and Metrology
As the industry is investigating more cost-effective and reliable Cu Pillar Bumping as well as TSV, a key enabler is process control through inspection and metrology. In working with the industry, Rudolph has developed a suite of solutions that incorporate inspection, metrology and software enabling rapid yield ramp. The solution set apply to via etch, CMP, RDL, micro-bumping and all the way to Chip on Wafer mount and post-saw. Within the TSV process a challenging inspection is that of detecting defects after CMP and nail reveal. The bonded wafers are warped, there are no alignment fiducials and the resolution requirement is high. Rudolph has developed a specific solution designed to address the nail reveal defectivity issue. Micro Pillar bumps and C4 bumps are the main bump geometries used in 3D packages as their small pitch and size allow the required number of I/Os. Inspecting these bumps throughout the process is critical because failure after chip to chip or chip to wafer bonding is very costly. Rudolph will discuss camera and laser triangulation to provide complete 2D and 3D measurement and inspection solutions.
Rajiv Roy, VP. Business Development
Rudolph Technologies
Dallas, TX
USA


CORPORATE PREMIER MEMBERS
  • Amkor
  • ASE
  • Canon
  • EMD Performance Materials
  • Honeywell
  • Indium
  • Kester
  • Kyocera America
  • Master Bond
  • Micro Systems Technologies
  • MRSI
  • NGK NTK
  • Palomar
  • Plexus
  • Promex
  • Qualcomm
  • Quik-Pak
  • Raytheon
  • Specialty Coating Systems