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Active and passive component embedding into low-cost plastic substrates aimed at smart system applications
Keywords: Embedding, low-cost, smart systems
Key properties required for the broad acceptance of smart systems are low cost, thin, large area, lightweight, flexibility, conformability, and even stretchability. Realizing a smart system that combines all these properties requires research and development of new integration technologies that take into account these requirements from the start. Integrating ultra-thin chips on low-cost plastic substrates offers cost reduction, increased flexibility, higher functional density and lower weight. Targeted application areas for these integration technologies range from smart packaging labels and medicine blisters to intelligent lighting systems and phototherapeutic devices. The use of ultra-thin bare dies, having thicknesses down to 20 µm, allows for thin and flexible systems, but requires pitches that are not compatible with current state-of-the art printing technologies. Polyester films with copper metallization make pitches below 100 µm possible at a cost comparable to that of printed circuitry. The low thermal stability of the PET foils, however, puts serious constraints on the integration process and materials, rendering many conventional integration technologies unfeasible. Recently, a foil-based chip embedding technology was jointly developed by Holst Centre and imec [1]. In contrast to fan-out WLP and chip embedding in rigid or flexible printed circuit boards, where cost reduction is achieved by scaling to larger panel sizes, low-cost was a main development goal of this chip embedding technology. The roll-to-roll compatible process flow starts by placing naked dies and thin passive components on a bare copper foil using anisotropic and isotropic conductive adhesive, respectively. The actual embedding is performed by laminating a thermoplastic polyurethane film and a second copper foil onto the copper foil with the components. Interconnections between the two metal foils are realized by laser drilling and metallization of the vias. In the final step, the copper is structured, resulting in a thin Cu-based circuitry foil with embedded components. The advantages of this approach in comparison to other hybrid integration methods based on low-cost materials are the removal of temperature limitations for die bonding, mechanical and physical protection of the chip and the realization of a flat surface which allows for direct access to the contacts of the chip. This new approach was demonstrated in a complete flat, 250µm thick, flexible smart label, including two embedded chips, 10 embedded passives, integrated antenna and sensor circuitry, and two-layer routing.
Maarten Cauwe,
imec-Cmst
Zwijnaarde, OVL
Belgium


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