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Thin PoP For Mobile Devices – Conquering Technological and Process Challenges To Meet Customer Demands
Keywords: Warpage Control, Z-height, Wafer Thinning
As smartphone manufacturers compete relentlessly to create the ‘World’s Thinnest Smartphone’, memory and processor vendors are increasing feeling the pressure to reduce the overall PoP package Z-height. Moreover, with increasing demand for a faster smartphone, memory vendors are expected to increase memory density in an ever reducing PoPt package z-height. This reduction in PoPt package Z-height coupled with increase in memory density poses a significant challenge for memory vendors. To meet these challenging customer demands, the assembly team at Micron Technology is focused on building next generation packaging technology that involves extensive development in substrate technology, wafer thinning, thin die pickup and encapsulation optimization. Through the course of this technology development, there have been significant challenges the team has faced, the notable ones being the handling of thin substrates through the assembly line, wafer thinning (sub 45um), thin die strength and data retention concern for thin die. As the memory industry marches towards thin packages, “PoP Warpage Control” is going to be a significant challenge that has to be overcome. The assembly team at Micron Technology has already made significant progress in resolving some of these challenges and continues to work towards finding solutions for the rest as we progress through our technology development. This paper outlines some of the aforesaid challenges, and the technology development projects carried out to address them. The paper also outlines the potential roadblocks that we envision the memory vendors may face as it gears up to meet market demands in the coming years.
Sachin Deo,
Micron Technology
Boise, ID

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