Here is the abstract you requested from the IMAPS_2013 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|Package design and development of a low cost high temperature (250°C), high current (50+A), low inductance discrete power package for advanced Silicon Carbide (SiC) and Gallium Nitride (GaN) devices|
|Keywords: Silicon Carbide, High Temperature, Power Electronics Packaging|
|The demands for high-performance power electronics systems are rapidly surpassing the power density, efficiency, and reliability limitations defined by the intrinsic properties of silicon-based semiconductors. The advantages of post silicon materials, including silicon carbide (SiC) and gallium nitride (GaN), are numerous, including: high temperature operation, high voltage blocking capability, high speed switching, and high energy efficiency. These advantages, however, are severely limited by conventional power packages, particularly at temperatures higher than 175°C and >100 kHz switching speeds. In this discussion, APEI, Inc. will present the design of its newly developed discrete package specifically intended for high performance, high temperature (>250°C), and high current (>50A) wide band gap devices, which are now readily available on the commercial market at voltages exceeding 1200V. Finite element analysis (FEA) results will be presented, illustrating the modeling process, design trade offs, and critical decisions fundamental to a high performance package design. A low profile approach focuses on reducing parasitic impedances which hinder high speed switching. A notable increase in the switching speed reduces the size and volume of associated filtering components in a power converter. Operating at elevated temperatures reduces the volume of the heat removal system, ultimately allowing for a substantial increase in the power density. Highlights of these packages include the flexibility to house a variety of device sizes and types, co-packaged antiparallel diodes, a terminal layout designed to allow rapid system configuration (for paralleling or creating half and full-bridge topologies), and a novel wire bondless backside cooled construction for lateral GaN devices. Specific focus was placed on reducing the cost of the materials and fabrication processes of the package components. The design of the package will be discussed in detail. Power curve tracing results of both SiC and GaN configurations will be presented. Finally, high temperature electrical test results of a high frequency GaN based boost converter will be presented to demonstrate the system level performance advantages.|
|Brice McPherson, Lead Engineer