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Organic Interposer Technology for 2.5D and 3D Packages
Keywords: interposer, 2.5d packages, 3d packages
In recent years, 2.5D and 3D packages have been developed to accommodate high speed data processing and miniaturization in microelectronics. In the industry, most of the development work has been implemented with silicon interposer technology, which was fabricated with legacy wafer manufacturing equipment. This is because of the excel ground rule available and the lower Coefficient of Thermal Expansion (CTE) than organic substrate technology. The body size for 2.5D packages has been increasing, which is driven by the number of logic and memory chips per interposer as well as those foot prints. Due to the body size limitation in silicon interposers, there is a significant industry need for a large organic interposer to support high-performance 2.5D packages, and potentially 3D packages. This presentation describes the development of a low CTE organic Chip Scale Package (CSP) for 2.5D and 3D packages. The new material set, identified as “Advanced SLC Package” combines a low CTE core and build-up dielectric materials to achieve a composite laminate CTE of 9-12 ppm / oC which is between that of silicon devices and conventional PCBs. The composite CTE reduces the dimensional mismatch between chip and laminate during Bond and Assembly (BA) to mitigate Chip-Package Interactions (CPI). The low CTE significantly reduces the strain in the solder joints during the reflow process and ensures the solder joint reliability. In addition, the CTE mismatch of device solder interconnect pads between the silicon chip and laminate during device attach is pronounced during the C4 join cooling down period. In this presentation, the design rules will be examined based upon the new low CTE organic material parameters as well as the CSP form factor. Mechanical and electrical characterizations were conducted and models were developed and verified. This presentation will also highlight potential CSP applications for 2.5D packages including next generation high-performance memory technologies, such as Wide I/O Memory and High Band Width Memory. Lastly, the technology roadmap for organic interposers will be discussed in order to support future 2.5D and 3D packaging.
Tomoyuki Yamada,
Kyocera America
Fishkill, NY
USA


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