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|New High Temperature SRAMs and ARM® CortexTM-M0 SOCs for 225˚C Applications|
|Keywords: SRAM, ARM, extended lifetime|
|Using 130nm bulk silicon CMOS, Silicon Space Technology (SST) has successfully implemented its temperature hardening technology HardSILTM into new high temperature SRAMs and logic devices. These high density devices are hardened to temperatures above 225˚C with dramatically extended lifetimes relative to existing commercial off the shelf (COTS) parts designed at much larger design rules, i.e., lower densities. Latch-up immune with low operating power at elevated temperatures, these devices provide high temperature system designers more performance for enhanced digital electronic applications while simultaneously delivering improved mean time between failure (MTBF) for the electronic module. Application areas include down hole drilling (DHD), oil & gas reservoir monitoring, geothermal, distributed engine control (DEC) for jet engines, power generation and distribution, automotive, and other industrial applications. Since HardSILTM uses traditional bulk silicon wafers, the technology has compelling advantages over other approaches such as silicon on insulator (SOI). Once assumed the breakthrough technology to extend reliable high temperature operation for digital electronics, SOI has not delivered complete solutions owing to fundamental issues limiting its adoption: 1) very limited availability of design IP for delivering the wide range of digital components required, and 2) high leakage current at elevated temperatures for high density circuits forcing designers to trade-off power budgets for functionality and capability. When they are used in high temperature electronic applications, the SOI components are usually fabricated with very large (i.e., low density) design rules typically lagging the higher performance, higher density bulk silicon CMOS parts multiple generations. Standard, unmodified bulk silicon CMOS offers no solution either since >99.99% of the high density, bulk silicon CMOS produced today targets the consumer market with a maximum operating temperature spec of 85˚C. We will report our progress on new temperature hardened, high density SRAMs and SOCs based on the ARM® CortexTM-M0. SST’s HardSILTM bulk silicon CMOS technology is manufactured at low defect, high volume commercial fabs using a modified 130nm CMOS process that hardens the junction isolation and has demonstrated latch-up immune, extended lifetime, and low power performance at high temperatures >225˚C.|
|David Duff, Director of Marketing