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Thermal design and measurements of a switch matrix module based on LTCC technology
Keywords: Thermal measurements, Low temperature co-fired ceramics technology, Reliability of interconnects
A Ka-band 4×4 input multiplexer was developed to route spot-beam signals at the intermediate frequency stage aboard a geostationary communication satellite [1]. Being space equipment, the multiplexer must be functionally verified for environmental conditions of the geosynchronous earth orbit during each development phase. The core of the multiplexer is a reconfigurable switch matrix (RSM) module laid out in multi-throw architecture. The low-temperature co-fired ceramic (LTCC) technology and double-sided mounting technique yielded a hermetically sealed compact module 32 mm × 32 mm. In this paper, thermal measurements and package design to mitigate the thermo-mechanical stress are presented. Owing to the PIN-diodes based design and integrated bias circuitry, the power density on the ceramic package is significantly increased. Electro-thermal measurements were carried out to ensure its reliability for anticipated long operational lifetime (~15 years). A vacuum chamber was used to verify the DC and microwave characteristics of the breadboard version at low pressure ≤ 5 mPa and temperature range 248 K – 338 K. Negligible degradation of control currents (≤ 0.5%) and transmission coefficients (≤ 0.25 dB) were observed at 338 K; major reasons of these variations could be associated with the lack of thermal vias and temperature dependent dissipation losses [2]. Steady-state and transient unit step responses were recorded for a static input power ~1.6 W and different ambient temperatures [3]. Under steady-state conditions, the peak junction temperature on the ceramic package was found to be 25 K above the ambient temperature. In preparation of the engineering qualification model, thermal vias and conductive pads were introduced on the package, besides lowering the biasing currents by ~50 % to lower ohmic heat generation. It is clear that the thermal reliability had to be improved at the expense of microwave insertion loss. Surface temperatures in response to 750 mW DC power were recorded at a sampling rate of 20 ms and 50 % duty cycle by using an infrared microscope system. The steady-state temperature distribution provided an estimate of thermal resistances at various interfaces. Due to multiple heat sources of different power levels (10 mW – 25 mW), the transient heat flow was too complicated to resolve into individual paths (both temporally and spatially) and to compute a thermal impedance matrix [4]. Instead, the time-constant spectrum was computed from the transient data at a test-point on the ceramic substrate, which revealed several peaks of thermal resistances, with the maximum corresponding to the junction-to-ambient resistance 7 K/W. Hot-spots on the substrate predicted peak junction temperature to be 10 K above the ambient conditions, however, 15 K below the breadboard version. The experimental data agree with the numerical simulation model developed in CST Studio Suite®. The reliability of the 2nd-level interconnects is reduced at high temperature due to the increased thermo-mechanical stress at the ceramic-printed circuit board-aluminum interface [5]. A Kovar inlay beneath the printed circuit board mitigates the thermal stress at these interconnects by providing uniform lateral displacement with temperature above and beneath the board [6].
Saqib Kaleem, Doktorand
Institute for Micro- and Nanotechnologies®, Ilmenau University of Technology, Ilmenau 98693, Germany
Ilmenau, Thuringen
Germany


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