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Buried Secrets - Embedding as Support for More-than-Moore
Keywords: PCB, Embedding, Cavity
The whole semiconductor supply chain is participating in the fight to extend Moore’s Law. On the substrate side, some choose to go the More-Moore way, by reducing line/space dimensions and pad sizes, while others bet on More-than-Moore, with 3D and heterogeneous integration. The embedding industry falls in the last camp. By functionalising the laminate, the manufacturer brings some “smarts” in an otherwise “dumb” interconnection. This can be achieved by the addition of actives (transistors or integrated circuits such as memories, processors, ASICs), passives (discretes or Integrated Passive Devices), sensors or a combination thereof. Depending on the manufacturer, embedding can refer to three architectures: - Embedded layer, where resistive or capacitive layers replace standard dielectric, thereby allowing the creation of resistors or capacitors, - Partial embedding, where a cavity is created at the surface of the laminate, allowing the component to be attached to a lower layer that the top one, while still being left in the open, - Full embedding, where a component is completely enclosed in the laminate. The first method is quite limited in its scope (lack of integration flexibility and density), and will therefore only be briefly covered. Both remaining variants will be more detailed. Each obviously bring its own advantages in terms of performance, integration, assembly… so a careful selection is required. After presenting the different concepts and processes, specific examples (memory, power management…) will be discussed, and the justification for one or the other presented. Additionally, new results in terms of reliability and thermal management (in particular with the extreme case of power transistors) will be summarised.
Nick Renaud-bezot, Sales Manager
AT&S AG
Leoben, Styria
USA


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