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Improving the thermal management of power GaN devices
Keywords: Power electronics, ceramic substrate, packaging
This presentation will start with a general introduction, stating the advantages of GaN devices (very high switching speed, low on-state resistance, low cost), especially regarding the power management for consumer electronics. The distinct packaging features of the GaN devices (basically, they are lateral devices, so all electrical connexions are on the same side of the die) will also be presented. Finally, a short presentation of the various available manufacturers and transistor structures will be given. After this introduction, we will focus on the actual topic of the thermal management. GaN transistors require extremely short connexions (parasitic inductance of a few hundred of picohenries) to remain efficient, and yet one should provide them with electrical isolation and low thermal resistance to a heatsink. In this presentation, we will compare a regular mounting (flip-chip mounting on a PCB), the same mounting, but on a ceramic substrate, and an alternative mounting where the die is cooled through its backside, and the electrical interconnects use a flexible PCB. These three structures are compared using simulation and experiments, and it is found that the ceramic substrate reduces the total thermal resistance by a factor of 3 (5 K/W or less vs 15 K/W for a PCB substrate). The prototype of a GaN half-bridge on ceramic, including the gate drivers, decoupling capacitors, and GaN transis- tors, will finally be presented, along with some manufacturing consideration (to produce a ceramic substrate with both thick copper tracks for the current capability and high resolution to match the fine pitch of the GaN transistors).
Cyril BUTTAY, Researcher
Laboratoire Ampere, CNRS
Villeurbanne, --

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