Here is the abstract you requested from the thermal_2015 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|Thermal and Packaging Challenges for Advanced Power Semiconductor Modules|
|Keywords: Thermal Challenges, Packaging, Power Semiconductor|
|There is a continual market pull in the power electronics industry for modules with higher power densities and increased reliability. The performance of current electronics packaging needs to catch up to the power handling capability of modern electronic components, as devices are being derated due to package limitations. Standard silicon and silicon carbide power modules, consisting of direct bond copper (DBC) substrates, solder attachments, metal heat spreaders, metal heat sinks, and thermal interface materials (TIMs), have thermal resistivities between 0.5-3 Kcm2/W. Advanced modules using high thermal conductivity materials and integrated liquid cooled heat sinks achieve resistivities of ~0.2 Kcm2/W, a large portion of which is represented by conduction resistance through the thermal stack. These standard and advanced modules are not capable of cooling future Army’s modules, anticipated to dissipate 500 W/cm2 per chip with an inlet fluid temperature of 100-105°C and a maximum chip temperature of 150°C (ΔT=50°C, Rth<0.1 Kcm²/W). To this end, this presentation will discuss the challenge of developing next-generation cooling solutions and the implications of this from a module perspective. A numerical 3D thermal resistor network for quick parametric analysis has been developed. The resistor network solves quickly in MATLAB, enabling fast, iterative thermal analyses and design tradeoff analysis through the parametric studies of the chip dimensions, number of chips, chip layout, material types, cooling solutions, etc. Numerical analysis has been performed to show the impact of various types of topside and/or backside cooling efforts (two-phase, jet impingement, microchannels, etc.). Design trade-offs were analyzed that focus on improving SWaP (size, weight, and power), system inductance, and thermal performance. The analysis has shown that any one single solution is not sufficient (higher thermal conductivity materials, improved heat sink, or adding topside cooling) and a combination of approaches is necessary to solve this thermal challenge.|
|Lauren M. Boteler, Thermal/Packaging Engineer
Army Research Laboratories, Sensors and Electronic Devices Directorate