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High Density Fan-Out (HD-FO) Package Platform for Mobility, Networking and Consumer Applications
Keywords: high density fan out wafer level package, memory band width, 2.5D and 3D
Advanced packaging is increasingly becoming an important enabler for next generation IC product applications. For the different product segments advanced packages provide unique value proposition combinations. In premium smart phones, small foot print area, low height and high application processor/memory band width of up to 52 Gb/sec, all based on user acceptable battery life, are becoming mandatory product requirements. Likewise, to meet the demanding performance specifications for networking, CPU and GPU consumer applications advanced silicon node die-partitioning ability and Tb/sec memory bandwidth are important priorities. On the other hand, for the wearables/consumer IoT application space the key differentiating product features are ultra-low power, small form factor and passives integration, all at an extremely cost efficient level. Over the last couple of years quite significant and well publicized advancements have been made in the IC industry in the potential adoption of fan out wafer level package platforms for both analog and digital applications. HD-FO platforms are likely to find significant adoption in the mobility, consumer application space as it has the capability to achieve sub-micron package routing density, excellent processor/memory band width, extremely thin package height and small foot print area. Extensive HD-FO package portfolio is being developed that spans across: (1) Multiple advanced technology nodes (2) Broad range of package sizes (3) Single die, multi-die packages (4) Different package configurations that include 2.5D, 3D, with substrate, without substrate options. In addition to providing differentiating technology value propositions through its advanced packaging platforms, GLOBALFOUNDRIES has built a collaborative ecosystem, customer centric business model and flexible supply chains to meet the business requirements for our fabless IC customers. Finally, silicon/package co-design environment and RF enablement will ensure that customers realize the benefits of seamless product design, fast yield feedback and reduced time to market.
Gaurav Sharma, Senior Member of Technical Staff
Globalfoundries US Inc
Santa Clara, California

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