Here is the abstract you requested from the dpc_2016 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|Reliability of Copper Pillar Devices Assembled using One Step Chip Attach Materials and (OSCA-R) Conventional Mass Reflow Processing|
|Keywords: Underfill, Flux, Reliability|
|One step chip attach materials (OSCA) are dispensable polymeric materials for flip chip assembly, which are designed to flux metallic interconnections and subsequently turn into an underfill upon curing. OSCA materials enable close device placement improving density, die stacking, 2.5D and 3D assembly applications as a well as considerable simplification of the traditional assembly process by combining the reflow, flux residue cleaning and capillary underfill into a single step. The key challenge when designing OSCA materials for conventional mass reflow processing (OSCA-R) is the timing the sequence of curing, fluxing and soldering events during reflow processing. OSCA-R materials must also have a process-friendly rheological design that integrates seamlessly with standard dispensing equipment and enables high filler loading levels. This paper presents reliability performance for silicon die and substrate test vehicles with copper pillar interconnect structures assembled using filled OSCA-R materials processed using conventional mass reflow techniques. Reliability is evaluated using HAST (Highly Accelerated Stress Test) and JEDEC test conditions (-55 or -40 C to 125C). The results are discussed in the contest of both process and material design considerations. Process variables include; dispense volume, pattern, voids, and material design variables include the filler particle size (nm to um) and loading level. A comparison of copper pillar device reliability to C4 bump geometries will be discussed with attention to nature and location of failures and cracks in the solder joints.|
|Daniel Duffy, Technology Development Manager, Semiconductor Materials