Here is the abstract you requested from the IMAPS_2016 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|Characterizing and solving imaging challenges in thick resists for wafer and panel based lithography applications|
|Keywords: Lithography, Stepper, Thick resist|
|Increasing volume using larger substrates with decreasing process margins continues to create new challenges for advanced packaging applications. Key step and repeat camera technology continues evolving for the mass production of microstructures used for 2.5D and 3D technologies. Printing smaller features with higher aspect ratios require achieving higher sidewall angles in thick positive resists and polyimides. To help solve these imaging challenges we have leveraged resist modeling software and guide the adjustment of optical parameters needed for better performance. Higher contrast films have also been evaluated to help achieve the improvements in performance needed. Resist models that can include the effects of flare have been critical to understand the requirement for printing in thick negative resists and has aided in printing features on varying topography and film thicknesses. Special chucks help improve the flatness of warped wafers and real-time auto-focusing provides good image fidelity. Printing microstructures over larger formats with higher throughput has been accomplished using large magnification adjustment for improving overlay and validated by characterizing image placement errors over large substrates. Examples of resist models that are created using resist parameters and optimized using SEM images of printed features are compared. Extrapolations of the resist models are shown that guide improvements by varying optical parameters. SEM images confirm that the modeled result of the optimal solution is achieved. Reduction in large substrate overlay error is achieved after the stage corrections are applied. Examples show that topographical errors of warped wafers can be reduced and how real-time auto-focusing for each exposure minimizes focus errors.|
|James Webb, Technology director
Rudolph Technologies Inc.