Abstract Preview

Here is the abstract you requested from the IMAPS_2016 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.

Co-Design and Demonstration of Fully Integrated Optical Transceiver Package Featuring Optical, Electrical, and Thermal Interconnects in Glass Substrate
Keywords: Optoelectronics Packaging, High Performance Interconnects, Optical Interconnects
For the last thirty years, fiber optics have been the backbone to the communication industry due to optical fibers’ unmatched low transmission loss. As bandwidth demand continues to rise, fiber optics have penetrated to shorter transmission distances. However, the reduction in transmission distance does not lead to a simplification of the optical transceiver unit leading to disproportioned transceiver cost dominated by packaging [1]. As a result, further adoption of fiber optics hinges on reduction of optical transceiver packaging cost. Unlike standard electronics packaging, an optimized optical transceiver design must account for low loss fiber to chip interface, high speed electrical connection to the data center, and active thermal management to maintain performance of lasers and photodetectors. These requirements have led to complex high cost structures requiring multiple stack-ups [2], [3]. The 3D Glass Photonics (3DGP) research program at Georgia Tech aims to address the packaging design requirements utilizing the unique advantages offered by glass substrates. Glass is the ideal platform for low loss optical and electrical interconnects owing to its low surface roughness and loss tangent, as demonstrated by the authors previously [4], [5]. Further, the thermal isolating property of glass can be used for thermal management. In this paper, a first implementation of a fully integrated optical transceiver package with characterization results in optical, electrical, thermal, and reliability is presented. A co-design methodology starting with the design target in each area and leading to considerable of all performance metrics is outlined. The resulting design is fabricated utilizing a panel scalable process flow developed by the authors using low-cost parallel processes. In terms of optics, the integrated turning structure demonstrated in last year’s conference is refined to reduce coupling loss and improve alignment tolerance without adding significant process complexity. The process to fabricate the integrated turning structures is integrated seamlessly with standard semi-additive electrical build-up, with the additional innovation of sharing the passivation layer with optical cladding layer. Thermal management is enabled by the use of thermal vias, which can be designed to adjust the equivalent thermal conductivity of glass substrate, thus providing local heat sinking capability unique to glass substrate. Lastly, the CTE-tailored glass substrate is used to reduce the complex stack-up associated with interposer technology while maintaining the necessary board-level reliability. In summary, this paper presents the first demonstration of a co-designed optical transceiver package utilizing panel scalable processes in glass substrate. The co-design methodology optimizes optical, electrical, and thermal interconnects necessary in meeting the design requirements.
Bruce Chou, Graduate Research Assistant
Georgia Institute of Technology
Atlanta, Georgia
United States

  • Amkor
  • ASE
  • Canon
  • Corning
  • EMD Performance Materials
  • Honeywell
  • Indium
  • Kester
  • Kyocera America
  • Master Bond
  • Micro Systems Technologies
  • MRSI
  • Palomar
  • Promex
  • Qualcomm
  • Quik-Pak
  • Raytheon
  • Rochester Electronics
  • Specialty Coating Systems
  • Spectrum Semiconductor Materials
  • Technic