Here is the abstract you requested from the IMAPS_2016 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|Direct write lithography approach for Panel Level Package|
|Keywords: direct write, lithography, panel level package|
|Semiconductor packaging industry is now looking for Panel Level Packaging for next generation Fan-Out manufacturing processes. There are two major methods for mass producing fan-out devices. One is RDL first process which requires combination of dielectric layers and RDLs on carrier substrate FIRST then chips will be put on to the substrate later, and the other is chip first processes which chips are molded into plastic substrate FIRST then dielectric layers and RDLs will be generated on mold substrate. Comparing those two methods, chip first process is simpler in number of process steps thus it is said that the chip first method will have cost advantage. However, because the method employs mold substrate, it will give great technical difficulty for exposure tool due to distortion of the mold substrate. The distortion is not linear or predictable. SCREEN SPE has been researching how to expose chips mounted on distorted substrate with using mask-less direct imaging tool. Unlike mask based exposure tool, the direct imaging tool has capability of exposure with applying die-by-die alignment. In addition, the tool has the capability to generate minimum resolution of 2um lines and spaces aiming for devices requiring more I/Os in mobile and IoT era up to year 2020. In the presentation, we are going to disclose how we have done die-by-die alignment and show some of the result. Also we bring up the technical issues to generate 2um RDL patterns on package substrate.|
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