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Packaging of novel Power Electronics
Keywords: Thermal Management, Packaging of Power Electronics, Structural Reliability
Traditional Power Electronics for military and fast computing application are known to be bulky and heavy in weight. The mechanical design and materials of components have limitations in performance under such conditions. For such kind of packaging configuration, generally, there are issues of thermal management; heat generation, transfer across the system and finally, its dissipation. The early failure of electronics under extreme mechanical loading conditions is a major concern. As a result of the need for smarter functionality along with a compact design, the focus of the research and development of power electronics is shifting towards advanced packaging and manufacturing concepts. In this paper, a discussion of novel packaging methodology for mechanical integration of the advantages of thin film thermo-electric cooling of high density hot-spot heat flux along with forced fed micro-channel cooling of background heat flux generated in thin film (3-4 um) Gallium Nitride (GaN) Power Electronics deposited on Silicon Carbide (SiC) substrate is done. We address the interconnection of thermo-electric cooler by a contact structure to the SiC substrate. Furthermore, we analyze and report the feasibility of SAC305 and sintered silver solder for interconnection. The focus of this study will be on thermo-mechanical phenomena in electronic and metallic materials. An attempt to understand the mechanical behavior of the multi-layer material structure is made. On the basis of Finite Element Analysis (FEA) approach, the prediction of feasibility of this mechanism of integration will be discussed. Non-linear mechanical properties of materials are input into computational model of mathematical solver. The prediction of structural reliability is reported in terms of Mean Time to Failure (cycles) of solder joint by application of Engelmaiers failure model. The primary mechanisms of failure that are concerning to the selection of materials are found to be fatigue and creep failure of solder joint. The mathematical equation of failure model incorporates these failure phenomena in addition to the dwell time, average solder temperature and plastic strain accumulation in solder. The plastic strain input in the model is an average value of von-mises plastic strain at each node of the finite element mesh of the joint. Also, we apply the Anand model to incorporate any visco-plastic deformation in the solder joint. A representative CAD model of the electronics module is input in the FEA solver. The size of the FE mesh is carefully selected for convergence of solution. We report results of mesh independence study. The modeling of deformation behavior of the materials is made on the basis of available constitutive theories of mechanics. This refers to Von-Mises theory for ductile materials and Maximum Principal stress theory for brittle materials. A selection of 20 um solder joint thickness proves to be sufficient to provide mechanical strength. For optimal performance of the power electronics amplifier, we report a design optimization study of contact structure. A comparison in between three geometries of contact structure: t-shaped, lofted, and taper will be discussed. In this paper, we will address the packaging of electronics device to printed circuit board. The focus here will be laid on selection of appropriate interconnection type, and analysis of geometry and materials for selection. An alternate approach of embedding of the thermo-electric device inside the SiC substrate will also be discussed.
Sumeer Khanna,
Department of Mechanical Engineering, University of Maryland at College Park
College Park, Maryland
USA


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