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|Vertical Interconnection with Electrically Conductive Adhesives: Enhanced Wiring Density, Improved Yields, and Layer Reduction in High Layer Count Substrates and Printed Wiring Boards|
|Keywords: z-axis electrical interconnection, electrically conductive adhesive, electronic packaging|
|Greater I/O density at the die level, coupled with more demanding performance requirements, is driving the need for improved wiring density and a concomitant reduction in feature sizes for electronic packages. Traditionally, greater wiring densities are achieved by reducing the dimensions of vias, lines, and spaces, increasing the number of wiring layers, and utilizing blind and buried vias. However, each of these approaches possesses inherent limitations, for example those related to drilling and plating of high aspect ratio vias, reduced conductance of narrow circuit lines, and increased cost of fabrication related to additional wiring layers. One method of extending wiring density beyond the limits imposed by these approaches is a strategy that allows for metal-to-metal z-axis interconnection of subcomposites during lamination to form a composite structure. Conductive joints can be formed during lamination using an electrically conductive adhesive (ECA). As a result, one is able to fabricate structures with vertically-terminated vias of arbitrary depth. Replacement of conventional plated through holes with vertically-terminated vias opens up additional wiring channels on layers above and below the terminated vias, and eliminates via stubs which cause reflective signal loss. Vertically terminated vias facilitate a more space-efficient package redesign for semiconductor packaging (SCP) substrates and printed wiring boards (PWBs) having tighter via and pad pitch. In addition, parallel lamination of testable subcomposites offers yield improvement, shorter cycle times, and ease of incorporating features conducive to high speed data rates. The technique is applicable to both SCP substrate and PWB fabrication. It offers a means of effectively providing extremely high aspect ratio (AR) interconnections, ARs beyond those achievable with conventional plated through holes (PTHs) formed by drill and plate techniques. ECAs can also be used for flip-chip die-to-SCP substrate/interposer bonding, and SCP substrate-to-PWB bonding. Various constructions using ECA interconnects will be discussed with analyses of intermetallic compound formation at the joined ECA-to-metal bond pad interfaces.|
|Frank D. Egitto, Director of Research and Development
i3 Electronics, Inc.