Micross

Abstract Preview

Here is the abstract you requested from the dpc_2018 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.

A System Co-Design Flow for 3D and Fan-out Package Architectures
Keywords: FOWLP, 3D IC, Design CAD
With 3D-IC package architectures and fan-out wafer level packaging becoming viable and necessary, the need for design tools to address this development is critical. During the traditional design process, design data is exchanged manually and this sometimes can become a limiting factor to address the fast pace of demands. In this paper we present a flow integrating chip RDL, package and PCB design in a native 3D hierarchical co- design flow. This enables the early optimization of the interconnect structures for system design creating avenues for feasibility studies that may not have been always possible with a traditional flow. Some use cases of this flow to practical examples will also be shown to prove the merits of such an approach.
Narayanan TV, Solutions Architect
Zuken USA
Milpitas, CA
USA


CORPORATE PREMIER MEMBERS
  • Amkor
  • ASE
  • Canon
  • EMD Performance Materials
  • Honeywell
  • Indium
  • Kester
  • Kyocera America
  • Master Bond
  • Micro Systems Technologies
  • MRSI
  • NGK NTK
  • Palomar
  • Plexus
  • Promex
  • Qualcomm
  • Quik-Pak
  • Raytheon
  • Specialty Coating Systems