Micross

Abstract Preview

Here is the abstract you requested from the HITEC_2018 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.

Analog and Logic High Temperature Integrated Circuits Based on Enhancement Mode Planar SiC JFETs
Keywords: High Temperature IC, Silicon Carbide (SiC), JFET
With the advance of wide bandgap power devices and modules, there is a growing demand for high temperature control electronics that can operate in close proximity to the power switches. Various sensing systems operating at high temperature would also benefit from having the sensing circuit close to the actual sensor. While silicon-on-insulator integrated circuits (IC) have been demonstrated to operate at 300C, a common rating among the commercial products is 225C. Silicon carbide (SiC) is the most mature wide bandgap material for high temperature applications, and devices built on SiC are capable of operation at temperatures of 500C [1]. For building high temperature capable ICs in SiC, the Junction Field Effect Transistor (JFET) has clear advantages at high temperatures over the Metal Oxide Semiconductor Field Effect Transistor (MOSFET) in terms of reliability, as the JFET is free of gate oxides and is not subject to any of the MOSFET oxide related reliability concerns. This paper presents initial results on developing high temperature capable SiC JFET based IC technology. All JFET devices are fully planar, formed by ion implantation, and the device design allows the use of semi- insulating or conductive substrates. Basic analog and logic ICs were built in order to demonstrate the technology high temperature capability. All circuits used enhancement and depletion mode n-channel JFET transistors. The logic circuits built included NOT, NAND, and NOR gates. The analog circuits built included a simple one-stage operational amplifier. JFETs and ICs were packaged in ceramic DIP packages and tested at temperatures up to 350C, which was the IC design target maximum operating temperature. Some JFET designs that were optimized for higher temperature operation were tested up to 500C. The operational amplifier was tested by biasing the gates of the input stage transistors with a fixed DC voltage, and applying a small signal from a function generator. The input and output waveforms were measured with an oscilloscope and the gain was calculated from the measured output and input amplitudes. The power supply voltages VDD and VSS were +10V and 0V. The unity gain frequency of the amplifier is about 3MHz at 25C and about 1MHz at 350C. Logic gates, based on n-channel JFETs were also tested at temperatures up to 350C. The logic circuits used an enhancement mode JFET as an active switch, and a depletion mode JFET as an active load. The selected supply voltage VDD was 2.0 to 2.4 V, which is compatible with the maximum voltage that can be applied at the gate of the transistors, without allowing significant gate currents. This allows the output of one logic gate to be connected directly to the input of the next stage without the need for current limiting resistors in the active transistor gates that may limit the circuit speed, or without the need for any type of level shifting that would complicate the design, increase the size of the circuits and, and reduce switching speeds. Logic gates operation was demonstrated at temperatures from 25C to 350C and frequency up to 200kHz.
Peter Alexandrov,
United Silicon Carbide
Monmouth Junction, New Jersey
United States


CORPORATE PREMIER MEMBERS
  • Amkor
  • ASE
  • Canon
  • EMD Performance Materials
  • Honeywell
  • Indium
  • Kester
  • Kyocera America
  • Master Bond
  • Micro Systems Technologies
  • MRSI
  • NGK NTK
  • Palomar
  • Plexus
  • Promex
  • Qualcomm
  • Quik-Pak
  • Raytheon
  • Specialty Coating Systems