Device Packaging 2019

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Second level of solder joint interconnections: avoiding inelastic strains
Keywords: solders, package-to-substrate, design-for-reliability
It is usually assumed that solder joints of the second level interconnection (package-to-PCB) in surface mounted IC packages are always stressed above their yield point and, hence, are always subjected to low- cycle fatigue condition during accelerated testing and in actual operation. Numerous semi-empirical relationships of Coffin-Manson type that consider the inelastic behavior of the solder material have been suggested during the last decade to predict the fatigue lifetime of solder material. But could the inelastic behavior of this material be avoided by a proper design of the solder system? If this is possible, the elastic fatigue conditions will take place, and even if the induced stresses are above the fatigue limit (but below its yield stress), the material’s lifetime will increase dramatically. Palmgren-Miner rule of linear accumulation of elastic fatigue damages could be applied, instead of Coffin-Manson models, in such a situation, to predict the material’s lifetime. In this analysis it is shown how inelastic strains in solder joint interconnections of the second level of interconnections could be avoided by using rational physical design of solder joint interconnections and how the recently suggested Boltzmann- Arrhenius-Zhurkov (BAZ) model could be used to predict the lifetime of a solder material, when the loading is random and when a combination of low- temperature conditions and random vibration loading is used in accelerated reliability testing as an attractive alternative to cost- ineffective, time-consuming and often misleading temperature cycling. The following major topics are addressed: 1)What could possibly be done to avoid inelastic strains in package-to-PCB (second level) solder joint interconnections; in other words, how significant could the expected stress relief be owing to the application of a low expansion substrate, and/or solder joints with elevated stand- offs, such as column-grid-arrays (CGA); and/or employment of Quad- Flat-No-leads (QFN) designs, characterized by stiff mid-portions and compliant peripheral portions; and/or various kinds of inhomogeneous solder systems [1-11]; 2) How significant is the size of the expected peripheral zones of inelastic strains, if, despite of all the design effort, inelastic strains cannot be avoided [12, 13]; this size can be used as a suitable criterion of whether the design will be free of inelastic strains and, if not, how robust the design will nonetheless be: the peripheral joints are expected to fail first, especially if they experience inelastic strains, so that the lifetime of the interconnection will be inversely proportional to the number of the peripheral joints experiencing such strains;3) Specifics of the random loading on solder joint material during the accelerated testing and in actual operation conditions [14,15]: in random vibration conditions the high- and low-level loadings take place interchangeably; this circumstance could justify, owing to the Bauschinger effect (phenomenon by which repetitive plastic deformations of a metal increase its yield stress and strength), the application of the Palmgren-Miner rule, even when the inelastic deformations are not completely avoided; 4) Role of failure-oriented accelerated testing (FOAT) and Probabilistic Design for Reliability (PDfR) in application to solder joint interconnections[16-18]: if one is interested in understanding the physics-of-failure, highly focused and highly cost-effective FOATs are to be considered, conducted and correctly interpreted, are they not?; and when reliability assurance is imperative, the likelihood of failure should be quantified, and since nothing is perfect, such a quantification should be done on the probabilistic basis, does it not? The general concepts are illustrated by practical numerical examples.
Ephraim Suhir,
Portland State University
Los Altos, California

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