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Processing Through Glass Via (TGV) Interposers for Advanced Packaging
Keywords: interposer, TGV, substrate
In recent years new applications for RF and MEMS devices require the insulating properties of glass. In order to realize these applications using a glass interposer, it becomes necessary to be able to deposit a metalized layer on both surface as well and create a via through the glass. In this paper we will present results of interposers that have fine line circuitry on both sides of the glass and have through glass vias (TGVs). One major challenge is how to create a TGV using either electrically conductive adhesives (ECAs) or Cu plating methods to achieve a high conductivity and reliable via connection. Most work to date uses ECA materials to fill the TGV, however, many of these ECA materials have limitations in that they cannot withstand temperatures in excess of 400C, are not hermetic and do not have the electrical properties of bulk Cu. In the first phase of our work, we have evaluated three different commercially available sinterable Cu ECA materials to fill the glass vias. A major challenge in using these materials is how to effectively fill the vias. Our test vehicle has a TGV with dimensions of 50um diameter and a 300um thickness on 2 x 2glass substrate. A positive pressure screen printing process was used to fill the vias. These ECA materials exhibited a very high viscosity, due to the high Cu metal filler content, which made them very difficult to fill. Different pressures, squeegee speeds, and standoff conditions were evaluated to arrive at an optimized process to effectively fill the glass vias. A tilted X-ray inspection approach was used to characterize the yield for ECA hole fill. A DOE of 5 different sintering conditions was conducted to determine how to maximize the electrically conductivity of the paste. From this work we will show the impact of sintering conditions on electrical conductivity and the degree of hermeticity. In parallel with the ECA approach, we have developed a process to Cu plate a TGV. In this approach, a dry deposition process was used to produce a conductive seed layer in the via having a diameter of 50um and a total substrate thickness of 300um, which corresponds to an aspect ratio (AR) of 6. We proceeded to use a Cu electroplating process to plate up a conformal Cu layer in the glass via. A unique Cu-plated via configuration has been developed to create a high performance and reliable TGV. In this work, we have plated both 100mm and 200mm wafers having variable via pitches less than 200um. The 200mm wafer has greater than 90,000 TGVs per wafer. From this work, a better understanding of different plating conditions on quality and uniformity of the conformal Cu plating through the thickness has been achieved. In addition, we were able to deposit a very thin layer of SiN between two thick Cu metal layers on the topside of a glass interposer to produce a capacitor. The success of plating an AR 6 TGV also enables the formation of inductors in a glass substrate. An organic dielectric layer using an Ajinomoto Buildup Film (ABF) was used to create a single buildup layer on the glass interposer. The combination of these individual technologies allows the capability to manufacture a glass interposer for advanced packaging applications. A discussion of the challenges associated in building glass interposers will be presented, which will include examples of recent builds of a double-sided Cu circuitry glass interposer and a diplexer module having Cu MIM (metal- insulator-metal) capacitors and inductors for RF applications.
Charles G. Woychik , Chief Scientist
i3 Electronics, Inc.
Endicott, NY

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