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Study of Sub-micron Fan-out Wafer Level Packaging solutions
Keywords: Sub-micron, Fan-out Wafer Level Packaging, stepper
Although Fan-out Wafer Level Packaging (FOWLP) has been a hot topic for a decade, it became a popular mass-production packaging technology following the Apple A10 processor’s adoption of the TSMC’s InFO process. However, the FOWLP market did not expand as widely as market researchers predicted given the cost requirements for mobile processors. Therefore, it is necessary for other additional innovative applications to adopt FOWLP technology to drive strong market growth. Canon has contributed to advanced packaging manufacturing since 2011 when Canon shipped the first BEOL exposure system (stepper), the FPA-5510iV. For seven years Canon has developed many solutions to improve productivity and yields, culminating in the 2016 release of the FPA-5520iV stepper. Warped wafer handling which is a key challenge for BEOL exposure tools and the FPA-5520iV is equipped with a new wafer handling system that offers a significantly improvement over first generation FPA-5510iV steppers that were capable of handling up to 500 µm of wafer warpage. The latest FPA-5520iV steppers are designed to handle more than 5 mm of wafer warpage in order to process FOWLP reconstituted wafers that typically exhibit more warpage than silicon wafers. The FPA-5520iV also features an advanced wafer pre-alignment system to compensate for poor notch accuracy of reconstituted wafers as the notch position is defined by compression mold position accuracy. To improve pre-alignment accuracy, Canon developed the Grid-PA function that observes die placement and defines the orientation of wafers. In addition to the features mentioned above, FPA-5520iV steppers are widely adopted by advanced packaging manufacturers due in part to innovative solutions for improving productivity for thick resist process and non-contact wafer edge shielding. Current FOWLP processes mainly use design rules calling for 5 µm L/S patterns in redistribution layers (RDL) that connect a chip’s pads and ball bumps. However, 5 µm L/S RDL are not cost-effective for multi-chip interconnections because these processes require multiple layers to connect chip-to-chip with wide bandwidth. RDL line width reduction is a key challenge to expand the FOWLP market to multi-chip interconnections, including interconnections between SoC and DRAM, split die connection of FPGA, and interconnection between image sensors and SoC. Next generation FOWLP requires 1.0 µm RDL and future FOWLP is targeting 0.8 µm RDL. To meet these requirements, Canon has developed new projection optics with a high NA and wide-field that is best suited for sub-micron FOWLP. These new projection optics are a new option for FPA-5520iV steppers, offering NA 0.24 imaging and 52 x 68 mm exposure field. FPA-5520iV steppers with NA 0.24 provide excellent 0.8 µm resolution performance throughout all imaging fields thanks to Canon’s wave-front aberration based projection optics manufacturing methods and on-axis optical tilt focus sensor. Collaborative studies with resist companies and material makers show the imaging performance of the new projection optics and this paper will provide a detailed comparison of the imaging performance between NA 0.18 and NA 0.24 projection optics. In NA 0.24 exposure condition, more than 8 µm DoF has been achieved for 0.8 µm L/S patterns in DNQ resist, while white edges have been significantly improved. Because FPA-5520iV steppers can be equipped with solutions for BEOL processes, sub-micron RDL can be manufactured in cost-competitive plating processes and this advantage will contribute to realization of sub-micron FOWLP for chip-to-chip wide bandwidth interconnections. Another advantage of the new projection optics is the large 52 x 68 wide imaging field that is capable of overlaying four 26 x 33 mm FEOL shots in a single exposure to improve stepper productivity. The new large field optics also enable fabrication of large FOWLP for high performance processors including FPGA and GPU chips whose sizes are increasing rapidly because of market demands for chips supporting Artificial Intelligence and Bitcoin mining. The large field and high resolution imaging benefits of the FPA-5520iV will speed the development of large size FOWLP manufacturing and performance improvements of FPGA and GPU devices. In this paper, we will discuss the potential of sub-micron FOWLP and will introduce and report evaluation results of the new high NA and wide field projection optics of the FPA-5520iV stepper.
Yoshio GOTO,
CANON
Utsunomiya-shi, Tochigi-ken
JAPAN


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