Device Packaging 2019

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Advances in Temporary Bonding and Debonding Technologies for use with Wafer-Level System-in-Package (WLSiP) and Fan-Out Wafer-Level Packaging (FOWLP) Processes
Keywords: wafer bonding, embedded die, laser release
Abstract for IMAPS 2018 Advances in Temporary Bonding and Debonding Technologies for use with Wafer-Level System-in-Package (WLSiP) and Fan-Out Wafer-Level Packaging (FOWLP) Processes Michelle Fowler1, John Massey1, Ramachandran Trichur1, Matthew Koch1, Kevin Edwards1 Tanja Braun2, Steve Voges2, Markus Wöhrmann2 2Fraunhofer Institute IZM, Berlin, Germany 1Brewer Science, Inc. 1(573)364-0300 Keywords: mechanical release, laser release, temporary wafer bonding, embedded die, WLSiP Abstract Today’s complex fan-out wafer-level packaging (FOWLP) processes include the use of redistribution layers (RDL) and reconstituted wafers with epoxy over-mold compound (EMC) for use in heterogeneous integration. Wafer-level system-in-package (WLSiP) uses fan-out wafer-level packaging (FOWLP) to build the system-in-package (SiP) by attaching known-good die (KGDs) in a chip-first process to a tape laminated temporary carrier. If the dies are attached in a die-up configuration (active area facing up) and then over-molded with EMC, contact pads on the embedded die are exposed during the backside grind process. During RDL build, the temporary carrier supplies mechanical support for the thinned substrate. After solder ball mount, the carrier is released and the molded wafer is singulated. In a die-down configuration with the active area facing down (eWLB), the temporary carrier is removed after the molding process thus exposing the contact pads for RDL build and solder ball mount. EMC is available in different forms, each having advantages and disadvantages. Liquid EMC offers improved handling and fill, with improved flow and fewer defects, yet it can be challenging to achieve perfect homogeneity. Granulated EMC addresses this issue, but, as a particulate contamination risk, it is not conducive to a cleanroom environment. Solid EMC, applied as a pre-formed sheet, comes with its own challenges, being highly tacky and therefore difficult to handle, yet it may reduce wafer shrinkage and die shift during the cure process. These practical considerations may be overcome or forgiven if one type offers significant relative advantages with respect to key performance considerations, such as reducing die shift and minimizing composite wafer warpage. Accordingly, the EMC type will be an experimental factor in this work. Regardless, these reconstituted wafer processes produce a package that is lower in profile, eliminates the need for an inorganic substrate, and are a cost-effective way to produce chip packages that are thinner and faster without the need for interposers or through-silicon-vias (TSV). The ideal chip attachment scheme should minimize lateral movement of the die during over-mold (die shift) and also minimize vertical deformation of the bonding material. Vertical deformation of the bonding material results in die protrusion from the reconstituted wafer surface and must be prevented or designed around, while lateral movement can be mitigated by compensatory die placement if the shift vectors are predictable enough to be modeled. And beyond minimizing die shift, an ideal temporary bonding system should achieve adequate adhesion to the compound wafers without inducing excessive warp, all while permitting a suitable debonding process, including complete residue removal. The attachment scheme must also survive any thermal, mechanical, and chemical processes that are performed prior to carrier release. Thermal release tape (TRT) provides a convenient way to attach die to a carrier prior to over-molding with EMC. However, not all bonding materials are suitable for presentation in tape form, so the material used in the tape may not be the optimal choice. An alternative method is to directly apply temporary bonding material to the carrier substrate. This enables the use of bonding materials with higher melt viscosity and improved thermal stability, resulting in less vertical deformation during die placement, and reduced die shift during over-molding. The bonding material would ideally have high adhesion to the EMC wafer to prevent delamination in the bond line during downstream processing. For chip-first applications, improved chemical resistance during copper plating and lithography processes is also necessary. Stack stress and warpage is a major concern and causes handling and alignment problems during processing. The bonding material and carrier will need to be specifically suited to minimize the effects of stress in the compound wafer. Such materials must balance rigidity with warp, to prevent lateral die shift and deformation, potentially induced by the stress of coefficient of thermal expansion (CTE) mismatch between the carrier and EMC material. Bonding materials must also have enough adhesion to the EMC material to overcome such stress without bond failure. There must also be an associated debond path (such as laser or mechanical release). In this experiment, we will examine various thermoplastic bonding materials in combination with different EMC products, addressing die shift, and deformation (x, y, and z directions) after EMC processing. Bond line adhesion using various bonding materials processed on different carrier substrates will also be evaluated while bonded to embedded EMC after backside thinning and thermal processing for failures related to warpage. Successful pairs will then undergo carrier release using either mechanical release or laser ablation technology.
Michelle Fowler, Principle Applications Engineer
Brewer Science, Inc
Rolla, MO

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