Honeywell

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Future Interconnect Materials and System Integration Strategies for Data Intensive Applications
Keywords: Interconnects, 2.5D, System level optimization
The microelectronics industry is in profound transition, with inflection points accelerating for both technology and the market. As Moore’s Law begins to slow, technology paths and options are getting increasingly complex and divergent for processors, memory, sensors and other devices; and the focus is shifting to systemlevel integration and optimization. In parallel, emerging application drivers like the Internet of Things (IoT) and Artificial Intelligence (AI) are driving a sharp market inflection. This calls innovative collaboration models to reduce cost and improve innovation efficiency by breaking down silos. SEMI has built a collaborative, crosssupplychain technology platform to accelerate industry inflections, and this work reports on our project analyzing future (58 years out) interconnect technologies. Interconnects are increasingly becoming a bottleneck for both performance and power in a variety of circuits and systems, and the ability to interconnect individual components efficiently is becoming critical, particularly for dataintensive applications. This project created unique value and insight by “connecting the dots” across areas that are often siloed from each other – for example, process/design, frontend/ packaging, industry/academia, and modeling/experimentation. We focused on key technical parameters such as performance and power consumption at both the componentlevel and especially the systemlevel. In addition, we examined supplychain issues such as manufacturability, business continuity, environment, safety and health issues (EHS) etc., which can often be showstoppers for commercialization of promising technologies. The following are the insights we have developed for future interconnect materials and integration strategies. • Our analysis indicates that resistivity of onchip narrow copper wires will increase by nearly 500% at the 5nm node, as compared to the bulk of the circuits being manufactured today. Barrier materials (required to prevent Cu electromigration) will worsen this degradation by an additional 200400%. • Using a representative circuit, we determined the corelation between wire resistivity and latency (circuit delay). For example, the latency increases by nearly 300% for a 15um long wire at the 5nm node. One key implication is that optimizing individual components or focusing on onchip interconnects alone will not be sufficient. Instead, the focus must shift to systemlevel optimization – we propose some collaborative models to cooptimize design, process, and packaging in a way that does not typically occur in today’s ecosystem. • Besides technical challenges, we found significant supplychain issues with future interconnect materials being currently discussed in the research community – these include environment, safety, health, pricing, sourcing and other issues. We propose strategies for the industry to address these issues proactively, in order to fully realize the technology benefits. • We performed an objective, unbiased and applestoapples comparison of future 2D and interposerbased (2.5D) technologies for several conventional computing and dataintensive applications. We find that about 46% of total system energy is spent in processor cores being idle – mainly due to lack of available connectivity to memory. Going from 2D to 2.5D improves connectivity by 2X, and doubling the number of microbumps (by reducing the microbump pitch) provides an additional 10% improvement. • We also quantified the ability of technology innovations to “movetheneedle” for specific endapplications. We find that 2.5D technology improves performance and power consumption by about 1015% for conventional computing applications, and about 400% for dataintensive applications. The underlying reason is that much more data needs to move between the processor and memory for dataintensive applications. Thus, they benefit more from the densely connected 2.5D systems. This implies that system integration strategies must be sharply driven by the target application, to ensure it delivers the required performance costeffectively. In summary, we have developed a comprehensive, systemlevel framework for future interconnect materials and integration strategies – including both technical and supplychain parameters. We have identified key challenges, highlighted critical costbenefit tradeoffs, and proposed approaches for accelerating systemlevel innovation and optimization. We have quantified the improvement in endsystem performance for specific applications by tweaking “technology knobs” like the wire pitch or microbump pitch. Our framework can provide critical decisionmaking support for more costeffective allocation of resources. This requires improved coordination across the industry ecosystem, and we suggest innovative collaboration models to achieve this. Finally, we point out future directions to manage and process the exponentially increasing data requirements, both in the cloud and at the edge.
Pushkar Apte,
SEMI
Milpitas, CA
USA


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