Here is the abstract you requested from the imaps_2018 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|Characterization of Fine Pitch Interconnections (<=10um) on Silicon Interconnect Fabric for Heterogeneous Integration|
|Keywords: fine pitch interconnections, silicon interconnect fabric, heterogeneous integration|
|The Silicon-Interconnect Fabric (Si-IF) is a highly scalable platform for heterogenous integration of dielets. We propose a fine-pitch integration scheme where dielets are attached to the Si-IF with fine-pitch interconnects (≤10 µm) at short inter-dielets spacings (≤100 µm) using direct metal-metal Thermal Compression Bonding process (TCB). As a result, short links on Si-IF (≤ 500 µm) are used for inter-dielet communication, reducing the latency to ≤ 35 ps. We experimentally demonstrated the measured insertion loss in these short Si-IF links (≤ 500 µm) is ≤2 dB for frequencies up to 30 GHz. As a result, we show that assemblies on Si-IF have 10-40X lower parasitic inductance, and 7-35X lower parasitic capacitance compared to assemblies on interposers and PCBs. We propose the Simple Universal Parallel intERface for chips (SuperCHIPS) protocol as a physical layer for data transfer that efficiently utilizes the fine pitch Si-IF technology. Using SuperCHIPS protocol, data rates of ≥ 10 Gbps/link are realizable at an energy/bit of ≤0.04 pJ/b. Further, the aggregate bandwidth/mm is ≥ 8 Tbps/mm. This corresponds to an improvement of 120-300X in bandwidth/mm and a reduction of 100-500X in energy/bit compared to conventional systems.|
|SivaChandra Jangam, PhD Student
Los Angeles, CA