Here is the abstract you requested from the dpc_2019 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|Automated Daisy Chain Generation and Verification|
|Keywords: Daisy Chain, Package test, Flip chip validation|
|Daisy chain connectivity is created in test chips used to validate manufacturing processes. A daisy chain is the shorting of pins between a test chip and a test package substrate using an alternating pattern of connecting two pins in the die then two pins in the package and so forth, till all the selected pins are connected alternatively between the die and the package. Creating a daisy chain is typically a manual process requiring manual creation of the path, and duplication of routing layers between devices. This session describes the automatic creation of daisy chains in both the die and the package, enabling visibility of the daisy chain in both the substrates at the same time using the multi-board functionality. This functionality not only creates the complete daisy chain, but also allows for automatic refresh and update of the daisy chain as design needs vary. Finally, daisy chain verification techniques are described.|
|Tom Whipple, Solutions Architect