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Study of Thermal Stress in Nano Silver Bonded Silicon Substrates for High Temperature Applications
Keywords: high temperature, thermal stress, simulation
High temperature power electronic devices and sensors have been a wide range of application in several fields such as deep-drilling equipment, gas turbine engines, aircrafts and space exploration systems. These SOI (silicon on insulator), SiC (silicon carbide) or GaN (gallium nitride) devices are operated at temperatures higher than 300ºC. There is a clear need for thermostable die-attach materials and reliable bonding methods that meet the requirements for harsh environment operations. However the conventional materials for die attach such as adhesive and solder are not suitable for high temperature applications as they are not thermally stable at high temperatures since the melting points of solders are usually below 300 ºC. Compared with traditional die-attached materials, silver nano particle paste has attracted much attention in recent years. Many studies have been carried out to evaluate the characteristics of the silver nano particle paste materials [1-2]. The melting point of the sintered silver layer is near that of bulk silver at 961ºC, which can meet the requirement for high temperature operation. The sintered silver joints also have high thermal conductivity and low resistivity. Therefore, silver nano particle paste has been an interesting die-attached material for high temperature power devices and sensor packaging applications. In our previous work, a laser-assisted sintering technique was studied by joining silicon substrates [3]. The silver nanoparticle paste (NanoTach-X) from NBE Tech LCC was used to bond silicon to silicon to study the die- attach process. It was shown that successful bonding using the nano silver material could be realized at a laser power of 70W and a very short sintering time of 5 minutes. In this paper, we focus on study of the thermal stress in the sintered silver joint. Thermal stress is mainly caused by the coefficient of thermal expansion (CTE) mismatch, which is an important factor determining the high temperature reliability of the devices. The relationship between the thickness of the sintered nano silver layer and the thermal stress is studied by numerical simulation using a finite element method. The dimension of the silicon chip is 2mm×2mm×0.6mm, and the dimension of the silicon substrate is 5mm×5mm×0.6mm. The elastic modulus of the sintered silver die-attached layer is lower than that of bulk silver. Based on data from the manufacturer of the nano silver paste material, the elastic modulus of sintered silver die-attached layer is chosen to be 30GPa. The other material properties are obtained from the literature [1,4]. Stress reduction by plastic deformation of the silver layer is not taken into account and the substrate is assumed to expand in all directions. The temperature difference (ΔT) between the sintering (bonding) temperature and the operation temperature is considered to be 30ºC, 60ºC or 90ºC, respectively. The silver die-attach layer thickness is assumed to be 10μm, 50μm, 100μm, 150μm or 200μm, respectively. The simulation results show that as ΔT increases the interface stress increases quickly (rising from ~20MPa to ~60MPa). The simulation results also show that the average stress at the interface of the silver layer and the chip decreases with increasing thickness. However, the stress in the silicon chip will increase with thickness of the silver layer. According to the results of our previous shear stress test, the interface between the chip and the sintered silver die-attached layer is usually the weakest point [3]. While the stress in the chip may cause the output characteristics to drift [5]. Therefore, it is important to select a suitable thickness of the nano silver- based die attach layer.In order to verify the thermal stress simulation results, we will make silicon to silicon samples using different thicknesses of the nano silver layer and conduct thermal stress test at different operation temperatures. The results will be presented at the conference along with the results of the simulation work.
G.D. Liu & C.H. Wang,
Heriot-Watt University
Edinburgh, Edinburgh
UK


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