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Keywords: High Power LED, Thermal Management, Package Design
Due to the plethora of advantages that are offered by Light Emitting Diodes (LEDs) such as high energy efficiency, design flexibility, long term reliability, and compact design, the demand for high power LEDs has greatly increased. The electron-hole recombination within the LED die due to the passage of electric current generates a tremendous amount of heat. If the heat generated is not removed, it will degrade the optical performance and the overall reliability of the LED. Therefore, it is important to provide an efficient package and system level thermal design to ensure that the LED package is maintained at acceptable temperatures. This research is mainly concentrated on the evaluation of the thermal performance of an LED package manufactured using GEs Power Overlay Kilowatt (POL-kW) packaging technology. The research is conducted by using both modeling and experimental analyses. Initially, thermal modeling/simulation software will be used to study the thermal performance of prototype designs with different substrates and geometry designs. Subsequently, the simulation of the prototype designs will be validated by experimentally measuring the surface LED temperature using infrared (IR) microscopy. The LED package studied in this research makes use of a flip-chip LED die which is first attached to a polyimide substrate using an adhesive. This process is followed by drilling vias directly underneath the contact pads of the LED die and later electroplated with copper to establish both a thermal and electrical contact. Therefore, the form factor and the thermal path of the LED package is substantially reduced. Despite the low thermal conductivity of polyimide, it is chosen for the prototype LED package as it allows thin and flexible packaging and is a cheaper alternative to ceramic substrates. Based on the preliminary findings, it appears that an increase in via size coupled with a decrease in contact pad thickness leads to a reduction in the junction-to-package thermal resistance. Furthermore, no additional heat spreading is observed when the area of the contact pad is extended beyond the size of the thermal vias. Also, geometry designs with via configurations that deliver a larger via-to-LED-die ratio resulted in lower temperatures and lower junction-to-package thermal resistance values. For the current packaging technology, the low thermal conductivity of the polyimide substrate and adhesive is the most significant bottleneck in the effective thermal management of the LED package. Therefore, effective thermal management can only be achieved by optimizing the size, pitch, and location of the vias in the LED package.
Anisha Walwaikar, Research Assistant
Binghamton University
Binghamton, New York

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