Here is the abstract you requested from the imaps_2019 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|Characterization and Electrical Performance of Glass Diplexer Modules|
|Keywords: interposer, TGV, glass substrate|
|A process has been developed to manufacture a glass diplexer module using conventional laminate circuit board processes that have been adapted to handle fragile glass substrates. Over the past few years we have evaluated both Cu plating and electrically conductive adhesives (ECAs) to produce a through glass via (TGV). From this work, it has been determined that Cu plating is a preferred process to form a robust TGV in a manufacturing environment. A Cu plated TGV nicely compliments our semi-additive plating (SAP) processes to produce fine line Cu circuitry on both sides of a glass substrate. In addition, we have successfully laminated an Ajinomoto Buildup Film (ABF) to both sides of a glass substrate having TGVs. The ABF completely filled the vias and also maintained uniform flatness on both sides. The resulting interposer was very flat and suitable for the next level of Cu plating using SAP. The ABF material was able to form high quality blind vias using laser drilling. A more comprehensive characterization of the glass diplexer modules will be presented, which will include X-sections of a double-sided Cu circuitry and Cu MIM (metal- insulator-metal) capacitors and inductors. In addition, the first set of electrical test data will be presented and compared with the modeling work done to date.|
|Charles G. Woychik, Chief Scientist
i3 Electronics, Inc.