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How to secure the fabrication of Gallium Nitride on Si wafers
Keywords: Gallium Nitride, Inspection, Phase Shift Deflectometry
Gallium Nitride (GAN) was originally known for Light Emitted Diode since early ’90 and later for high frequencies and high-power devices. Thanks to its dynamic chemical and electrical properties like higher power density and thermal conductivity, GAN has been adopted in various switch devices and its market expected to grow through at a CAGR > 17% year over year [1]. For several years metal oxide semiconductor field effect transistors (MOSFETs) were used as main source of power supplies. MOSFETs are typically used in data center, but one of the major limitations of MOSFET is that several intermediate steps are needed to convert the voltage from the incoming 48V to 1 V. GAN based power supplies can transform almost instantaneously 24V in 1V without requiring any intermediate conversion steps and this is one of the main reasons of GAN booming today in power industry. At current state, the industry is moving from pilot lines at R&D centers to true mass production. Therefore, there is an increasing demand of quality control solutions to secure the fabrication of GAN on Si devices in high volume manufacturing [2]. GAN substrates are very fragile because they are thin and very sensitive to production conditions. Wrong level of doping or non-proper process temperature can generate slip-lines that are almost non visible with traditional optical inspection methods, while they can deteriorate the reliability of the device. Chips and cracks at wafer edge can also occurs with tremendous effects on the wafer integrity. To secure the fabrication, we developed Soft Handling solution using only gravity or Bernoulli handling all along the inspection process. Since wide type of defects are existing on GaN substrates, we combine different technologies on the same inspection tool to detect all killer defects on frontside, backside and even edge of the wafer. Phase Shift Deflectometry (PSD) technology is a unique and powerful approach to perform high throughput full wafer surface macro inspection. It allows detecting topographic defects with only few nanometers height range, on wafer frontside and backside surfaces. Combined with wafer reflectivity and global topography results, this technology provides a reliable and acknowledge method to perform a full wafer surface characterization of thin to thick wafer, allowing detecting defects such as slip-lines, comets, grinding marks, star cracks. As complementary technology, the Confocal Chromatic technology is used to perform the wafer edge inspection (Top, Top Bevel, Apex, Bottom Bevel, Bottom), allowing a combination of high lateral resolution system with a large depth of focus. The edge inspection can detect typical edge defects as chips, shells, cracks, contamination area that can propagate on the wafer during process stress conditions and damage the dies. PSD and Confocal Chromatic inspection were fully adopted as reliable control by IGBT makes and Silicon On Insulator substrate makers [3]. In this paper, for the first time we present inspection results obtained on 200 mm GaN wafers that were processed with different fabrication conditions. We demonstrate the improved performances in term of slip-lines detection as compared with previous generation systems. In addition, we investigated the correlation between the appearance of the defects and their morphology. At this aim, detected defect were reviewed with an optical metrology/review system equipped with NIR/VIS microscopy and Full Filed White light Interferometry to reconstruct the shape of the defects in 2D and 3D.
Dario Alliata, Director Business Unit
UnitySC
Montbonnot-Saint-Martin, Isere
France


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