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System I/O Optimization with Chip, Package, PCB Co-Design.
Keywords: package-on-package design, PCB design, 3D design
The increasing complexity of system on chips (SoCs) combined with a new generation of designs that combine multiple chips in a single package is creating new challenges in the design of packages, printed circuit boards (PCBs) and integrated circuits (ICs). The process typically involves three independent design processes � chip, package and PCB � carried out with point tools whose interface requires time-consuming manual processes that are error-prone and limit the potential for reuse. This challenge is being addressed by a new integrated 3D chip/package/board co-design environment that makes it possible to holistically optimize the package, board and IC design to a greater degree than was possible in the past by considering the system-level impact of each design decision. The new co- design approach enables designers to optimize routability via pin assignment and I/O placement to achieve minimum layer counts between chip, package and board. The end result is higher performance.
Humair Mandavia, CSO
Zuken, Inc
San Jose, California
United States

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