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Advancing Microelectronics • Volume 29, No. 4 • July/August, 2002
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Professional Development Courses (PDCs)

Tuesday, September 3, 2002

PDCs on Tuesday will be held at the Colorado Convention Center

Do you want to broaden and strengthen your skills and knowledge, optimize your manufacturing processes, and integrate the latest advances in materials and technologies to maintain your strength in today’s competitive global market? The Technical Committee of IMAPS is pleased to present a comprehensive offering of professional development courses that provide detailed information on topics of immediate interest to the Microelectronics and Packaging community. So please be sure to choose from the fifteen full day and two half-day in-depth technical workshops taught by recognized industry experts. You will discover the following key ways you will benefit…

· Better understand the industry’s fundamental skills and knowledge.

· Be exposed to the rapid expanding developments in new materials and technologies.

· Consult with renowned authorities about your current R&D or manufacturing problems and challenges.

· Learn new ways to identify, think about, and address your problems and opportunities.

· Great opportunities to interact with industry experts and other course attendees.

· Certificate of Attendance and much more…


Wire Bonding in Microelectronics


George G. Harman, National Institute of Standards and Technology

Course Description:

Wire bond manufacturing defects range typically from about 1000 to 100 ppm, with exceptions to >10,000 and <50 ppm. In order to achieve the lower numbers in production, one must understand all of the conditions that affect both bond yield and reliability (since they are interrelated). This course will discuss many large- and small-wire bonding problems, as well as subjects of specific interest to hybrid/MCM device bonding. In addition, a number of advanced topics, such as high yield, fine pitch, and flex bonding will be covered. New developments (e.g., high frequency ultrasonic bonding), are included along with a major discussion of wire bonding to multichip modules and other soft substrates.

Wire bond testing and metallurgy (covering both aluminum and gold bonds); intermetallic compounds; cleaning for yield and reliability; failures resulting from electroplating; mechanical problems in wire bonding; new bond technologies and developments; how ultrasonic bonds are formed, and the metallurgy of gold and aluminum wire. It concludes with methods of implementing TAB and Flip Chip by using wire bonding techniques.

Who should attend?

Engineers in R&D, QA, QC, manufacturing, process development, and advanced technicians. It is assumed that participants have some familiarity with wire bonding and general device assembly technologies.

Special course materials:

All attendees will receive a complimentary copy of Wire Bonding in Microelectronics, by George Harman, McGraw Hill, NY, 1997 (List price $65), as well as course notes and explanations.

Mr. Harman is a Fellow of the National Institute of Standards and Technology (NIST), Department of Commerce. He received a BS in Physics from Virginia Polytechnic Institute & State University and a MS in Physics from the University of Maryland. Mr. Harman has published 50+ papers, two books on wire bonding, and holds four U.S. Patents. He was the 1995 President of ISHM and is a Fellow of IMAPS and the IEEE. He has received numerous awards for his work from IMAPS, IEEE, DVS and others. He has presented numerous talks, and has taught courses for the University of Arizona and IMAPS for over 15 years, as well as the IEEE, to name a few. He has presented many papers and given courses in the USA, Europe, and Asia.


Metal Plating for Electronics


Michael McChesney, McChesney, Inc.

Course Description

Electroplated finishes provide environmentally sound and cost effective contacts and coatings for most electronic components and systems. Plating also plays a role in hybrid fabrication and assembly and semiconductor bonding. This course will provide a foundation in electrolytic and electroless plating of precious metals, copper, tin and tin/lead. Also covered will be plating for corrosion protection and testing of electro-deposited coatings.

Who should attend?

This course is appropriate for design, process and applications engineers and technicians as well as sales personnel and those who specify, purchase or inspect plated components. Newcomers to the field or those who wish to broaden their knowledge of plating terminology, process specifications or the surface finishing processes involved in component manufacturing will find the course worthwhile.

Mike McChesney has worked in the surface finishing field for 33 years as both a production engineer and in process development and retired from the Avionics Division of Honeywell Inc. He has a BS in Chemistry and MS in Physics. He is a certified electroplater/finisher and a specialist in electronic finishing. He is an instructor for the American Electroplating and Surface Finishing Society and the College of St. Thomas. He now works as an independent consultant in the area of surface finishing.


Technology of Screen Printing


Art Dobie, SEFAR America & Rudy Bacher, DuPont

Course Description:

The purpose of this course is to increase the understanding of the screen printing process thereby improving production yield and quality. The critical and integrated components for screen, such as frames, screen mesh and emulsion are presented. Presented are some of the latest advancements in the screens, the compositions and the printing process that enable screen printing to meet future circuits density requirements.

The course is applications-oriented in terms of how to optimize the screen printing process; how to specify and use screens; rheology properties that affect the print; minimizing printing defects and trouble-shooting problems related to the screens and the printing process.

Who should attend?

This course is intended for production and process engineers, and others interested in learning how to optimize and increase the uses of the screen printing process.

Art Dobie is Manager of Technical Service and Marketing and a member of the senior management team of SEFAR America (MEC) in Mount Holly, NJ. He has been with MEC more than 18 years since receiving his BS in Screen Printing Technology in 1980 from California University of Pennsylvania’s School of Science and Technology. Art is an original instructor of IMAPS’ Technology of Screen Printing Professional Development Course, and has delivered many technical papers and presentations relating to screen printing technology to the microelectronics industry at the local, National and International levels. He is a Senior Member of IMAPS and has held numerous offices in the Keystone Chapter, including president. Art Dobie was Co-Chair of Exhibits for ISHM ‘97 and initiated the IMAPS Educational Foundation Silent Auction. On October 7, 1998, Art was inducted into the Academy of Screen Printing Technology, a body of 50 technical authorities representing the highest plane of technical expertise in the screen printing industry.

Rudy Bacher has worked 37 years in Thick Film Technology for DuPont Research and Development as a Ceramic Engineer and currently as a Development Associate. He is a recipient of the ISHM Technical Achievement Award-1984; Corporate Marketing Excellence Award-1994; and is an IMAPS Instructor “Technology of Screen Printing” 1990-1998.


Implementing Microvias and Embedded Passives


Rolf E. Funer, Funer Associates

Course Description:

New PCB designs are increasing in density and requiring more and more component placements, more I/Os, tighter dimensions. Microvias can dramatically reduce board size, increase I/O count and reduce layer count. The numbers of passives (resistors and capacitors) are increasing dramatically. By embedding the passives directly in the circuit board, valuable surface area can be saved. Performance, particularly at high frequency, can be improved. These new technologies can work together to cut weight and size and therefore enable high density substrates. But can these concepts be implemented today? Or are they future technologies? This workshop addresses these issues, reviews all the currently available materials and processes to make microvias and embed passives. Design and testing issues, performance, reliability, applications and economics are all covered. The design and project managers attending this course will come away with an informed view if their designs are ready for microvias and embedded passives and if microvias and embedded components are ready for them. PCB manufacturing and development engineers will learn what they will need to do to implement these technologies.

What you will learn:

· Major microvia processes: their capabilities, costs, reliability and availability

· Applications of microvias to reduce size, layer count and cost

· Suppliers: US and worldwide

· Embedded passives: currently available materials. How to process, capabilities, benefits and limitations

· New and emerging passive materials: their status and potential

· Applications and how they are working out

Who should attend?

This course will be valuable to those considering the use of microvia in their product or are contemplating manufacturing microvia boards. It is also valuable to hybrid engineers as microvia technology is considered an alternative or complement to traditional hybrid circuitry.

Rolf Funer has over 20 years experience in interconnect materials development, printed circuit and hybrid fabrication. Dr. Funer is the principal consultant for Funer associates. His clients include leading OEMs, circuit and electronic materials manufacturers. Previously, he was Chief Technologist, Circuits and Packaging for AMP, Inc. and prior to that served as AMP Circuits’ Technical Director, responsible for development of new and advanced circuit technologies including installation of one of the first microvia plants in the US.


Advanced Organic Substrate Package Design & Manufacturing for RF & Broadband Applications


Hassan Hashemi, Rockwell Semiconductor

Course Description:

The objectives of this course are to review design and manufacturing practices and tradeoffs affecting current and next generation RF & GHz Packaging using laminate substrate technologies in single or multiple die packaging format. The course material is primarily based upon the instructor’s experience on current practices used for Wireless & GHz IC packaging for Internet infrastructure applications. The course is designed for engineers or engineering managers who want to understand more about laminate single or multichip modules, and the unique requirements for assuring that packages can be manufactured in a high volume commercial application and meet stringent electrical and thermal performance requirements.

Who should attend?

The course is intended for both the packaging expert (Electrical and Mechanical Engineers) as well as persons new to the field. The course will concentrate on extending the existing organic substrate infrastructure capability to GHz high volume packaging applications. The information presented will include the theoretical background with practical methods for implementing a design. These same techniques can be applied to other high frequency single or multichip designs.

Hassan Hashemi is Director of Advanced Packaging at Conexant Systems, Inc. in Newport Beach, California. He is currently managing design and development of single and multi-chip packages for broadband digital, mixed-signal, and RF devices used in personal communication applications. He holds a Masters degree in electrical engineering from the University of Texas at Austin, and has over 16 years of experience in microelectronics package design, manufacturing, and product development. Prior to joining Conexant, he was a senior member, technical staff at Microelectronics and Computer Corp. and Advanced Micro Devices. He holds 10 US patents, has authored three book chapters and over 40 technical papers in the areas of high speed package electrical and thermal design and implementation.


Fundamentals of Fabrication and Packaging of MEMS and Related Micro Systems


Ajay P. Malshe, Ph.D., University of Arkansas - HiDEC

Course Description:

MEMS and related micro systems are typically divided into two application areas, sensors and actuators for range of application such as automotive, biomedical, optical, RF, etc. Fabrication and packaging of micro electromechanical systems (MEMS) is the subject of immense interest. Their packaging with other components is challenging and unlike IC packaging, have a different set of demands from releasing, dicing to interconnection at chip-scale and manufacturing at wafer-level. This course will address fabrication and packaging of silicon and non-silicon MEMS and related microsystems. The course will use examples of various novel applications to elaborate the use of various fabrication and packaging processes.

Who should attend?

The course is meant for industry and academic leaders in science and engineering with interest in MEMS and related micro systems. Graduate students with special interest in the above areas will also find it useful. Highly recommended for R&D scientists, engineers and managers involved in sensors, actuators, instrumentation and systems related to microsystem technology.

Ajay P. Malshe, is an Associate Professor at the Department of Mechanical Engineering and an adjunct faculty member at the High Density Electronics Center (HiDEC), Department of Electrical Engineering, University of Arkansas, USA. His three distinct fields of research and educational interest are integration and advanced packaging of micro and nanosystems, surface engineering of materials for advanced manufacturing, and human-machine interfaces. He has edited two proceedings, and authored one book chapter, over one hundred refereed publications and holds four patents. He is currently an active member of International Microelectronics And Packaging Society (IMAPS) through the organization of Advanced Technology Workshops (ATW) on MEMS Packaging. Currently, he is Chairman of Thermal Management Technical Sub-committee and also, National Chair of Topical Technology Workshops for IMAPS.


Flip Chip and CSP Technologies – Constructions, Materials, Assembly and Reliability


R. Wayne Johnson, Ph.D., Auburn University

Course Description:

The increasing number of I/O per semiconductor chip combined with the product driven requirements of thinner, smaller and lighter weight have lead the electronics packaging and assembly industry to chip scale packages and flip chip (Flip Chip in Package (FCiP) and Flip Chip on Laminate (FCoL)) technologies. In fact, many CSPs use FCiP constructions. This course will begin by examining the drivers for flip chip and CSP technologies then examine the options, their construction and trade-offs. 3-D CSPs will also be examined. Substrate design requirements will be discussed including routing, and pad design. Major assembly issues are flux selection for flip chip, solder paste printing for CSPs, underfilling, if necessary, and inspection. Underfilling which is not a traditional SMT assembly process is required for flip chip and often for CSPs. The underfill process and material options for flip chip and CSP will be examined. Recently, wafer applied underfill material concepts for FCoL assemblies have been discussed and this new technology concept will be explored. The replacement of leads by solder spheres impacts reliability, particularly in thermal cycling and bending, and must be considered prior to implementing these technologies. The course will conclude with a discussion of reliability.

Who should attend?

This course is intended for those individuals soon to be responsible for implementing flip chip assembly, suppliers of materials and equipment for flip chip assembly and others interested in flip chip implementation.

Dr. Johnson is an Alumni Professor of Electrical Engineering at Auburn University and Director of the Laboratory for Electronics Assembly and Packaging (LEAP). At Auburn, he has established teaching and research laboratories for advanced packaging and electronics assembly. Research efforts are focused on materials, processing, and reliability for electronics assembly. He has worked in MCM design, MCM-L, -C and -D substrate technology as well as advanced SMT, wire bond and flip chip assembly techniques. He has published and presented numerous papers at workshops and conferences and in technical journals. He has also co-edited one IEEE book on MCM technology and written two book chapters in the areas of silicon MCM technology and MCM assembly. He received the 1997 Auburn Alumni Engineering Council Senior Faculty Research Award for his work in electronics packaging and assembly. Dr. Johnson is the current Technical Vice President of IMAPS and was the 1991 President of the Society. He received the 1993 John A. Wagnon, Jr. Technical Achievement Award from ISHM, was named a Fellow of the Society in 1994 and received the Daniel C. Hughes Memorial Award in 1997. He is also a member of IEEE, SMTA, and IPC. Dr. Johnson received the B.E. and M.Sc. degrees in 1979 and 1982 from Vanderbilt University, Nashville, TN, and the Ph.D. degree in 1987 from Auburn University, Auburn, AL, all in electrical engineering. He has worked in the microelectronics industry for DuPont, Eaton, and Amperex.


Lead Free Soldering – Status Review and Process Challenges


Ning-Cheng Lee, Indium Corporation of America

Course Objectives:

In this course, all current vital options for lead-free solder replacement will be reviewed and compared, with strengths and limitations for each option well analyzed. In particular, the major challenges encountered in implementing lead-free soldering will be presented, including defect mechanisms analysis. With the information provided by this course, the users will be able to decide when and what to do with lead-free soldering implementation according to each specific situation.

What You Will Learn

This course will provide you with the ability to:

· Keep abreast of current lead restriction legislation activity

· Be informed about the Pb-free roadmap of major industrial manufacturers

· Review the options of lead-free replacement

· Realize the strengths and limitations of each option

· Recognize the challenges in implementing lead-free soldering

· Understand the defect mechanisms encountered at lead-free soldering

· Determine the proper move toward lead-free soldering

Who Should Attend?

This course is intended for engineers, supervisors, managers, directors, safety staff, scientists, technologists, and technicians who are involved in implementing lead-free solder selection, soldering process work, or in guiding corporate safety and corporate major directions.

Dr. Lee is the Vice President of Technology of Indium Corporation of America. He has been with Indium since 1986. Prior to joining Indium, he was with Morton Chemical and SCM. Dr. Lee has more than 17 years of experience in the development of fluxes and solder pastes for SMT industries. In addition, he also has very extensive experience in the development of high temperature polymers, encapsulants for microelectronics, and adhesives. Dr. Lee has given numerous presentations and short courses worldwide on those subjects at many international conferences. Dr. Lee received his PhD in polymer science from the University of Akron in 1981 and a BS in chemistry from the National Taiwan University in 1973.


Design Failure Mode Effects Analysis for Reducing Design Defects


Mary McDonald, ISO/QS, Inc.

Course Description:

Failure Mode Effects Analysis, or FMEA, is a widely used tool for determining, before the design is finalized, whether the design can be improved (more robust, more cost effective, etc.). This is accomplished by analyzing the design to determine where improvements can be made, or by understanding the risk of the current design.

Course setup: The concept will be taught, then attendees will break into small groups to implement a generic Design FMEA problem, to learn the mechanics first hand. A second example, relating to Electronic Packaging, will be given to demonstrate how the technique can be applied in their facilities.

This course can be taken alone, or in conjunction with Process FMEA.

Who Should Attend?

All areas of a facility use this technique, so anyone involved in preventing problems (or solving them) would find this technique useful. Engineers involved in Design, Reliability, Process, New Product Introduction, Product, etc. as well as employees involved in material specifications, testing, warranty, and end of life determination.

Mary McDonald is President/Principal of Individual Solution Options/Quality Services, Inc., a full service consulting and training enterprise located in Austin, Texas. Since 1995, ISO/QS has been serving the hi technology, automotive, and service industries by providing money-saving techniques to improve the bottom-line. Mary is a Project Management Master; IMAPS Fellow; Past President, Malcolm Baldrige Examiner; and Quality and Environmental Management Systems Certified Auditor. Prior to opening her own company, she was Director of Quality, Environmental, Safety, and Health at Electrosource in San Marcos, TX; and a Senior Engineer at IBM’s upstate NY facilities, where she worked as a NPI engineer, Quality Assurance/Reliability Engineer, Engineering Manager, and coordinator for their ISO 9001 registration. She has presented over 20 papers at IMAPS and other conferences, and is a frequent invited speaker.

Friday, September 6, 2002

PDCs on Friday will be held at the Adam’s Mark Hotel

Noon - 6 pm; Lunch at 11 am


Process Engineering Fundamentals


Thomas J. Green, National Training Center for Microelectronics

Course Description:

The objective of this course is to teach the fundamental process engineering tools and techniques needed for the microelectronics packaging industry. The focus of this course is to provide an overview of the skill sets required to effectively control and optimize a microelectronics manufacturing process flow. The course begins with a review of the common materials and manufacturing processes used in the hybrid microelectronics industry including common assembly processes for RF MMIC modules and optoelectronic devices. Next, process characterization and statistical methodologies are introduced with a focus on practical applications. The basic concepts of Design of Experiments (DOE) including set up and analysis of a simple industry fractional factorial experiment is covered. Statistical Process Control (SPC) techniques and sample charts are also reviewed with a special emphasis on Cp and Cpk calculations. Finally, industry accepted Defect Recognition and Workmanship Standards are presented. Clear color photos of excessive probe marks, chipouts, air bridge damage, die attach and wirebond defects along with numerous other defects will be presented to the class and discussed in detail.

Who should attend?

This PDC is intended as an introduction to intermediate level course for process engineers, designers, quality engineers, and experienced technicians responsible for microelectronics materials and process development and manufacturing process improvements.

Tom is a Technical Director at the National Training Center for Microelectronics. At NTCµ he designs curriculum and teaches industry short courses relating to advanced microelectronics manufacturing processes. He has over twenty years experience in the microelectronics industry at Lockheed Martin Astro Space and USAF Rome Laboratories. During that time period he was a staff engineer responsible for the materials and manufacturing processes used in building custom high reliability space qualified microcircuits (Hybrids, MCMs and RF modules) for military and commercial communication satellites. Tom has demonstrated expertise in wirebonding, component attach, and seam sealing processes. He has conducted and analyzed numerous statistically designed experiments, which increased first pass yield, reduced costs and improved product quality. At Rome Labs he worked as a senior reliability engineer and analyzed component failures from AF avionics equipment. Tom is an active member of the IMAPS at both the regional and national level; he is currently serving as the Keystone chapter president. He has published seven technical papers and is a member of the IMAPS National Technical Program Committee. Tom earned a B.S. in Metallurgy and Materials Engineering from Lehigh University and a Masters in Engineering from University of Utah.


Advanced Materials for Microelectronics, Optoelectronic and MEMS/MOEMS Packaging and Thermal Management


Dr. Carl Zweben, Advanced Packaging Materials and Composites Consultant

Course Description:

Materials selection impacts performance, reliability, manufacturing yield and cost. Increasingly, traditional packaging materials are failing to meet the requirements of new microelectronics, optoelectronic and MEMS/MOEMS packaging designs. In response, numerous advanced composites and monolithic materials have been, and are continuing to be developed. Property improvements include:

· Thermal conductivities ranging from extremely high (over four times that of copper) to very low

· Low, tailorable coefficients of thermal expansion

· Electrical resistivities ranging from very low to very high

· Extremely high strengths and stiffnesses

· Low densities

· Low cost, net shape fabrication processes

Payoffs include:

· Improved thermal performance

· Reduced thermal stresses and warpage

· Improved fiber alignment

· Simplified thermal design

· Possible elimination of heat pipes

· Weight savings up to 80%

· Size reductions up to 65%

· Increased reliability

· Reduced electromagnetic radiation emissions

· Increased manufacturing yield

· Potential cost reductions

Advanced materials, such as Al/SiC metal matrix composites and carbon fiber-reinforced polymer matrix composites, are now being used in a growing number of high volume commercial and aerospace production applications at the rate of millions of piece parts annually. Components include optoelectronic packages, carriers, heat spreaders, microprocessor and PWB heat sinks, solid and flow-through PWB cold plates, microwave modules, power semiconductor modules, and heat pipe overmolds. Products using these materials include servers, DSPs, cellular telephone handsets and base stations, laptop computers, hybrid vehicles like the Toyota Prius, trains, wind turbine generators, data storage drives and aircraft and spacecraft electronic systems.

We cover traditional packaging materials and the large and increasing number of advanced materials, including: silicon carbide particle-reinforced aluminum (Al/SiC) and copper; carbon fiber-reinforced polymer matrix composites; aluminum and copper reinforced with discontinuous and continuous carbon fibers; diamond particle-reinforced aluminum, copper and silicon carbide; beryllia particle-reinforced beryllium; discontinuous carbon-graphite-reinforced aluminum; silicon-aluminum; silver/“Invar;” carbon/carbon composites; pyrolitic graphite; thermal pyrolitic graphite; “ThermalGraph;” silicon carbide/silicon and others.

This course provides an in-depth discussion of the materials, their properties, the processes by which they are made, and where they are being used. We also look at future directions.

Who Should Attend?

Engineers, scientists and managers involved in microelectronics, optoelectronic and MEMS/MOEMS packaging design, production and R&D, packaging material suppliers.

Dr. Zweben, an independent consultant, has directed development of advanced packaging materials for over 30 years. For many years he was Advanced Technology Manager and Division Fellow at GE Astro Space, later acquired by Lockheed Martin, where he directed the Composites Center of Excellence. Other affiliations have included Du Pont, Jet Propulsion Laboratory and the Georgia Institute of Technology NSF Packaging Research Center. Dr. Zweben was the first, and one of only two winners of both the GE One-in-a-Thousand and Engineer of the Year awards. He is a Fellow of ASME, ASM and SAMPE, an Associate Fellow of AIAA, and has been a Distinguished Lecturer for AIAA and ASME. He has published and lectured widely on advanced packaging materials and composites.


RF/Microwave Hybrids: Basics, Materials and Processes


Richard Brown, Richard Brown Associates, Inc.

Course Description:

In recent years, the development of wireless communications systems and products has been growing at a rapid pace. Coupled with this is the development of monolithic integrated circuits, MMICs. As a result, system and product designers are faced with the choice between hybrids and MMICs; i.e., complete system on a chip vs. hybrids with discrete devices, or more often, somewhere in-between.

This course will begin with a comparison of MMICs and hybrids. It will then cover some of the basic concepts necessary to appreciate the materials and processing demands placed on manufacturing high frequency circuits. The need for impedance matching as operating. The three basic planar waveguides will be discussed, illustrating how fields determine trace geometry and impedance. The basic materials (conductors and substrates) and their properties will be reviewed, and their effect on circuit properties and performance will be discussed. Processing technologies, particularly thick and thin film, suitable for RF/microwave hybrids will be reviewed. The relation of processing strategies to their applicability to high frequency requirements will be discussed. The effect of processing on passive and transmission line components in the context of RF/Microwave hybrids will be explored and packaging, especially with respect to inductance will be explored.

Who Should Attend?

This course will benefit all those with entering the RF and microwave arena. In particular this course will benefit those with responsibility for design and manufacturing of RF/microwave hybrids. Supervisors, engineers and technicians involved in product development, design and manufacture should plan to attend.

Richard Brown is a technical and engineering consultant in hybrid manufacturing, with more than 30 years experience, encompassing thin and thick film, electroplating and substrate technologies. He began his career at Bell Telephone Laboratories working on substrate materials and tantalum based thin film circuitry. After joining RCA Solid State in 1968, he worked on all phases of high density, air-insulated interconnect, multi-chip substrates, including vapor deposition, electroplating, laser scribing and beam lead assembly. At the RCA Microwave Technology Center in Princeton, NJ, he developed new process technologies for microwave hybrids, including the development of unique high density interconnect technologies. In 1991, Mr. Brown joined an Alcoa Electronic Packaging technology team as program manager to implement thin film on high temperature co-fired ceramic for MCMs. Work for one of his major clients involved the development of a multilayer manufacturing technology on clad, polymer substrates for high frequency communication and radar applications. He holds seven US patents and is the author or co-author of numerous publications including a recent chapter titled, “Thin Film for Microwave Hybrids” in “Handbook of Thin Film Technology,” A. Elshabani-Riad, ed, McGraw-Hill, 1997. Since 1983, Mr. Brown has presented short courses on-site and at various technical societies on RF and microwave hybrids. His text, “Materials and Processes for Microwave Hybrids” was published in 1991 by ISHM.


Integrated Circuit Packaging Trends and Assembly Options - Issues and Concerns


William J. Greig, Greig Associates

Course Description:

This course addresses the impact of both the Integrated Circuit, and End Product requirements (“smaller, better, cheaper”), on packaging, assembly, and substrate interconnects. It focuses on packaging trends, namely, the Ball Grid Array (BGA) and the Chip Scale Package (CSP), Multichip Packaging (MCP) and alternative formats, Chip On Board (COB) and 3-D initiatives at both the chip and package levels. Assembly options available for attachment of the IC in each case will be discussed with major emphasis on Flip Chip. The course also covers the High Density Interconnect (HDIs) substrates. The various substrate technologies (Thick Film, Co-fired Ceramic, and Thin Film) that are employed in the manufacture of packages and component assemblies for MCPs will be reviewed. Finally, the latest developments in PWBs, with high density, fine lines, and microvias employing sequential processing (Build Up Technology – BUT) will be reviewed. Through out the course the technical issues will be emphasized and reliability concerns addressed where appropriate.

Special course materials:

All attendees will receive a complimentary copy of the book, Hybrid Microcircuit Technology Handbook, J. Licari, L. Enlow, 2nd Edition, Noyes Publications, 1998 (List price $125).

Who should attend?

The course provides an overview of microelectronic packaging and assembly and is intended for individuals in any way involved with electronics manufacturing. While introductory in nature, it discusses current status and future trends, it is directed towards both the experienced or inexperienced engineer and technician, and management personnel with the “need to know.” It should be of particular interest to those in support activities such as procurement, quality assurance, marketing and sales, and program office by providing a technology base in support of strategic planning and implementation.

Bill Greig is currently an independent consultant specializing in microelectronic packaging and assembly. His previous work experiences include RCA Semiconductor, General Electric Co., Lockheed Electronics, and NASA. His areas of expertise covers semiconductor wafer processing and assembly, hybrid circuit manufacture, and printed wiring board fabrication. He is experienced in assembly technologies such as chip & wire, TAB, and flip chip. He has been granted 6 patents and has published or presented numerous papers at the various technical symposia. He has developed and presented courses at national symposia and participated in CEE programs at U. of Wisconsin, Lehigh University and Rutgers University. He is a member of SMTA and IMAPS in which he is a Fellow, and Past President of the Garden State Chapter.


Low Temperature Cofired Ceramics (LTCC)


Aicha Elshabini and Fred D. Barlow, University of Arkansas

Course Description

This course is a one-day PDC focusing on the materials, processes, design, and applications of Low Temperature Cofired Ceramics (LTCC). The course will begin with a brief history and background of the technology. A detailed discussion of the process flow and processes will cover each step used in the fabrication of LTCC substrates. A discussion of the material properties and design guidelines and considerations will also be covered in detail. Finally, a discussion of the technical advances and the technical applications of the technology will outline the relative strengths of LTCC for a number of target markets.

Who should attend?

Engineers, managers, and technicians, that desire to expand their background or strengthen their understanding of the technology. The course will not assume any prerequisite background.

Aicha Elshabini is a Professor of Electrical and Computer Engineering. She obtained a B.Sc. in Electrical Engineering at Cairo University, 1973, in both Electronics and Communications areas, a Masters in Electrical Engineering at University of Toledo, 1975, in Microelectronics, and a Ph.D. Degree in Electrical Engineering at the University of Colorado, 1978 in Semiconductor Devices and Microelectronics. Currently, she is serving the position of Professor and Department Head for the Electrical Engineering Department at University of Arkansas (since July 1, 1999), and Interim Department Head for Computer Science & Computer Engineering Department (since July 1, 2000). She has been serving as the faculty advisor for IMAPS student society at both institutions since 1980 to present time. Elshabini is a Fellow member of IEEE/CPMT Society (1993) Citation for ‘Contribution to The Hybrid Microelectronics Education and to Hybrid Microelectronics to Microwave Applications,’ a Fellow member of IMAPS Society (1993), The International Microelectronics and Packaging Society, Citation for ‘Continuous Contribution to Microelectronics and Microelectronics Industries for numerous years.’ Dr. Elshabini was awarded the 1996 John A. Wagnon Technical Achievements Award from IMAPS. She has served as the Editor of the IMAPS International Journal of Microcircuits & Electronic Packaging for 10 years.

Fred Barlow earned a Bachelors of Science in Physics and Applied Physics from Emory University in 1990, a Masters of Science in Electrical Engineering from Virginia Tech in 1994, and a Ph.D. in Electrical Engineering from Virginia Tech in 1999. He is currently working as an Assistant Professor in the Electrical Engineering Department at University of Arkansas. Dr. Barlow has published widely on electronic packaging and electronic materials evaluation and is Co-Editor of The Handbook of Thin Film Technology (McGraw Hill, 1998). In addition, he has written several book chapters including two chapters on thin films and one on components and devices. He has achieved the Outstanding Contribution Award with IMAPS society in recognition of his efforts in developing and implementing the CD-ROM project for IMAPS publications, IMAPS home page on the Internet, and for his technical contributions. He currently serves on the IMAPS national technical committee for power packaging. His research interests include electronic packaging for power electronic and microwave applications as well as RF and microwave design.


Microelectronic Thermal Management


Al Krum, Consultant

Course Description:

This course will provide an introduction into the thermal management of microelectronic components and assemblies. It will address the various packaging approaches available - single chip, hybrid, MCM and circuit card assemblies.

This course starts off with the selection of the materials used in various components. Semiconductors, die attach, substrates, packages, package attach and circuit cards are covered in detail. Tradeoffs in cost, performance and producibility are addressed.

Quantitative methods for determining heat generation in both active and passive components will be presented.

Complete thermal analysis is both time consuming and CPU intensive. This course will provide techniques for doing first order thermal modeling without the need for heavy math. In this rapid modeling technique, the material choices and heat path design can be narrowed down so that subsequent detailed thermal analysis can be more productive.

Techniques for decreasing junction temperatures will be presented with an eye on cost and producibility. Heat spreaders, thermal vias, fans and blowers will be covered. Methods of measuring thermal resistances and thermal conductivity will be presented.

For extremely high power density components, exotic cooling techniques are required to minimize junction temperatures. Micro-channel cooling, thermoelectric coolers and heat pipes are some of the techniques that will be discussed.

The trends in thermal management of microelectronics will be addressed with an emphasis on new materials and processes.

Who should attend?

This course is recommended for engineers, physical designers, project managers, manufacturing personnel, and quality and reliability engineers who are interested in obtaining a firm understanding of the thermal design of microelectronic assemblies without the rigor of the heavy math usually associated with thermal analysis.

Special course materials:

Each student will receive a copy of Thermal Management Handbook for Electronic Assemblies by Jerry Sergent and Al Krum, McGraw Hill, 1998 (List price $90).

Al Krum is a consultant to the microelectronic packaging industry. Previously he was a manager at Raytheon Electronic Systems (formerly Hughes Aircraft Company) with over 30 years of experience in the design, test and manufacture of microelectronic modules. He has lead the design and development of over 200 hybrid circuits including over 50 power hybrids. A much sought after lecturer, Mr. Krum is the author of numerous papers in the field of hybrids and holds four patents. He is an author and coeditor of the Thermal Management Handbook for Electronic Assemblies. In addition, Mr. Krum has written the thermal management chapter in the 3rd edition of Electronic and Packaging Interconnection Handbook. He teaches classes on power hybrids for the University of California Extension and at the IMAPS national symposium. He received his B.S.E.E. and M.S.E.E. from Newark College of Engineering.

1/2 Day Courses

F7 runs Noon - 3 pm;

F8 runs 3 pm - 6 pm

F7 - Noon - 3 pm

Lead-Free Solders – Technology, Selection and Applications


Dr. Jennie S. Hwang, H-Technologies Group, Inc.

Course Description:

This course is to provide the attendees a good understanding of the full spectrum of Lead-free applications and to facilitate the selection of the lead-free compositions, targeting to help the industry implement lead-free electronics. The course covers all of the important aspects and technologies with a practical treatment, ranging from legislation status and alloy selections to manufacturing processes and production issues and to reliability and cost analysis. As a result of 12 years sustained research, a performance comparison of the viable alloy systems in basic materials properties will be presented. Pb-free PCB surface finish and component lead coatings will be separately discussed. The couse will be concluded with a slate of recommendations and application tips. Information is applicable to all types of packages and assemblies including QFP, BGA, flip chip and CSP.

Topics covered:

• Driving forces

• Pb use and concerns

• Legislation status—US, EU, Japan

• Review of the role of Pb in electronics

• Differentiation of solder joint failure modes between SnPb and Pb-free

• Potential elements and general consideration in place Pb

• Pb-free base technology

• Development of Pb-free solder

• Selected alloys and performance

• Example of OEM implementations

• Tin Whisker

• Black pad and fillet lifting issues and solutions

• Pb-free compoent leads coating

• Pb-free PCB surface finish

• Pb-free reflow process key criteria

• Manufacturing factors - cost vs. performance

• Summary of Pb-free alloys and selections

• Recommendations to manufacturers

• Future perspectives

Who should attend?

The course will benefit those who are interested in the development and use of lead-free solders for electronics manufacturing, including researchers, manufacturing engineers, design engineers, quality assurance and materials and safety personnel as well as the management in implementing manufacturing strategies through a general understanding of lead-free electronics.

Special course material:

Each participant will receive a complimentary copy of the newly released book Environment-friendly Electronics: Lead-Free Technology, by Dr. Jennie Hwang, Electrochemical Publications, Great Britian, 2001 (List price $238.00).

F8 - 3 pm - 6 pm

Solder Joint Reliability - Manufacturing Perspectives


Dr. Jennie S. Hwang, H-Technologies Group, Inc.

Course Description:

This course is to provide attendees a proper level of understanding of solder interconnection reliability in material basics, manufacturing know-how, and real-world performance, as well as the interrelation between them. This understanding is important to every step of manufacturing, from design and material selection, to the establishment of production process, and to the overall quality and performance of end-use packages and assemblies. Information is applicable to all types of interconnections including fine pitch QFP, BGA, flip chip, CSP, and passive components.

What you will learn:

• Improved processes to achieve solder joint reliability

• How to avoid potential problems of solder assemblies

• Solder joint reliability factors

• Solution or recommendation to the specific problems or concerns; attendees are encouraged to bring along their production floor problems for discussion and solution. For those problems requiring a lab-examination, a complimentary preliminary assessment report will be provided to the attendee after the lecture (limit one per company)

• Future demands on solder interconnections


• What does it take to derive a universal life-prediction model

• Basic level of material fundamentals in solder alloys, alloy in response to temperature changes during service life, and solder alloy selection parameters

• Bulk solder vs. solder joint properties and the key factors that affect solder joint integrity

• Reliability factors of BGA array and QFP peripheral solder joints

• The role of gold, intermetallics, solder mask, palladium

• Basic failure process and principle in creep, fatigue, thermal fatigue

• Effects of large voids and reflow process parameters

• Microstructure vs. reflow profile vs. solder joint behavior

• Common failure modes of QFP, PBGA, CBGA, CSP and other types of solder joints

• Approaches to further strengthen solder materials in improving creep-fatigue resistance

Who should attend?

This course provides a working knowledge to all who are involved with or interested in surface mount/fine pitch/BGA assembling. The course will provide new personnel to the industry with the necessary understanding of the solder joint reliability issues and provide experienced personnel with insights into future technology advances.

Special course material:

Each attendee will receive a copy of the book Modern Solder Technology for Competitive Electronics Manufacturing, by Dr. Jennie Hwang, McGraw-Hill 1996 (List price $85.95).

Dr. Jennie S. Hwang received her Ph.D. in Materials Science and Engineering from Case Western Reserve University, two M.S. degrees in Liquid Crystals and Chemistry from Kent State University and Columbia University, respectively. She has been a major contributor to the Surface Mount Technology since its inception. Serving as an advisor to major OEMs, U.S. government and electronics contract manufacturers, she has provided solutions to many challenging problems in SMT manufacturing for the last 20-year of SMT establishment. Among her many honors and awards, Dr. Hwang is elected to the National Academy of Engineering and has received Distinguished Alumni Award from her alma maters. She also received the U. S. Congressional Certificate of Recognition and Achievements and YWCA Women of Achievement Award. She was inducted to the WITI Hall of Fame and named R&D-Star-to-Watch.

She is an invited lecturer/keynote speaker worldwide. Holding ten patents, she is the author of over 200 publications including the sole authorship of five textbooks and a co-author of several books. She also authored many articles related to trade, business, educational and social agenda.

Contributing to corporate governance, education and community, she serves on various trade, civic and corporate boards. Dr. Hwang has held senior managerial positions with Lockheed Martin, Hanson, PLC, and IEM Corp., and is currently president of H-Technologies Group, Inc. The firm specializes in providing business and manufacturing solutions to electronics/microelectronics interconnection industry.


Microsystems Packaging: Technologies, Markets and Careers

1/2 Day Course • Noon - 3:00 PM

Instructors: Prof. Rao R. Tummala, Petit Chair Professor, Director NSF-PRC, GRA Scholar, Georgia Institute of Technology; Janet K. Lumpp, University of Kentucky; Leyla Conrad, Georgia Institute of Technology

Information technology involves hardware, software, applications and services. This industry has become the largest industry surpassing agriculture that lasted more than a millennium and steel that lasted more than a century. It is becoming the driving engine for science, technology, manufacturing and services paving the way for unparalleled prosperity of people and countries that participate in it. Better than 80% of all millionaires in the U.S. during the last five years have been attributed to this industry.

Microelectronics systems packaging involves all the technologies in forming electronic systems for consumer, telecom, computer, automotive, aerospace and medical industries. These technologies typically involve all the components and their interconnections to form system level boards to provide system level functions. Microelectronics packaging is the ultimate cross-disciplinary technology that involves engineers from various backgrounds. For example: electrical design typically performed by Electrical or Electronic and Computer Engineers; thermo-mechanical design by Mechanical Engineers; development of new materials that provide the required functions by Materials Engineers; fabrication of components by Chemical Engineers; electrical test by Electrical or Electronics Engineers; IC and board assembly by Mechanical or Materials Engineers; thermal management and reliability by Mechanical Engineers; and so on. Working together as a team from all these disciplines, packaging engineers design, fabricate, integrate, test, cool and assure reliability of the entire microelectronic system.

This four-hour course will present the global microelectronics market, past and future technologies that constitute this market, the educational opportunities that are available and career prospects for a lifelong career around the world in various industries.


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