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Advancing Microelectronics • Volume 29, No. 2 • March/April, 2002
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Professional Development Courses - Sunday, March 10

PDC1:

IC Packaging Trends and Assembly Options - Technical Issues and Concerns

9 am – 5 pm

Bill Greig, Greig Associates

Description:

This course addresses the impact of both the Integrated Circuit, and End Product requirements, in particular, “smaller, better, cheaper,” on packaging, assembly, and substrate interconnects. It focuses on packaging trends, namely, the Ball Grid Array (BGA), and the Chip Scale Package (CSP), and alternative formats, multichip modules (MCM), chip on board (COB) and 3-D initiatives at both the chip and package levels. Assembly options available for attachment of the IC in each case will be discussed with major emphasis on Flip Chip. The course also covers High Density Interconnect substrates (HDIs). The various substrate technologies (Thick Film, Co-fired Ceramic, and Thin Film) that are employed in the manufacture of Single Chip and Multichip Packages will be reviewed. And finally, the latest developments in PWBs, with high density, fine lines, and micro vias employing sequential processing (Build Up Technology – BUT) will be reviewed. Throughout the course the technical issues will be emphasized and reliability concerns addressed where appropriate.

Who Should Attend?

The course provides a comprehensive overview of microelectronic packaging and assembly and is intended for individuals in any way involved with electronics manufacturing. Discussing current and future trends, it is directed towards both the experienced or inexperienced engineer and technician and management personnel with the “need to know.” It should also be of particular interest to those in support activities such as procurement, quality assurance, marketing, sales, and program office will greatly benefit from this course.

Special Course Material:

All attendees will receive a complimentary copy of the book, Hybrid Microcircuit Technology Handbook, J. Licari, L. Enlow, 2nd Edition, Noyes Publications, 1998.

Instructor Bio:

Bill Greig is currently an independent consultant specializing in microelectronic packaging and assembly. His previous work experiences include RCA Semiconductor, General Electric Co., Lockheed Electronics, and NASA. His areas of expertise covers semiconductor wafer processing, hybrid circuit manufacture, printed wiring board fabrication and assembly technologies such as chip & wire and flip chip. He has presented numerous courses at national symposia and has participated in CEE programs at U. of Wisconsin, Lehigh University and Rutgers University. He is a member of SMTA and IMAPS and is currently President of the Garden State Chapter.

PDC2:

Practical Methods to Design-In and Predict Surface Mount Attachment Reliability

9 am – 5 pm

Robert W. Kotlowitz, Lucent Technologies/Bell Laboratories

Description:

The long-term reliability of surface mount (SM) solder interconnections remains an important issue in advanced electronics packaging technologies. The development of high-reliability SM circuit assemblies requires an understanding of the key reliability challenges and controlling design parameters. This intensive one-day course describes the reliability hazard for SM connections and presents practical methods for SM attachment reliability assurance. These risk-mitigation processes support the needs of the electronics packaging R&D community, by providing robust design strategies without requiring a detailed understanding of complex SM reliability issues.

Who Should Attend?

This course will directly benefit researchers, practicing engineers, and managers responsible for:

  • SM component design
  • Advanced electronics packaging R&D
  • Mechanical, electrical, and RF design of circuit boards and wired equipment
  • SM interconnection reliability assurance
  • Product assurance
  • Accelerated stress testing
  • SM assembly
  • Supplier reliability management for out-sourced wired equipment

Instructor Bio:

Robert W. Kotlowitz, Ph.D., is a Distinguished Member of Technical Staff in the Wireless Networks Group at Lucent Technologies/Bell Laboratories in Whippany, New Jersey, USA. He joined AT&T Bell Laboratories in 1982 and transferred into Lucent Technologies in 1996. Dr. Kotlowitz is a technical specialist and internal consultant with responsibility for advanced electronics packaging, SM component strategy, mechanical design support, product qualification, reliability assurance, and supplier reliability management. He is actively involved in SM interconnection reliability assurance in telecommunication equipment, SM manufacturing process qualification, and accelerated stress testing for product assurance.

Dr. Kotlowitz has authored technical papers on SM attachment reliability assurance, advanced packaging, and accelerated stress testing that have been presented at major electronics packaging and reliability conferences in the USA and Europe. These industry forums include the International Microelectronics And Packaging Society (IMAPS) Symposium, International Electronics Packaging Society (IEPS) Conference, National Electronic Packaging and Production Conference (NEPCON), IEEE Electronic Components and Technology Conference (ECTC), Surface Mount Technology and High Density Electronics Packaging Exposition (Expo SMT/HiDEP), Surface Mount Technology Conference and Exposition (SMTCON), Inter-University Micro-Electronics Center (IMEC) Program in Packaging for Electronic Systems (Belgium), Wireless Circuits, Interconnection, and Assembly Workshop, ASME Electrical and Electronics Packaging Division, IEEE Accelerated Stress Testing (AST) Conference, and IEEE Transactions on Components, Hybrids, and Manufacturing Technology (CHMT). The initial published work on lead compliance evaluation for SM assemblies received the Best Paper Award for the 1987 IEPS Conference.

 

PDC3:

Microelectronic Thermal Management

9 am - 5 pm

Al Krum, Consultant

Description:

This course will provide an introduction into the thermal management of microelectronic components and assemblies. It will address the various packaging approaches available for single chip, hybrid, MCM and circuit card assemblies. This course starts off with the selection of the materials used in various components. Semiconductors, die attach, substrates, packages, package attach and circuit cards are covered in detail. Tradeoffs in cost, performance and producibility are addressed. Quantitative methods for determining heat generation in both active and passive components will be presented. Complete thermal analysis is both time consuming and CPU intensive.

This course will provide techniques for doing first order thermal modeling without the need for heavy math. In this rapid modeling technique, the material choices and heat path design can be narrowed down so that subsequent detailed thermal analysis can be more productive. Techniques for decreasing junction temperatures will be presented with an eye on cost and producibility. Heat spreaders, thermal vias, fans and blowers will be covered. Methods of measuring thermal resistances and thermal conductivity will be presented. For extremely high power density components, exotic cooling techniques are required to minimize junction temperatures. Micro-channel cooling, thermoelectric coolers and heat pipes are some of the techniques that will be discussed. The trends in thermal management of microelectronics will be addressed with an emphasis on new materials and processes.

Who Should Attend?

This course is recommended for engineers, physical designers, project managers, manufacturing personnel, and quality and reliability engineers who are interested in obtaining a firm understanding of the thermal design of microelectronic assemblies without the rigor of the heavy math usually associated with thermal analysis.

Special Course Materials:

Each student will receive a copy of Thermal Management Handbook for Electronic Assemblies by Jerry Sergent and Al Krum, McGraw Hill, 1998 (List price $90), as well as course notes.

Instructor Bio:

Al Krum is a consultant to the microelectronic packaging industry. Previously he was a manager at Raytheon Electronic Systems (formally Hughes Aircraft Company) with over 30 years of experience in the design, test and manufacture of microelectronic modules. He has lead the design and development of over 200 hybrid circuits including over 50 power hybrids. A much sought after lecturer, Mr. Krum is the author of numerous papers in the field of hybrids and holds four patents. He is an author and coeditor of the Thermal Management Handbook for Electronic Assemblies. In addition, Mr. Krum has written the thermal management chapter in the 3rd edition of Electronic and Packaging Interconnection Handbook. He teaches classes on power hybrids for the University of California Extension and at the IMAPS national symposium. He received his B.S.E.E. and M.S.E.E. from Newark College of Engineering.

PDC4:

Implementing Microvias and Embedded Passives

9 am – 5 pm


Rolf E. Funer, Funer Associates

Description:

New PCB designs are increasing in density and requiring more and more component placements, more I/Os, tighter dimensions. Microvias can dramatically reduce board size, increase I/O count and reduce layer count. The numbers of passives, resistors and capacitors are increasing dramatically. By embedding the passives directly in the circuit board, valuable surface area can be saved. And performance, particularly at high frequency, can be improved. These new technologies can work together to cut weight and size and therefore enable high density substrates. But can these concepts be implemented today? Or are they future technologies? This workshop addresses these issues, reviews all the currently available materials and processes to make microvias and embed passives. Design and testing issues, performance, reliability, applications and economics are all covered. The design and project managers attending this course will come away with an informed view if their designs are ready for microvias and embedded passives and if microvias and embedded components are ready for them. PCB manufacturing and development engineers will learn what they will need to do to implement these technologies.

What You Will Learn:

  • Major microvia processes: their capabilities, costs, reliability and availability
  • Applications of microvias to reduce size, layer count and cost
  • Suppliers: US and worldwide
  • Embedded passives: currently available materials. How to processing, their capabilities, benefits and limitations
  • New and emerging materials: their status and potential
  • Applications and how they are working out

Instructor Bio:

Rolf E. Funer is currently a consultant to the electronic industry. His clients include components manufacturers, electronic materials, test instrument and circuit suppliers. He retired from AMP Corporation as Chief Technologist, Circuits and Electronic Packaging. Previously he was Technical Director for Carolina Circuits, an AMP subsidiary. Dr. Funer spent 5 years with ICI where he was Technical Director of its Electronics Division, where the new concepts of molded circuits and high-density plated ceramic circuits were developed. Earlier, Dr. Funer worked at DuPont Company for 18 years in various electronic materials research, development and marketing positions. Dr. Funer holds a Ph.D. in organic chemistry from the University of Wisconsin and a BS degree in chemistry from Loyola University.


Sunday, March 10

Registration
8 am - 5 pm

Professional Development Courses
9 am - 5 pm

Welcome Reception
5 pm - 6 pm

Monday, March 11

Continental Breakfast: 7 am – 8 am

Exhibit Hours: 10 am – 6:30 pm

Session 1: Design and Test
8 AM – 9:40 AM
Session Chair: Mary Massey, TRW

Substrate Technology Trade-Offs to Achieve Reduced Package Size
Trent A. Thompson, David Patten, Motorola Semiconductor Products Sector

Comparison of Variations in Organic Laminate Cross-sections and Routing Constraints as Related to Simultaneous Switching Output Noise
Colleen J. Fox, David Hanson, 3M; Chris Wyland, Philips Semiconductor

On-Board Fault Detection, An Inexpensive, Highly Reliable Continuity Test Method
Ryan S. Berkely, Brian E. Parrish, Mary C. Massey, Wennie Chen, TRW

Effects of Plating Stubs on the Electrical Performance of PBGA Packages
Wendemagegnehu Beyene, Chuck Yuan, Rob Dhat, Dave Secker, Rambus Inc.

Session 2: 3D Packaging
8 AM – 9:40 AM
Session Chair: Ajay Malshe, University of Arkansas

An Advanced Design Process for Unlimited Stacked MCMs
John R. Sovinsky, Sam Eisenpress, CAD Design Software

The Realization of a Multi-Layer Band Pass Filter using Laser Direct-Write Techniques
David Liu, Chengping Zhang, Todd Kegresse, Scott Mathews, Mike Duignan, Potomac Photonics, Inc.; Timothy Schaefer, Mayo Foundation; Rohit Modi, Huey-Daw Wu, Naval Research Laboratory

RF T/R Module: from ‘MCM-D’ Technology to 3D Packaging
Isabelle Favier, Frederic Mazel, Marc Kavass, Thales Microwave

System Architecture Implications of 3-D Interconnect Technologies
Silke A. Spiesshoefer, Leonard Schaper, University of Arkansas

BREAK: 9:40 AM – 10 AM

Session 3: Plenary Session - Part 1
10:00 AM – Noon
Session Chair: John “Jack” Balde, IDC

This is the first conference presentation of the rapidly developing folded flex technology with thinned silicon chips that is being pursued in Europe. These talks have been mentioned only in workshop presentations - and never consolidated into one session. This innovative technology promises to make System-In-A-Package with low manufacturing costs and high performance, not requiring tested die. This is an early view of a forthcoming IMAPS textbook on this exciting subject.

Leading the technology are three independent Fraunhofer companies; you will hear from two of the three companies in this session and the third in tomorrow’s Plenary Session.

Overview of the Folded Flex and Thinned Silicon Chip Advantages over other Stacking Constructions
John Balde, IDC

Low-Profile and Flexible Electronic Assemblies using Ultra-Thin Silicon - The European FLEX-SI Project
Thomas Harder and Wolfgang Reinert, Fraunhofer ISIT

Fraunhofer IZM activities using Folded Flex and Thinned Silicon Chips
Christine Kallmayer, Fraunhofer IZM

LUNCH: NOON – 2 PM

Session 4: System Application
2 PM – 5:40 PM
Session Chair: Phillip Zulueta, JPL

A Soldered Daughter Card Alternative to Connectorized Modules
Mark Brillhart, Sergio Camerlo, Scott Priore, Wheling Cheng, Lekhanh Dang, Jeremy Chen, Cisco Systems, Inc.

LTCC Fuel Cell System for Portable Wireless Electronics
Jeanne Pavio, Joe Bostaph, Chenggang Xie, Allison Fisher, Jerry Hallmark, Motorola

LTCC-based System-in-a-Package - Advancements and Market Potential
James W. Lawson, Janet A. Kingston, C-MAC Industries, Inc.

SAW Filter Package and Packaging for 5GHz Application
Makoto Aoki, Nikko

BREAK: 3:40 PM – 4 PM

High-temperature Automotive Electronics
R. Wayne Johnson, John L. Evans, Auburn University; Peter Jacobsen, Eaton Corporation; Rick Thompson, DaimlerChrysler Corporation

Optimization of a PLL Power Supply Design
Quan Qi, Tim Michalka, Mark Frank, Hewlett Packard Company

Large Scale FDTD Simulation for Ultra High Frequency Package Characterization
Andreas Hieke, Robert Tramel, CFD Research Corporation

Functional Independence: Part of a Systems Approach to Optoelectronic Packaging
John S. Mazurowski, Corning Incorporated; Ron Barnett, GeoMat Insights

Session 5: High Density Packaging Materials

2 PM – 5:40 PM

Session Chair: Mark Sylvester, 3M

Diode Laser Soldering of Noble Metal Alloys
A. P. Hoult, R. Ong, Coherent Semiconductor Division

Development of a Simultaneous Curing Multi-Layered Substrate
Katsura Hayashi, Kenji Kume, Shigeru Kamoi, Masahiro Fukui, Kyocera Corporation

Compatibility of Lead-Free Alloys with current PCB Materials
Milos Dusek, Christopher Hunt, Jaspal Nottay, National Physical Laboratory

New Liquid Crystal Polymer (LCP) Flex Circuits to Meet Demanding Reliability and End-Use Applications Requirements
Terry Hayden, 3M Electronic Products Division

BREAK: 3:40 PM – 4 PM

A Study of Polymeric Protective Coatings on Casings of Fragile Electronic Equipment
Katerina D. Papoulia, Ying Wang, Subrata Mukherjee, Suresh Goyal, Cornell University

A Projection Moiré System for Measure Warpage with Case Study
Hai Ding, Reinhard E. Powell, I. Charles Ume, Georgia Institute of Technology

Development of an Advanced System for Inspection of Flip Chip and Chip Scale Package Interconnects using Laser Ultrasound and Interferometric Techniques
Turner A. Howard, I. Charles Ume, Georgia Institute of Technology; Juergen Gamalski, Siemens AG Corporate

HeraLocktm 2000 Monolithic Constraint LTCC Tape
Frans Lautzenhiser, Edmar Amaya, Heraeus Inc. - Circuit Materials Division

Tuesday, March 12

Continental Breakfast: 7 am – 8 am

Exhibit Hours: 10 am – 4 pm

Session 6: MEMS Packaging
8 AM – 9:40 AM
Session Chair: Peter Barnwell, Heraeus

Flip Chip Packaging of a MEMS Neuro-Prosthetic System
Linda Del Castillo, R. Graber, S. D’Agostino, M. Mojarradi, A. Mottiwala, Jet Propulsion Laboratory

MEMS Packaging Technique using HF Vapor Release
Robert C. Cole, Ruby E. Robertson, The Aerospace Corporation

Ceramic Packages for MEMS
Susheel Dharia, Kyocera America, Inc.

Vibration Isolation of MEMS Sensors for Aerospace Applications
Robert Dean, George Flowers, Scotte Hodel, Ken MacAllister, Alex Matras, Auburn University

Session 7: High Density Packaging
8 AM – 9:40 AM
Session Chair: Leonard Schaper, University of Arkansas

Advantages of High Density Surface Mount Backplane Connectors for Space
Zoltan Szalontai, Ryan S. Berkely, Brian E. Parrish, Steve Holm, Doug Cockfield, Mel Houston, Mary C. Massey, TRW

Plastic Ball Grid Arrays, A Qualified Packaging Technology for High Reliability Space Applications
Mary C. Massey, Brian E. Parrish, William E. McMullen, Ryan S. Berkely, TRW

The Development of Molded Array SMCSP Package using High Density Typed Lead Frame
SangKyu Lee, Lee Bonghui, Kim Han-gyu, Park Kwangseok, Samsung Techwin Co., Ltd.

BREAK: 9:40 AM – 10 AM

Session 8: Plenary Session - Part 2

10:00 AM – Noon
Session Chair: John “Jack” Balde, IDC

Medical Implants and other Biomedical Devices using Microflex Interconnection Technologies
J-Uwe Meyer, Fraunhofer IBMT

Folded Flex and other Structures for System-In-A-Package
Mike Warner, Tessera

Capability and Performance of Folded Flex Constructions
Silke A. Spiesshoefer, Leonard Schaper, University of Arkansas

 

LUNCH: NOON – 2 PM

Session 9: Thermal Management
2 PM – 5:15 PM
Session Chair: Bill Petefish, 3M

Transmission-Line-Matrix (TLM) Thermal Modeling of High Power Insulated Gate Bipolar Transistor Devices
Rachida Hocine, M.A. Boudghene Stambouli, A. Saidane, University of Sciences and Technology of Oran

Enhanced Thermal Vias in Low Temperature Cofire Ceramics
W. Kinzy Jones, Marc Zampino, Ping Wang, Ravindra Kurdukia, Florida International University

The Effect of Various Transverse Accelerations and their Induced Body Forces on Cooling Performance of a Helically Grooved Heat Pipe (HGHP)
Mazyar Amin, H. Shokouhmand, University of Tehran

BREAK: 3:15 PM – 3:35 PM

Multiobjective Optimal Design of Printed Wiring Boards with Forced Air Cooling
Qishan Li, Olgierd A. Palusinski, The University of Arizona

Development of Dimensionless Correlation for Natural Convection Cooling Board
Koki Shimohashi, Tohru Nakanishi, IBM Japan

Thermal Model for Over Hang on Laser Diodes
Chunlin Xia, Serrena Carter, Bob Miller, Coherent Inc.

Liquid Flow Through Cooling on the Boeing Joint Strike Fighter
James A. Robles, The Boeing Company

Session 10: Reliability
2 PM – 4:50 PM
Session Chair: R. Wayne Johnson, Auburn University

Experiment Study on Reliability of Solder Joints under Electrical Stressing
Hua Ye, Cemel Basaran, SUNY at Buffalo

On the Effect of using Protective Thin Layers on Device Reliability
Abdolreza Langari, Conexant Systems Inc.

BREAK: 3:15 PM – 3:35 PM

Improving the Pin Grid Array (PGA) Reliabilities with Novel New Pin Design
Quan Qi, David Quint, Karl Bois, Hewlett Packard Company

Reliability Evaluation of High Density Microvia Structures
Jaydutt Joshi, Conexant Systems, Inc.; Ursula Marquez, K. Srihari, State University of New York, Binghamton; Anthony Primavera, Universal Instruments Corporation

Session 11A: Power Packaging
2 PM – 3:15 PM
Session Chair: Dave Hanson, 3M

Think High Density and Power Electronic by selecting right Packaging Technology and be ready for High Volume Production
Flemming Nielsen, Grundfos Management A/S

The Research of the Performance of Al/AlN and Al/Al_2O_3 Substrate
Peng Rong, Heping Zhou, Xiaoshan Ning, Xu Wei, Tsinghua University

Lead Free System for Buried Components and High Frequency Applications
Alvin Feingold, W.T. Faix Jr., R.L. Wahlers, M.A. Stein, Electro-Science Laboratories Inc.

BREAK: 3:15 PM – 3:35 PM

Session 11B: Advanced Substrates & Lids
3:35 PM - 4:50 PM
Session Chair: Timothy Lenihan, Sr. Consultant

Cost Effective Manufacturing Solution for Aluminum - Silicon Carbide Flip Chip Lids
D. Rose, R. Roszkowicz, SEMX Corporation, SPM & Polese Company

Development of New Printed Wiring Board Having Coaxial Wirings
Yuichiro Sato, Kenichi Kobayashi, Yoshiaki Kawamata, Akihiko Kawashima, Naoji Tanaka, Shinwa Corp.; Katsuya Kikuchi, Kazuhiko Tokoro, Hiroshi Nakagawa, Masahiro Aoyagi, National Institute of Advanced Industrial Science and Technology

Wednesday, March 13

The Technical Committee of ICAPS is pleased to present four in-depth technical workshops to provide detailed information on topics of immediate interest to the Advanced Packaging and Systems community. These workshops are included as part of the Conference registration, so please be sure to select the workshop you would like to attend on the registration form. The four workshop topics selected are:

  1. Fundamentals of Fabrication and Packaging of MEMS and Related Micro Systems
  2. Flexible Circuit Applications, Materials and Manufacturing Processes
  3. Advanced Organic Substrate Package Design & Manufacturing for RF Applications
  4. Flip Chip Technology

Packaging is the major cost driver in MEMS technology today. For the future growth of this market, packaging must be addressed. The first workshop will discuss these challenges and opportunities. In the Plenary Sessions, 3-D system packaging using thinned silicon and foldable flex technology will be discussed. The goal of the second workshop is to provide greater insight into the design and manufacture of flex circuitry. Wireless systems and products are one of the fastest growing segments in the industry. The third workshop focuses on the design and manufacture of packages to meet the demands of this market. Utilization of flip chip technology for flip chip-in-package is growing dramatically and is the topic of the fourth workshop. This workshop will address issues of bumping, design, assembly and reliability.

Additional information about each workshop is given below.

Workshop 1:
Fundamentals of Fabrication and Packaging of MEMS and Related Micro Systems
9 am - Noon
Instructor: Ajay P. Malshe, University of Arkansas

Workshop Description:

This introductory course will cover packaging and integration of micro-electro mechanical systems (MEMS). Unlike integrated circuit (IC) packaging, MEMS packaging is highly application specific. MEMS and related micro systems are designed, fabricated and packaged for various applications, for example accelerometers, gyros, RF switches, optical switches, micro fluidic drug delivery systems, etc. Moreover, growing trend demands multifunctional systems where integration of these diverse signals results into true “mixed signal systems.” Hence, a growing number of products need application-specific design, materials, fabrication and assembly processes for building reliable MEMS systems.

Workshop 2:
An Overview of Flexible Circuit Applications, Materials and Manufacturing Processes
9 am - Noon
Instructor: Joe Fjelstad, JC Fjelstad and Associates

Workshop Description:

Flexible circuits are arguably the world’s most versatile electronic interconnection technology. Today products enabled by flex circuit technology abound as they are used in every imaginable way. This workshop will examine this rapidly expanding and evolving technology, pausing first to review some of the many applications for flex and then moving on to examine the different materials employed and processing methods used in their manufacture. Included in the discussions will be a brief review of some of the more important design considerations that should be addressed to assure a successful flex circuit enabled product.

Workshop 3:
Advanced Organic Substrate Package Design & Manufacturing for RF Applications
9 am - Noon
Instructor: Hassan Hashemi, Conexant Systems, Inc.

Workshop Description:

The objectives of this course are to review design and manufacturing practices and tradeoffs affecting current and next generation Wireless Packaging using laminate substrate technologies in single or multiple die packaging format. The course material is based upon the instructor’s experience on current practices used for Wireless & GHz IC packaging for wireless (e.g., Power Amplifier modules) and Internet infrastructure applications. The course is designed for engineers or engineering managers who want to understand more about laminate single or multi chip modules, and the unique requirements for assuring that packages can be manufactured in a high volume commercial application and meet stringent electrical and thermal performance requirements.

Workshop 4:
Flip Chip Technology
9 am - Noon
Instructor: R. Wayne Johnson, Auburn University

Workshop Description:

This workshop provides insight into the design and assembly of electronics using flip chip devices. The workshop will cover the practical issues of implementing flip chip technology from wafer bumping to reliability characterization. This workshop will begin with an examination of bumping options and corresponding design rules. Redistribution will also be discussed. Substrate requirements for flip chip will then be presented including a discussion of high density interconnect options and substrate design. Assembly of flip chip devices adds materials and processes to the standard assembly process and the integration of these into the process flow is examined. Materials and processes to be discussed include fluxes, underfills (capillary flow, fluxing no-flow, and wafer applied), substrate dehydration, flux and underfill application, underfill curing, inspection and underfill characterization techniques. The workshop will conclude with a discussion of flip chip assembly reliability testing.



THINGS TO DO IN RENO!

Brookside Golf Gourse
This nine-hole course is adjacent to the Reno/Tahoe International Airport and was originally designed by a group of doctors in 1956. This is great place to go during lunch hour, play nine holes, and be back in the office before anyone notices you’re gone. The par-35 course with 2,882 yards makes for an easy round. Greens fees are $18, carts $20. Fees may go up $1 during the summer months. No reservations necessary for tee times.

Addi Galleries Reno
You will not find a better place to shop for fine art in Reno. Gallery director Winifred Addi knows her stuff. She has extensive art education at Ecole de Louvre and Sotheby’s American Arts. You will find works of more than 200-artists including Salvador Dali, Marc Chagall, Fredric Remington and Red Skelton. One could easily spend hours browsing in this fine gallery conveniently located at the Reno Hilton Hotel Casino.

Ultimate Rush
Just imagine yourself being harnessed securely to a thick wire cord and slowly raised 180 feet in the air, then released. ZOOM!! You go flying through the air at an incredible speed and swing back and forth until you finally slow down and stop. What an incredible rush you will feel! This cool thrill ride is a combination of skydiving, bungee jumping and hang gliding. Take this thrill-of-a-lifetime ride, and your trip to Reno will indeed be memorable. The cost is $25 per daredevil.

Reno Hilton Bowling Center
This neat bowling facility offers you 50-championship synthetic lanes with state-of-the-art automatic scoring. This is a great place for the entire family to come spend a day of fun that should be right up your alley. Bumper bowling is available upon request. There is also a snack bar, video game room and a full service lounge with your favorite cocktails. Prices are $2.40 per game 8am-6pm, $2.95 per game 6pm-midnight, and $1.80 per game for graveyard bowling. Shoe rental is $2 per person.

Snowind Sports
Located pool-side at the Reno Hilton Hotel, this convenient store rents bikes, skates, snowboards and skis. You’ll get personalized service and the best boot fitting in town. Bauer in-line skates are featured. Rental rate for bikes start at $8 per hour, $15 half-day, and $25 all day. In-line skate rentals start at $5 per hour, $10 half-day and $15 all day. Ski rentals range from $20-$28 and snowboard rentals $30 per day.

Hilton Bay Aqua Driving Range
This is a great place to bring the whole family. During the summer months, the natural bay is a cool place to hang out and people-watch, bird-watch or coach your loved ones while they practice. Even in winter, die-hard enthusiasts will practice their golf swing until the lake freezes over. Club rentals are available at $5 per club, and a basket of balls starts at $3.

Fun Quest
Never-ending fun is what you will find at this incredible 40,000 square foot fun center, which features a wide array of activities and games for the entire family, including more than 200 of the latest most exciting video and redemption games.

For those of you who like to get a little physical, the place offers magnetic bumper car rides for $2, as well as Reno’s first interactive laser tag arena, which houses a dynamic live action, high-tech game of hide-and-seek for a cost of $6. This 5,000-square foot futuristic arena comes complete with music and special effects to make it both physically and mentally challenging. A batting cage and power pitcher for baseball simulation is also featured. For children ages one through eight, there is The Galaxian Theater and Tumble Town. Your tots can play here safely for $2.

There is a $2 charge for admission on Friday, Saturday and holidays. You will be given the value of admission in tokens for the arcade. There is also a charge for individual attractions and games. All-day wristband passes are available for purchase.

For more information on Reno,
visit info@cityofreno.com

   

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