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On February 17, 2011

IMAPS Arizona Chapter Luncheon Presented Bill McClean, President, IC Insights. Mr. McClean Presented and Discussed "Reasons for Optimism in 2011"
 

Abstract:

Come hear why 2010 was only the beginning of the next high-growth phase for the IC industry and why IC Insights has the highest 2011 growth forecast of any major market research firm!

Bill will summarize the latest trends in the IC industry, especially now as it moves through the upturn portion of its cycle. A few of the reasons for IC Insights' optimism for 2011, will be discussed including:

  • Growth in China, India, and Latin America will drive worldwide GDP growth above its long-term average of 3.5%.
  • After every global recession since 1980, the semiconductor industry entered at least a two-year boom period-2011 will be the second year after the 2009 global downturn.
    Portable PCs, smartphones, digital TVs, and automotives are spurring healthy electronic system growth.
  • IC industry capacity increased only 6% in 2010 and capital spending is forecast to show only moderate growth in 2011, minimizing the risk of IC industry overcapacity.
  • After averaging a 4% per year decline over the past 10 years, IC average selling prices are forecast to remain stable over the next couple of years.

Bio - Bill McClean - President - IC Insights

Prior to forming IC Insights, Mr. McClean worked at ICE Corporation for 17 years--the last 10 as Vice President of Market Research. With nearly 30 years of experience tracking the IC industry, Mr. McClean has become a well-known authority on market and technology analysis and forecasting. He specializes in tracking global economic conditions, developing IC market forecasts, analyzing capital spending and fab capacity trends, researching ASIC markets and technologies, and following emerging markets for ICs such as cellular phones.

Mr. McClean serves as contributor and managing editor of IC Insights' studies and other products. In addition, he instructs for IC Insights' seminars and has been a guest speaker at many important annual conferences held worldwide.

Mr. McClean has a Bachelor of Science degree in Marketing and an Associate degree in Aviation from the University of Illinois.

If you or your company would like to exhibit at an IMAPS Luncheon, please contact Jody Mahaffey. By exhibiting you recieve the following:

- 6ft Tabletop for your display
- Company promotion via links from our invitations and the AZ Chapter website to your company website
- Lunch for one attendee

Exhibitors for February Luncheon Were:




Special Considerations of MEMS Packaging


November 18, 2010

MEMS packaging is becoming increasingly critical and plays a major role in the successful commercialization of MEMS products. There are many challenges in developing effective packaging methods for Micro-Electro-Mechanical Systems (MEMS). The packaging system should not only let the MEMS perform the environment sensing functions but also protect it from the environment contaminants and damages. Typical MEMS packages require a multi-chip approach, for instance, a sensing chip and a control ASIC chip are packaged either side by side or stacked. MEMS accelerometer is composed of complicated mechanical structures, the interactions between package and device, the package and environment will impact the device performance. The presentation will give an overview of the accelerometer and pressure sensors, their structures and functionality, following by a case study of how the package design may affect the accelerometer performance and reliability.

IMAPS Arizona Chapter September Luncheon Discussed Fine Pitch Copper Pillar Flip Chip Technology

September 16, 2010

On September 16th 2010, 86 people attended the Arizona chapter presentation of Amkor’s Fine Pitch Copper Pillar presentation by Robert Lanzone, VP of Wafer Level and Advanced Packaging, at the San Marcos Resort on September 16th.  Robert Lanzone described the Amkor process of partnering with an Alpha Customer, in this case Texas Instruments to achieve quick and effective results.  The results in this case were a 50 micron in-line pitch and 40 / 80 micron staggered dual row pitch Fine Pitch Cu Pillar packaging technology which are in HVM production.  The newly developed and qualified Fine Pitch Copper Pillar packaging technology began production in Q2 2010, with large production ramp underway.  

On-chip Inductors and Transformers


May 20, 2010

Designers can begin to integrate two, four, sixteen 5nH up to 2000nH inductors on top of existing ICs.  Tiny ferrite or permalloy magnetic cores over 0.1 mm thick are available for switching from kHz to MHz with high quality factor.  Air core, Gold Inductors operate above GHz switching frequencies.

Volume wafer manufacturing processes and assembly tools were used.  Low cost, existing production processes.  Chip designer layouts gold lines on top of ICs and then gold ball bonds during packaging complete the inductor coils.  Sixteen toroids (0.7mm diameter, 0.25mm loop height, 8nH filters) could all fit on top of an IC and inside 1mm QFN package.  Cost to integrate more inductors will be cheaper than chip-inductors.  Size will always be smaller than soldering discrete inductors next to ICs.

By selecting ferrite core optimized for targeted frequency, designer can layout 50nH to 500nH on-chip inductors with Q comparable to 0402 SMD discretes.  Depending upon needed inductance value, number of turns of gold coil defines the size of magnetic cores.  By designing both primary and secondary coils plus selecting multi-layers permalloy core, on-chip transformer can be formed.

Tunable is advantage of on-chip Gold InductorsTM.  By adjusting loop heights during wire bonding, engineers can tweak inductance value +- 70%.  Combining precision wafer manufacturing, high speed assembly and design flexibility, one can begin to integrate filters, LC oscillators, current spike protection for sensitive I/Os.  On-chip inductors allow efficient, lower cost and smaller electronic systems.
                                                        
Presented by:

James J Wang
Founder of Power Gold LLC

James Wang is founder and consultant of Power Gold LLC (Phoenix, AZ).  James has 31 years of semiconductor experience developing processes and implementing them into volume production.  He helped start-up 3 wafer fabs plus 1 automated assembly/test line and then managed production at both US and German factories.  Emphasized now is to manufacture on-chip inductors and then nF capacitors onto future ICs.

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Analyzing the recovery


February 4th, 2010

The IC industry is poised for an impressive rebound and solid growth in 2010! Unit demand remains strong, 300mm fabs are running near capacity, and IC average selling prices are headed higher. For the first time in a long while, companies in the IC industry have reason to be upbeat about the coming year.

Global recessions should be thought of as periods of “pent-up” demand for electronic systems. Although these severe downturns always cause a temporary push-out of electronic system purchases, they do not destroy the underlying desire to purchase. 

Global recessions typically set the stage for a booming IC market. Over the past 30 years, the world has endured four global recessions, and after every one of these recessions, a booming IC market immediately followed! Moreover, the strong IC market that followed the global recession has always lasted at least two years. 

IC Insights’ will examine the relationship between worldwide GDP, electronic system sales, the IC market, and IC unit volume shipments and present its 2010 forecast for each of these segments. 

Presented by:

Bill McClean
President of IC Insights
 

Download the presentation slides here.


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Thin Wafer Processing Trends, Achievements and Challenges

Thursday, December 3, 2009
Registration and Lunch at 11:30 – 12:00, Presentation at 12:00 – 1:00

EV Group Inc.
7700 South River Parkway
Tempe, AZ 85284

Bioh Kim
Global Business Development Manager

EV Group Inc. Through-silicon via (TSV) represents system-level integration of planar devices that are interconnected in the z-direction. Making reliable TSV interconnects requires a significant reduction in wafer thickness. A thinned die/wafer enhances IC performance and enables various innovative packages However, when combined with a large diameter wafer, making reliable TSV interconnects necessitates new wafer handling mechanisms. One such handling solution for thin wafers is temporary bonding and de-bonding utilizing a carrier wafer that provides mechanical stability during backside processing and protects the sharp edge of the device wafer. The choice of the proper intermediate bonding material, such as laminated tapes or spin-on coated adhesives, depends on several factors. Spin-on coated adhesives become preferred over laminated tapes due to several factors. Fully-automated thin wafer handling solutions provide many benefits and successful process stability and electrical performances have been demonstrated. In the IC manufacturing and packaging industry, there still exist several challenges with temporarily bonded wafers. All the details on trends, achievements and challenges with thin wafer handling and processing will be discussed during the presentation. .............................................................................................................................................................................................................................

October 29, 2009

Implantable Medical Devices Past Successes; Current Status; Future Possibilities and Challenges

Dr. Peter Tortorici
Medtronic
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August 26, 2009

Wafer-Applied Underfill for Fine Pitch Devices

Dr. Russell Stapleton
LORD Corporation
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May 21st 2009

Thermal Management of Advanced Microelectronics

Dr. Victor Chiriac
Freescale Semiconductor

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May 15th 2008

0.3mm pitch CSP

Lee Smith
Amkor Technologies

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ASU Flexible Display Center Talk and Tour

Apr 17th 2008

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The Role of Intermetallic Compound Formation on Pacakge Reliability

Aug 23rd 2007

Jonathan Harris Ph.D
President; CMC Interconnect Technologies

This presentation discussed the role of intermetallic compouind formation on package reliability

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3D Integration Technologies: An Overview

May 24th 2007

Rajen Chanchani
Sandia National Labs

This presentation discussed three key technologies: the motivation description status, issues and examples of their applications and the enabling technologies required to process them:

On-chip 3D integration
3D stacking of ICs/wafers
3D Packaging
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Enabling High Density SiP Manufacturing - The Use of Jetting Technology to Minimize Substrate Area for Underfill

February 7th 2007

Steve Adamson
Asymtek

This presentation discussed the use of jetting technology for underfill dispensing. Jetting technology was shown to improve the performance of the underfill
process allowing for narrower gaps between components thereby increasing density and PCB utilization.

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Thermal Issues from the ITRS Perspective

November 1, 2006

Debendra Mallik
Intel Corporation

This presentation discussed the current status and future directions of addressing the package thermal issues from ITRS perspective.
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High Frequency Composite Laminates

May 16, 2006

Young Gao
Rogers Corporation

Rogers Corporation joined IMAPS Phoenix and SAMPE Arizona to provide input on High Frequency Composite Laminates as a new solution for high performance chip packaging. Rogers provided a tour of their facility afterwards.

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Understanding the Lead Free Challenges

October 26, 2005

Richard Brooks
IndiumDow Corning

Mr. Brooks provides an update on the Lead Free Challenges including alloy selection, surface finish, reliability and performance. Process and Product concerns were discussed as well as related to implementation in the SMT process.

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January 18, 2005

Designing 3D Packages for High Performance

Vern Solberg
Tessera Inc.

Miniaturization of electronic products such as wireless hand sets have driven the development of 3D Packaging, (2, 3 or more die within a single package outline). 3D Packaging improves performance by increasing in-package interconnect efficiency by more direct and shorter interconnects and can simplify the system board design. This talk will focus on a number of new, low risk, sequentially assembled vertically stacked package innovations that can provide the potential for lowering manufacturing costs.

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October 7, 2004

Radio Frequency Identification - The Sun Finally Shines on RFID

Dick Estes
Consultant to Dow Corning

RFID tags have been in the offing for some time now. Their use in badges, subway turnstiles and other applications is well known. With the recent push by WalMart and others for identification on shipment pallets, the door is being shoved open on this application. Dick Estes will present on the RFID tag, what it is, how it is used, the technology, the hurdles to overcome and its bright future.

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May 03 2004

GET THE LEAD OUT

Half Day Symposium, Supplier Day and Luncheon
Topics on Lead Free Processing

Presentations by:

Intel
Bance Hom
Flip Chip International
Indium Corp

Luncheon Speaker: Jim Walker - Gartner/DataQuest

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January 22, 2004

Killer MEMS Applications and their Packages

Ted Tessier
ST Assembly Test Services

The successful commercialization of MEMS applications has largely been dependent on the availability of affordable and reliable packaging solutions. Tthis presentation will provide an overview of specific packaging technologies that have enabled the emergence of 3 widely recognized “Killer MEMS” applications, namely digital imaging, automotive accelerometers and ink jet printing. The recent trend towards Wafer Level Capping of MEMS will also be discussed with its expected revolutionary impact to packaging.

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October 22, 2003

VFM - Fundamentals, Capabilities and Applications

Dick Garard
Lambda Technologies

A practical and comparative overview of various thermal-processing techniques with a brief history of microwave processing will be presented. Variable Frequency Microwave processing for curing polymeric adhesives will be discussed. The fundamentals of microwave energy interactions with gases, liquids and solids (Si, SiO2, SiC, Si3N4, metals) will be explained from a microscopic level to a macroscopic level to real life applications. The effects of VFM on semiconductor functionality will be addressed specifically as it applies to front end and back end semiconductor processing, including: organic ILD dielectric curing; (PSB) passivation stress buffering; wafer level solder reflow; die attach; FC underfill; glob top curing and structural bonding. The strengths and the limitations of the VFM technology will be clearly identified.

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August 28, 2003

A discussion on the Advantages of Integration in today’s Semiconductor Assembly and Test Facility

Leroy Christie
ASM Pacific

Automation has been the watchword of the semiconductor manufacturing world since the earliest days of the automated wire bonder. Today, the integration of these automated process stations brings the highest results out of your automatic tools. Leroy will discuss the advantages and disadvantages associated with integration and the commitments involved to make it happen.

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June 19, 2003

Packaging and Thermal management of Power, Optical, and RF/Microwave devices using Al-Si “CE” Alloys

Stu Weinshanker
Osprey Metals Ltd, UK

The Osprey CE Alloys are lightweight, Binary, Al/Si alloys where the composition of Al and SI can be tailored to provide a specific coefficient of thermal expansion (CTE) value anywhere in the range of 7-17 ppm/ºC. The alloys are manufactured by a proprietary spray-forming process, which promotes isotropic and optimum mechanical properties in the resultant products.

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