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Advance
Technical Program
WA1 Here we address some ways of handling the high CTE stress caused by high heat FLUX. Thermal Conductivity and Thermal Expansion of Functionally Engineered
Solders Sequential Deposition of Copper/Alumina Composites Thermal Placement Design Optimization of Silicon Chip with Non-Uniform
Power Distribution using Genetic Algorithms WA2 RF MEMS is an important emerging technology. This session covers several approaches for wafer level hermetic packaging of these devices. Wafer Level Hermetic Packaging for Above-IC RF MEMS: Process and
Characterization Localized Hermetic Micropackaging using Laser Sealing for RF Micro-electromechanical
Systems A Universal Cost Effective Vacuum Chip-Scale Packaging for RF
MEMS WA3 The latest development, design and reliability issues in 3D die stacking technologies will be presented in this session. Flip-Chip-to-Wafer Stacking: Enabling Technology for Volume Production
of 3D System Integration on Wafer Level Stacked Die Package Design Optimization Evaluation on Die Cracking due to Handling Damage in FBGA DDP
for Memory Device using Handling Impact Test WA4 This session is centered upon the advances in aspects of Lead-free assembly. The papers focus on the underfill for fine pitch small diameter Pb-free CPSs, handling of heat sensitive components at higher reflow temperatures and the impact of pad design and process conditions on joint reliability. These too are all critical issues in the implementation of Lead-Free solder assembly. Lead-Free Assembly of Heat-Sensitive Components Lead-Free PCB Assembly and Effect of Process Conditions on Solder
Joint Profile and Reliability of Solder Joints WA5 Interconnect to mounted components and the advantages of embedding those components. Core issues in this maturing technology. Ball Shear vs. Wire Pull Testing Wire Bond Baseline Study on Two
Gold Thick Film Formulations LTCC Technologies for Harsh-Environment Automotive Applications
Utilizing Soldered Interconnections Design of Integrated Inductances Based on Ferromagnetic LTCC-Layers WA6 - Special Session - FREE TO ALL This is a one hour session. Writing proposals is often frustrating and time consuming. By following a few simple guidelines, you can make the job easier for yourself and increase your chances of winning. Tom Sant will identify the seven deadliest mistakes in proposal writing and - more important - show you how to avoid them. He will explain a four-step process for structuring your proposals that will result in higher win ratios, how to use evidence to gain credibility, and how to communicate a compelling value proposition. Proposal Writing WA7 Listen to very advanced power die attach approaches, including the use of nanomaterials. Lead Free Die Mount Adhesive using Silver Nanoparticles Applied
to Power Discrete Package Thermal Management of Very High Power Microwave Devices WA8 This session covers new processes for wafer level MEMS packaging including flip-chip and solder. Low Cost Hermetic Wafer-Level Packaging of Magnetic Proximity
MEMS Switches Wafer Level Vacuum Packaging Technology using Molten Solder Ejection
Method Flip-Chip Bonder for MEMS Assembly WA9 The latest development, design and reliability issues in 3D die stacking technologies will be presented in this session. Designing 3D Packages for High Performance Ultra Dense Multichip Module Packaging Technology Advanced Packaging Technology - Reliability Report WA10 Some important issues in the manufacturing and reliability of PWB. Desmear Uniformity Technology in a Plasma Process PTH Reliability Modeling with the Consideration of Manufacturing
Process Advanced High Density Substrates Technology for 100 Micron Pitch
Flip Chip and Wafer Level Packaging WA11 Advanced techniques for stacked design, embedding components and increasing connection reliability at low cost. High Density Thick Film Substrates for Miniaturized 3D Chip Stacking
Packaging Solutions Progress in the Integration
of Planar and 3D Coils on LTCC by using Photoimageable Inks Materials and Processes for Plateable Conductors on LTCC WP1 One-on-one Interactive Forum. This is your chance for detailed interaction with authors whose work is too good to miss. Dot-to-Dot Maskless Bulk Interconnect Process for Stacked Chip
Packaging A New Ball Placement Approach for Maximizing Board Level Routability
of BGA Packages Failure Analysis of Lead-Free Solder Joints for High-Density Packages Parasitics in Power Electronics Packaging A Novel Design Methodology for RF-Packages Development of Ultra-Thin Flip Chip Assemblies for Low Profile
SiP Applications Wafer-Level Packaging for RF Applications using High-Resistivity
Polycrystalline Silicon Substrate Technology Development of Plasma Metal Direct Bonding (P-MDB) by Surface
Activated Energy A Performance Driven Bumping Solution for Automotive Power Devices Development of LTCC Post Fired Resistors for A6M/Gold Material
System A Novel Layout Synthesis Algorithm of Embedded Passive Components
for RF Reliable System Design Reliability Analysis and Experimental Study on the Processing
and Interactions of Benzocyclobutene, Flux, and Underfill Materials
to Under Bump Metallurgy on Manufacturing of Advanced Flip Chip
HiCTE Packages Wire-bonding-less Interconnection Technique for High Current Power
Modules Development of Ultrasonic Flip-Chip-Bonding Interconnection Technologies Thermal Stress Phenomena Induced into a Packaged Polymer AWG Packaging for Optical Rx/Tx Arrays: From BGA to CSP Packaging Reliability of SnAgCu Die Attach in Power Modules An Optimal Design of the Chip-Stage for the use in the COF Packaging
Process Thick Film Based on ZnFe2O4+NiO+TiO2 Mixture as Propanol and Toluene
Gas Sensor Application of using Photo-Sensitive Polyimide as Wafer Passivation
on 300mm Wafer Bump Process and Manufacturing Benefits of Flip
Chip Package Modeling and Design of Compact Multilayer LCP Filters for 802.11
WLAN Applications using Coupled Neural Networks and Genetic Algorithms Nonlinear Finite Element Modeling and PWB Warpage Analysis of
Elastomeric Land Grid Array Connectors Optimization of 100 Micron Pitch Lead Free Solder Assembly Process
for High Reliability at 10ghz Signal Transmission Thermal-Mechanical Degradation of Direct Chip Attach (DCA) to
IMS for Power Applications Measuring and Modeling the Deformation of BGA Lead-free Solder
Joints under High Current Density WP2 Learn about two advanced packages and a novel cooling method here. Thermal Characterization of Thermally Enhanced FBGA MCP High Performance Memory Module based on DDP Thermosyphon Cooling for Next Generation Microelectronics Using
High Conductivity Graphite Foam WP3 This session includes MEMS packaging solutions for automotive, RF, and gyroscope applications. MEMS Multichip Package Development for Automotive Applications Design, Material and Process Optimization to Enhance the RF MEMS
Switch Functionality Stress Minimization in Ceramic MEMS Gyroscope Packages WP4 This session looks at new developments in the field of molding compounds, including reliability, compatibility with lead-free processes, and halogen-free systems. Characterization of Poly Imide Passivation for Failure Mechanism
of Delamination in Packaging One Methodology for MSL1/260? Approaching in Lead Frame Based
Package Green Molding Compounds for JEDEC Level 1 Performance WP5 RFID, textile and wearable electronics require new methods, materials and concepts. This session features recent developments for the next microelectronic revolution. Conductive Adhesives for RFID Assembly: Low Temperature Snap Cure
Thermosets vs Thermoplastics Highly Conductive Printable Inks for Flexible and Low-Cost Circuitry Routing Methods Adapted to e-Textiles WP6 Continued growth in new materials and methods for making ceramic embedded passives along with new filter complex. Process Issues and Effect of Process Variables on Electrical and
Mechanical Properties of Co-Fired LTCC Substrates Tape-on-Substrate Dielectric Technologies Production Development of a Zero-Shrink LTCC Material System WP7 Thermal analysis of systems in three critical designs are described here. Thermal Analysis of an Electronic Module with a Double-sided PCB
Housed in a 2-MCU Enclosure for Avionic Applications Advanced VLSI Packaging and Interconnect Solution for High Performance
Servers A Study on the Thermal Problems of an Optical Pickup Actuator WP8 Low cost packaging for optical MEMS, including HTTC and liquid crystal polymers, is the focus of this session. Multilayer HTCC Packaging for Spectral Biometric Sensors Near Hermetic Liquid Crystal Polymer Air Cavity Packaging Low Cost Air Cavity LCP (Liquid Crystal Polymer) Packaging WP9 The Flip Chip Under Bump Metallurgy (UBM) Session will cover topics related to past, present and future issues in UBM like reliability, geometry, low k dielectric and copper interconnect. Mechanisms related to interfacial reactions and intermetallic growth issues will also be covered. Finally, the affects of zincate in conjunction with Ni plating in UBM will be reviewed for optimal strength and reliability. C4 Solder Bump UBM Reliability and Outlook Interfacial Reactions and Reliabilities of Pb-Free Solders on
Ni-xCu Alloy UBMs Effects of Under Bump Metallization on Solder Bump Reliability WP10 Investigation of the effects of design parameters including vias on the thermal and electrical performane of PWB. Impact of Vias on Printed Circuit Board Performance Coupled Thermal-Electric Analysis of Trace and Via Joule Heating
in Multilayer Structures Optimal Design towards Enhancement of Board-Level Thermomechanical
Reliability of Bare-Die-Type Chip-Scale Packages WP11 Microwave and RF technology are continuing to expand and permeate through the market- place. This session will focus on Microwave & RF Packaging including 1st level packaging and its applications. Development of a Low Cost Millimeter-Wave BGA Package: Electrical
Design, RF Characterization, and EMI Analysis A Comparative Study of Compact Rectangular Microstrip Antenna
with Slots on Radiating Patch and Ground Plane Broadband Leaded Transitions and a Narrow Band via Structure for
Multi-Layer Hermetic Packaging WP12 - Special Session - FREE TO ALL The GBC (Global Business Council)
will offer a free-of-charge Marketing Forum to all IMAPS 2004
attendees who wish to participate.
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IMAPS
- International Microelectronics And Packaging Society
611 2nd Street, NE -- Washington, DC 20002 imaps @ imaps.org | 202.548.4001 |