Advance Technical Program
Wednesday, November 17, 2004



or browse the program:

By Day: By Session:
Tuesday TA1 | TA2 | TA3 | TA4 | TA5 | TA6
TP1 | TP2 | TP3 | TP4 | TP5 | TP6 | TP7 | TP8 | TP9 | TP10
Wednesday WA1 | WA2 | WA3 | WA4 | WA5 | WA6 | WA7 | WA8 | WA9 | WA10 | WA11
WP1 | WP2 | WP3 | WP4 | WP5 | WP6 | WP7 | WP8 | WP9 | WP10 | WP11 | WP12
Thursday THA1 | THA2 | THA3 | THA4 | THA5 | THA6 | THA7 | THA8 | THA9 | THA10 | THA11 | THA12 | THA13 | THA14 | THA15 | THA16

WA1
High Heat Flux Management and Direct Die Attach Solder TIMS

Chair: Dave Saums, DS&A LLC
8 am - 9:25 am

Here we address some ways of handling the high CTE stress caused by high heat FLUX.

Thermal Conductivity and Thermal Expansion of Functionally Engineered Solders
Tony Ingham, Dave Kyaw, John Laughlin, Brian Lewis, Cookson Electronics

Sequential Deposition of Copper/Alumina Composites
Eugene A. Olevsky, X. Wang, J. Ma, A. Maximenko, San Diego State University; M. Stern, B. M. Guenin, Sun Microsystems

Thermal Placement Design Optimization of Silicon Chip with Non-Uniform Power Distribution using Genetic Algorithms
Teck Joo Goh, Intel Products (Shanghai) Ltd.; K. N. Seetharamu, G. A. Quadir, Z. A. Zainal, Universiti Sains Malaysia


WA2
RF MEMS Packaging
Chair: David Galipeau, South Dakota State University
8 am - 9:25 am

RF MEMS is an important emerging technology. This session covers several approaches for wafer level hermetic packaging of these devices.

Wafer Level Hermetic Packaging for Above-IC RF MEMS: Process and Characterization
Nicolas Sillon, P. Robert, E. Dahan, X. Baillin, C. Gillot, E. Lagoutte, CEA-Leti

Localized Hermetic Micropackaging using Laser Sealing for RF Micro-electromechanical Systems
Gustina Collins, Sanjay Raman, Guo-Quan Lu, Virginia Tech

A Universal Cost Effective Vacuum Chip-Scale Packaging for RF MEMS
Guohong He, Barry Wissman, Jim MacDonald, Didier Lacroix, Discera Inc.


WA3
3D Integration and Packaging I
Chair: Rajen Chanchani, Sandia National Laboratories
8 am - 9:25 am

The latest development, design and reliability issues in 3D die stacking technologies will be presented in this session.

Flip-Chip-to-Wafer Stacking: Enabling Technology for Volume Production of 3D System Integration on Wafer Level
Christoph Scheiring, Hannes Kostner, Datacon Semiconductor Equipment GmbH; Paul Lindner, Stefan Pargfrieder, EV Group

Stacked Die Package Design Optimization
Tiao Zhou, Mark Gerber, Texas Instruments; Moody Dreiza, Amkor Technologies

Evaluation on Die Cracking due to Handling Damage in FBGA DDP for Memory Device using Handling Impact Test
Duk Yong Lee, Ho Jeong Moon, Shin Kim, Seung Woo Kim, Hee Kook Choi, Samsung Electronics


WA4
PB Free Assembly II
Chair: Steve Adamson, Asymtek
8 am - 8:55 am

This session is centered upon the advances in aspects of Lead-free assembly. The papers focus on the underfill for fine pitch small diameter Pb-free CPSs, handling of heat sensitive components at higher reflow temperatures and the impact of pad design and process conditions on joint reliability. These too are all critical issues in the implementation of Lead-Free solder assembly.

Lead-Free Assembly of Heat-Sensitive Components
Alan Rae, Cookson Electronics Inc.; Rahut Raul, Daryl Santos, SUNY Binghamton

Lead-Free PCB Assembly and Effect of Process Conditions on Solder Joint Profile and Reliability of Solder Joints
Periannan Arulvanan, Shi Xunqing, Singapore Institute of Manufacturing Technology; Zhong Zhaowei, Nanyang Technological University


WA5
Thick Film & LTCC Applications I
Chair: Roy Tom Coyle Jr., Northrop Grumman Space Technology
8 am - 9:25 am

Interconnect to mounted components and the advantages of embedding those components. Core issues in this maturing technology.

Ball Shear vs. Wire Pull Testing Wire Bond Baseline Study on Two Gold Thick Film Formulations
Luis Bravo, Collen Khalifa, Teledyne Electronic Technologies

LTCC Technologies for Harsh-Environment Automotive Applications Utilizing Soldered Interconnections
Christopher Needes, Michael A. Smith, Mark A. Fahey, Patricia J. Ollivier, DuPont; M. Ray Fairchild, Jerry L. Badgett, Carl W. Berlin, John D. Myers, D.H.R. Sarma, Jiming Zhou, David W. Zimmerman, Delphi

Design of Integrated Inductances Based on Ferromagnetic LTCC-Layers
Robert Hahn, Stephan Schwerzel, Stefan Wagner, Grit Sommer, Fraunhofer Institute for Reliability and Microintegration


WA6 - Special Session - FREE TO ALL
GBC Business Spotlight Session
Chair: Paul Galletta, Teledyne Electronic Technologies
8:30 am - 9:30 am

This is a one hour session. Writing proposals is often frustrating and time consuming. By following a few simple guidelines, you can make the job easier for yourself and increase your chances of winning. Tom Sant will identify the seven deadliest mistakes in proposal writing and - more important - show you how to avoid them. He will explain a four-step process for structuring your proposals that will result in higher win ratios, how to use evidence to gain credibility, and how to communicate a compelling value proposition.

Proposal Writing
Session Leader – Tom Sant, Hyde Park Partners

Sant is the author of Persuasive Business Proposals, the largest selling book on the subject, now in its second edition. The American Management Association has called him “America’s foremost expert on proposal writing,” and SellingPower magazine named him one of the “top ten sales trainers in the world.” This one hour session will give an overview of the process of proposal writing for all aspects associated with doing business within our industry.


WA7
High Thermal Conductivity TIM and Die Attach Applications
Chair: Herb Dwyer, Consultant
10:20 am - 11:15 am

Listen to very advanced power die attach approaches, including the use of nanomaterials.

Lead Free Die Mount Adhesive using Silver Nanoparticles Applied to Power Discrete Package
Yasunari Ukita, Toshiba Corporation

Thermal Management of Very High Power Microwave Devices
Ray Fillion, David Shaddock, Laura Meyer, Jerome Garrett, Joshua Wright, Peter Bronecke, General Electric Company


WA8
MEMS Packaging Processes
Chair: Janet Lumpp, University of Kentucky
10:20 am - 11:45 am

This session covers new processes for wafer level MEMS packaging including flip-chip and solder.

Low Cost Hermetic Wafer-Level Packaging of Magnetic Proximity MEMS Switches
Gordon Elger, Lior Shiv, Matthias Hesche, Hymite GmbH Berlin; Jean-Francois Veneau, MEMScAP, S.A.; Konstantin Glukh, MEMScAP, Inc.

Wafer Level Vacuum Packaging Technology using Molten Solder Ejection Method
Yoshinori Yokoyama, Hiroshi Fukumoto, Hisatoshi Hata, Yoshiyuki Nakaki, Munehisa Takeda, Mitsubishi Electric Corporation

Flip-Chip Bonder for MEMS Assembly
Daniel N. Pascual, SUSS MicroTec


WA9
3D Integration and Packaging II
Chair: Rajen Chanchani, Sandia National Laboratories
10:20 am - 11:45 am

The latest development, design and reliability issues in 3D die stacking technologies will be presented in this session.

Designing 3D Packages for High Performance
Vern Solberg, Tessera, Inc.

Ultra Dense Multichip Module Packaging Technology
Caroline Kondoleon, Thomas Marinis, Dariusz Pryputniewicz, Gary Tepolt, Charles Stark Draper Laboratory

Advanced Packaging Technology - Reliability Report
Martin G. Sosa, Hytek Microsystems Inc.


WA10
PWB Fabrication
Chair: R. Wayne Johnson, Auburn University
10:20 am - 11:45 am

Some important issues in the manufacturing and reliability of PWB.

Desmear Uniformity Technology in a Plasma Process
Lou Fierro, James Getty, March Plasma Systems

PTH Reliability Modeling with the Consideration of Manufacturing Process
Jingsong Xie, Diganta Das, Michael Pecht, Kerry Eubanks, University of Maryland

Advanced High Density Substrates Technology for 100 Micron Pitch Flip Chip and Wafer Level Packaging
Fuhan Liu, Venky Sundaram, Ankur O. Aggarwal, George White, Rao R. Tummala, Georgia Institute of Technology


WA11
Thick Film & LTCC Applications II
Chair: John Menaugh, DuPont Microcircuit Materials
10:20 am - 11:45 am

Advanced techniques for stacked design, embedding components and increasing connection reliability at low cost.

High Density Thick Film Substrates for Miniaturized 3D Chip Stacking Packaging Solutions
John Crumpton, Robert Waldrop, Michael Skurski, DuPont; Mark Vandermeulen, David Roy, Sam Pirritano, Thomas Bernacki, Ivo Koutsaroff, Charles Divita, Sukhi Binapal, Gennum

Progress in the Integration of Planar and 3D Coils on LTCC by using Photoimageable Inks
Rubén Perrone, Heiko Thust, Karl-Heinz Drüe, Ilmenau Technical University

Materials and Processes for Plateable Conductors on LTCC
Patricia J. Ollivier, DuPont Microcircuit Materials; Mark Rine, Spectronics Inc.


WP1
Interactive Forum (Poster Session)
Chair: Mike Ehlert, National Semiconductor LTCC Foundry
1 pm - 4 pm

One-on-one Interactive Forum. This is your chance for detailed interaction with authors whose work is too good to miss.

Dot-to-Dot Maskless Bulk Interconnect Process for Stacked Chip Packaging
William Hamburgen, Google

A New Ball Placement Approach for Maximizing Board Level Routability of BGA Packages
Bhanu Jaiswal, Albert H. Titus, State University of New York at Buffalo

Failure Analysis of Lead-Free Solder Joints for High-Density Packages
John H. Lau, Dongkai Shangguan, Todd Castello, Rob Horsley, Joe Smetana, Walter Dauksher, Dave Love, Irv Menis, Bob Sullivan, Agilent Technologies, Inc.

Electromigration Induced Stress Analysis using fully Coupled Mechanical and Diffusion Finite Element Analysis with Non Linear Material Properties
Minghui Lin, Cemal Basaran, State University of New York at Buffalo

Parasitics in Power Electronics Packaging
Didier Cottet, Amina Hamidi, ABB Switzerland, Coporate Research

A Novel Design Methodology for RF-Packages
Kazuhide Uriu, Toru Yamada, Masahiro Yamaoka, Matsushita Electric Industrial Co., Ltd.

Development of Ultra-Thin Flip Chip Assemblies for Low Profile SiP Applications
Charles Banda, Harry K. Charles, John S. Lehtonen, Allen C. Keeney, Samuel F. Wilderson, Johns Hopkins University - Applied Physics Lab.

Wafer-Level Packaging for RF Applications using High-Resistivity Polycrystalline Silicon Substrate Technology
Alexander Polyakov, S.M. Sinaga, M. Bartek, J.N. Burghartz, Delft University of Technology

Development of Plasma Metal Direct Bonding (P-MDB) by Surface Activated Energy
Kazushi Higahi, Shinji Ishitani, Mathushita Electric Industrial Co., Ltd.

A Performance Driven Bumping Solution for Automotive Power Devices
Thorsten Teutsch, PacTech USA - Packaging Technologies, Inc.; T. Oppert, E. Zakel, Pac Tech – Packaging Technologies GmbH; Mervi Paulasto-Kröckel, Motorola GmbH

Development of LTCC Post Fired Resistors for A6M/Gold Material System
Michail Moroz, Ferro Electronic Material Systems

A Novel Layout Synthesis Algorithm of Embedded Passive Components for RF Reliable System Design
Grit Sommer, Werner John, Herbert Reichl, Fraunhofer IZM

Reliability Analysis and Experimental Study on the Processing and Interactions of Benzocyclobutene, Flux, and Underfill Materials to Under Bump Metallurgy on Manufacturing of Advanced Flip Chip HiCTE Packages
Surasit Chungpaiboonpatana, Mindspeed (Conexant) Inc.; Frank G. Shi, University of California - Irvine

Wire-bonding-less Interconnection Technique for High Current Power Modules
Shingo Sudo, Hiroaki Maeda, Satoshi Hirakawa, Tsuyoshi Takayama, Atsushi Narazaki, Mitsubishi Electric

Development of Ultrasonic Flip-Chip-Bonding Interconnection Technologies
Naoki Sakota, Koki Kitaoka, Tomotoshi Satoh, Sharp Corporation

Thermal Stress Phenomena Induced into a Packaged Polymer AWG
Amelia G. Grobnic, Robert James, Claire Callender, Communications Research Centre Canada

Packaging for Optical Rx/Tx Arrays: From BGA to CSP Packaging
François Marion, Julien Routin, CEA-LETI; Ronny Bockstaele, Olivier Rits, IMEC

Reliability of SnAgCu Die Attach in Power Modules
F. P. McCluskey, YunQi Zheng, University of Maryland; Dan Huff, Virginia Tech; Peter Hansen, John Jacobsen, Grundfos A/S - Denmark

An Optimal Design of the Chip-Stage for the use in the COF Packaging Process
T.C. Hung, C.H. Chiu, I-Shou University

Build Up Organic Optical Platform for Wide Bandwidth Optical Links by Integrated Optical Devices and Elements
Fuhan Liu, Daniel Guidotti, Zhaoran Wang, G.K. Chang, Rao R. Tummala, Georgia Institute of Technology

Thick Film Based on ZnFe2O4+NiO+TiO2 Mixture as Propanol and Toluene Gas Sensor
Khalil Arshak, I. Gaidan, University of Limerick

Application of using Photo-Sensitive Polyimide as Wafer Passivation on 300mm Wafer Bump Process and Manufacturing Benefits of Flip Chip Package
Rick Yu, Tom Tai, Mars Tsai, Advanced Semiconductor Engineering, Inc. (ASE)

A Novel Three-Phase Motor Drive Utilizing Silicon on Insulator (SOI) and Silicon-Carbide (SiC) Electronics for Extreme Environment Operation in the Army Future Combat Systems (FCS)

Jared M. Hornberger, J. Hornberger, S. Magan Lal, A. B. Lostetter, K. J. Olejniczak, and A. Mantooth, Arkansas Power Electronics International, Inc.

Modeling and Design of Compact Multilayer LCP Filters for 802.11 WLAN Applications using Coupled Neural Networks and Genetic Algorithms
Rana Jitendra Pratap, Saikat Sarkar, Stephane Pinel, Joy Laskar, Gary S. May, Georgia Institute of Technology

Nonlinear Finite Element Modeling and PWB Warpage Analysis of Elastomeric Land Grid Array Connectors
Juan Cepeda-Rizo, Teradyne, Inc.; Hsien-Yang Yeh, California State University; Nick Teneketges, Semiconductor Test Division, Teradyne, Inc.

Optimization of 100 Micron Pitch Lead Free Solder Assembly Process for High Reliability at 10ghz Signal Transmission
Ravi Doraiswami, Sandeep Sankararaman, Piyush Gupta, Woopoung Kim, Raghav Madhavan, Zhuqing Zhang, Lianhua Fan, Venky Sundaram, Fuhan Liu, Seyed Hosseini, Madhavan Swaminathan, C.P. Wong, Rao R. Tummala, Georgia Institute of Technology

Thermal-Mechanical Degradation of Direct Chip Attach (DCA) to IMS for Power Applications
Weidong Zhuang, Mark Cook, Grant Maloney, International Rectifier

Measuring and Modeling the Deformation of BGA Lead-free Solder Joints under High Current Density
Hua Ye, Cemal Basaran, Douglas C. Hopkins, State University of New York at Buffalo


WP2
Thermal Components and Low Resistance Package Development
Chair: Dave Saums, DS&A LLC
1:20 pm - 2:45 pm

Learn about two advanced packages and a novel cooling method here.

Thermal Characterization of Thermally Enhanced FBGA MCP
Joonghyun Baek, Sangwook Park, Samsung Electronics Co., Ltd.

High Performance Memory Module based on DDP
Sangwook Park, Joonghyun Baek, Haehyung Lee, Dongho Lee, Seyong Oh, Samsung

Thermosyphon Cooling for Next Generation Microelectronics Using High Conductivity Graphite Foam
Terry Tiegs, James Klett, Michael Trammell, Oak Ridge National Laboratory


WP3
MEMS Packaging
Chair: Ryszard J. Pryputniewicz, Worcester Polytechnic Institute
1:20 pm - 2:45 pm

This session includes MEMS packaging solutions for automotive, RF, and gyroscope applications.

MEMS Multichip Package Development for Automotive Applications
Tania Van Bever, Guy Brizar, AMI Semiconductor

Design, Material and Process Optimization to Enhance the RF MEMS Switch Functionality
Ananda P. De Silva, Lianjun Liu, Henry Hughes, Motorola Semiconductor Product Sector

Stress Minimization in Ceramic MEMS Gyroscope Packages
C. H. Yun, X. Zhang, J. Kuang, Y. Xu, J. A. Geen, P. W. Farrell, Analog Devices Inc.


WP4
Electronic Molding Compounds
Chair: Lyndon Larson, Dow Corning Electronics
1:20 pm - 2:45 pm

This session looks at new developments in the field of molding compounds, including reliability, compatibility with lead-free processes, and halogen-free systems.

Characterization of Poly Imide Passivation for Failure Mechanism of Delamination in Packaging
KeunSoo Kim, Min Yoo, HeeYeoul Yoo, Amkor Technology - Korea

One Methodology for MSL1/260? Approaching in Lead Frame Based Package
Jeffrey C. B. Lee, Advanced Semiconductor Engineering Inc.

Green Molding Compounds for JEDEC Level 1 Performance
Tanweer Ahsan, Henkel Corporation


WP5
RFID, Textile, Wearable Electronics
Chair: Herbert Neuhaus, Scimaxx Solutions
1:20 pm - 2:45 pm

RFID, textile and wearable electronics require new methods, materials and concepts. This session features recent developments for the next microelectronic revolution.

Conductive Adhesives for RFID Assembly: Low Temperature Snap Cure Thermosets vs Thermoplastics
Chih-Min Cheng, Vito Buffa, Wanda O’Hara, Bo Xia, Emerson and Cuming

Highly Conductive Printable Inks for Flexible and Low-Cost Circuitry
Paul Berry, Greg Butch, Marjorie Dwane, Dow Corning Corporation

Routing Methods Adapted to e-Textiles
Ivo Locher, Tuende Kirstein, Gerhard Troester, ETH Zurich


WP6
LTCC Advances
Chair: Roy Tom Coyle Jr., Northrop Grumman Space Technology
1:20 pm - 2:45 pm

Continued growth in new materials and methods for making ceramic embedded passives along with new filter complex.

Process Issues and Effect of Process Variables on Electrical and Mechanical Properties of Co-Fired LTCC Substrates
Chua Kai Meng, Periannan Arulvanan, Fan Wei, Vasudivan Sunappan, Singapore Institute of Manufacturing Technology

Tape-on-Substrate Dielectric Technologies
Barry E. Taylor, Larry Bidwell, Rick Draudt, DuPont Microcircuit Materials

Production Development of a Zero-Shrink LTCC Material System
Frans Lautzenhiser, Weiming Zhang, Samson Shahbazi, CTS Corporation - Microwave Division


WP7
System Level Thermal Solutions
Chair: Douglas C. Hopkins, State University of New York at Buffalo
3:40 pm - 5:05 pm

Thermal analysis of systems in three critical designs are described here.

Thermal Analysis of an Electronic Module with a Double-sided PCB Housed in a 2-MCU Enclosure for Avionic Applications
Jonas Johansson, Ilja Belov, Kristina Säfsten, Peter Leisner, Jönköping University - SaabTech AB

Advanced VLSI Packaging and Interconnect Solution for High Performance Servers
Sam Dai, Hewlett Packard

A Study on the Thermal Problems of an Optical Pickup Actuator
Jung Eung Park, Hyo-Kune Hwang, Sam-Nyol Hong, Jin-woo Lee, Wae-yeul Kim, LG Electronics Inc.


WP8
Hermetic and Near-hermetic MEMS Packaging
Chair: Ryszard J. Pryputniewicz, Worcester Polytechnic Institute
3:40 pm - 5:05 pm

Low cost packaging for optical MEMS, including HTTC and liquid crystal polymers, is the focus of this session.

Multilayer HTCC Packaging for Spectral Biometric Sensors
Stephen P. Corcoran, Robert Rowe, Kristin Nixon, Lu Fan, Lumidigm, Inc.

Near Hermetic Liquid Crystal Polymer Air Cavity Packaging
John W. Roman, RJR Polymers Inc.

Low Cost Air Cavity LCP (Liquid Crystal Polymer) Packaging
Michael A. Zimmerman, Quantum Leap Packaging, Inc.


WP9
Flip Chip Under Bump Metallurgy
Chair: Tim Lenihan, RVSI, Semiconductor Equipment Group
3:40 pm - 5:05 pm

The Flip Chip Under Bump Metallurgy (UBM) Session will cover topics related to past, present and future issues in UBM like reliability, geometry, low k dielectric and copper interconnect. Mechanisms related to interfacial reactions and intermetallic growth issues will also be covered. Finally, the affects of zincate in conjunction with Ni plating in UBM will be reviewed for optimal strength and reliability.

C4 Solder Bump UBM Reliability and Outlook
Jianxing Li, Mahalingam Sankararaman, Raymond Carey, Avi Fuerst, William Johannes, Intel Corporation

Interfacial Reactions and Reliabilities of Pb-Free Solders on Ni-xCu Alloy UBMs
Hun Han, T.Y. Lee, Jin Yu, KAIST

Effects of Under Bump Metallization on Solder Bump Reliability
Weimin Chen, J.F. Rohan, P. Byrne, P. McCloskey, S.C. O'Mathuna, NMRC; P. J. McNally, L. O'Reilly, Research Institute for Networks and Communications Engineering (RINCE)


WP10
PWB Thermal Design and Characteristics
Chair: R. Wayne Johnson, Auburn University
3:40 pm - 5:05 pm

Investigation of the effects of design parameters including vias on the thermal and electrical performane of PWB.

Impact of Vias on Printed Circuit Board Performance
Dennis Lang, Chung-lin Wu, Fairchild Semiconductor

Coupled Thermal-Electric Analysis of Trace and Via Joule Heating in Multilayer Structures
Mudasir Ahmad, Mason Hu, David Popovich, Cisco Systems Inc.

Optimal Design towards Enhancement of Board-Level Thermomechanical Reliability of Bare-Die-Type Chip-Scale Packages
Yi-Shao Lai, Tong Hong Wang, Advanced Semiconductor Engineering, Inc.


WP11
Microwaves & RF
Chairs: Peter Barnwell, Consultant & Aicha Elshabini, University of Arkansas
3:40 pm - 5:05 pm

Microwave and RF technology are continuing to expand and permeate through the market- place. This session will focus on Microwave & RF Packaging including 1st level packaging and its applications.

Development of a Low Cost Millimeter-Wave BGA Package: Electrical Design, RF Characterization, and EMI Analysis
Hongwei Liang, Joy Laskar, Texas Instruments Inc.

A Comparative Study of Compact Rectangular Microstrip Antenna with Slots on Radiating Patch and Ground Plane
R. M. Vani, P.V. Hunagund, University Gulbarga - India; S.F. Farida, University of Utah; K. Swathi, Osmania University - India

Broadband Leaded Transitions and a Narrow Band via Structure for Multi-Layer Hermetic Packaging
Paul Garland, Gerardo Aguirre, Kyocera America, Inc.


WP12 - Special Session - FREE TO ALL
Marketing Forum
Chairs: Michael O’Neill, Heraeus Inc. - Circuit Materials Division; Howard Imhof, Metalor; John Voultos, DuPont Company
3:40 pm - 5:05 pm

The GBC (Global Business Council) will offer a free-of-charge Marketing Forum to all IMAPS 2004 attendees who wish to participate.

 

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