Professional Development Courses (PDCs)
Sunday, November 14, 2004

All PDCs run 9am - 5pm unless otherwise noted.

PDC Info | Monday PDCs

S2
Flip Chip and CSP Technologies – Constructions, Materials, Assembly and Reliability
Course Leader:
R. Wayne Johnson, Ph.D., Auburn University

Course Description:
The increasing number of I/O per semiconductor chip combined with the product driven requirements of thinner, smaller and lighter weight have lead the electronics packaging and assembly industry to chip scale packages and flip chip (Flip Chip in Package (FCiP) and Flip Chip on Laminate (FCoL)) technologies. In fact, many CSPs use FCiP constructions. This course will begin by examining the drivers for flip chip and CSP technologies, then examine the options, their construction and trade-offs. 3-D CSPs will also be examined. Substrate design requirements will be discussed including routing, and pad design. Major assembly issues are flux selection for flip chip, solder paste printing for CSPs, underfilling, if necessary, and inspection. Underfilling which is not a traditional SMT assembly process is required for flip chip and often for CSPs. The underfill process and material options for flip chip and CSP will be examined. Recently, wafer applied underfill material concepts for FCoL assemblies have been discussed and this new technology concept will be explored. The replacements of leads by solder spheres impacts reliability, particularly in thermal cycling and bending, and must be considered prior to implementing these technologies. The course will conclude with a discussion of reliability.

Who should attend?
This course is intended for those individuals soon to be responsible for implementing flip chip assembly, suppliers of materials and equipment for flip chip assembly and others interested in flip chip implementation.

Dr. Johnson is an Alumni Professor of Electrical Engineering at Auburn University and Director of the Laboratory for Electronics Assembly and Packaging (LEAP). At Auburn, he has established teaching and research laboratories for advanced packaging and electronics assembly. Research efforts are focused on materials, processing, and reliability for electronics assembly. He has worked in MCM design, MCM-L, -C and -D substrate technology as well as advanced SMT, wire bond and flip chip assembly techniques. He has published and presented numerous papers at workshops and conferences and in technical journals. He has also co-edited one IEEE book on MCM technology and written two book chapters in the areas of silicon MCM technology and MCM assembly. He received the 1997 Auburn Alumni Engineering Council Senior Faculty Research Award for his work in electronics packaging and assembly.

Dr. Johnson is the current Technical Vice President of IMAPS and was the 1991 President of the Society. He received the 1993 John A. Wagnon, Jr. Technical Achievement Award from ISHM, was named a Fellow of the Society in 1994 and received the Daniel C. Hughes Memorial Award in 1997. He is also a member of IEEE, SMTA, and IPC.

Dr. Johnson received the B.E. and M.Sc. degrees in 1979 and 1982 from Vanderbilt University, Nashville, TN, and the Ph.D. degree in 1987 from Auburn University, Auburn, AL, all in electrical engineering. He has worked in the microelectronics industry for DuPont, Eaton, and Amperex.

S3
The Integrated Circuit – The Packaging, Assembly, and Interconnections
Course Leader:
William J. Greig, Greig Associates

Course Description:
This course provides an overview of electronics/microelectronics manufacturing and addresses the impact of both the Integrated Circuit and End Product, i.e., “smaller, better, cheaper.” It covers IC packaging, chip assembly, and HDI packages and substrates. It focuses on packaging trends, in particular area array, namely the BGA, the CSP, and the Flip Chip. Flip Chip and its counterpart the Wafer Level CSP, are discussed and evaluated as an IC “package” and an assembly technology. It discusses advantages of alternative packaging options including multichip packaging (MCP), and Chip On Board (COB). Emerging 3-D packaging initiatives rapidly entering mainstream are examined at both the chip and package levels, i.e., both die and package stacking.

High Density Interconnect (HDIs) packages/substrates manufacturing process technologies are reviewed including Thick Film, Co-fired Ceramic, and Thin Film that support Level 1.0 SCP and MCP and Level 2.0 PWBs. In the later case, significant developments in the PWB process technology are presented including Build Up Technologies (BUT) that offer increased wiring density, fine lines and spaces, and microvias.
Throughout the course, technical issues will be emphasized and reliability concerns addressed where appropriate.

Who should attend?
The course is effectively a primer covering primarily the microelectronic packaging arena. It is intended for a variety of individuals, technical and non-technical, whether directly or indirectly involved with electronic product manufacturing. It will serve as a review of current and emerging technologies for the experienced engineer and technician or as an introduction to the various technologies for anyone new to the industry. It should be of particular interest to those in support activities, such as procurement, quality assurance, marketing and sales, by providing an adequate technology base for evaluating, planning or implementing.

Special Course Material:
All attendees will receive a complimentary copy of Hybrid Microcircuit Technology Handbook, by J. Licari, L. Enlow, 2nd Edition, Noyes Publications, 1998 (List Price $140).

William “Bill” Greig is currently an independent consultant specializing in microelectronic packaging and assembly. His previous work experiences include RCA Semiconductor, General Electric Co., Lockheed Electronics, and NASA. His areas of expertise cover semiconductor wafer processing and assembly, hybrid circuit manufacture, and printed wiring board fabrication. He has been granted 6 patents and has published or presented numerous papers at various technical symposia. He has presented courses at various national symposia and participated in CEE programs at U. of Wisconsin, Lehigh University and Rutgers University. He is a member of SMTA and IMAPS in which he is a Fellow, and Past President of the Garden State Chapter.

S4 - New Course
Microwave & Millimeter Wave Packaging; Basics, Materials and Processes
Course Leader:
Aicha Elshabini & Fred Barlow, University of Arkansas

Course Description:
Today a wide range of applications require circuits or circuit elements which process high frequency information in the radio wave frequency band, as well as in the microwave range (300 MHz-30 GHZ) and the millimeter wave frequency range (30 GHz-300 GHz). These applications are rapidly growing and include communication devices such as cell phones, wireless networking, as well as a wide range of radar and electronic warfare applications. These types of applications often are associated with unique challenges not found in digital or low frequency circuits. In many cases the packaging considerations are fundamentally different in these frequency ranges.

This course will serve as an introduction to package design, fabrication, and testing for microwave and millimeter wave applications. It will cover the basic issues that make high frequency circuits unique, as well as planar transmission line structures; their design, and behavior. Materials and fabrication technologies applicable to high frequency circuits will be discussed in detail. In addition, the design of passive structures to achieve common electrical functions such as filters, couplers, inductors, capacitors, etc., will be covered. Finally, methodologies for the design and simulation of structures and circuits will be described as well as methods for the measurement and characterization of their electrical properties.

The course will also touch on the latest trends in this area such as MEMS switches, and the latest advances in MMIC and wideband gap semiconductors such as GaN.

Who should attend?
Engineers, managers, and technicians, who wish to expand their background or strengthen their understanding of the Microwave and Millimeter Wave technology. The course will not assume any prerequisite background.

Fred Barlow earned a Bachelors of Science in Physics and Applied Physics from Emory University, a Masters of Science in Electrical Engineering from Virginia Tech, and a Ph.D. in Electrical Engineering from Virginia Tech. He is currently working as an Associate Professor in the Electrical Engineering Department at University of Arkansas. Dr. Barlow has published widely on electronic packaging and electronic materials evaluation and is Co-Editor of The Handbook of Thin Film Technology (McGraw Hill, 1998), as well as the upcoming text entitled, Ceramic Interconnect Handbook (to be published by Marcel Dekker 2004).

Aicha Elshabini is Professor of Electrical and Computer Engineering. She obtained a B.Sc. in Electrical Engineering at Cairo University, in both Electronics and Communications areas, a Masters in Electrical Engineering at University of Toledo, in Microelectronics, and a Ph.D. Degree in Electrical Engineering at the University of Colorado, in Semiconductor Devices and Microelectronics. Currently, she is serving the position of University Professor and Department Head for the Electrical Engineering Department at University of Arkansas (since July 1, 1999). She has been serving as the faculty advisor for IMAPS student society at both institutions since 1980 to present time. Elshabini is a Fellow member of IEEE/CPMT Society (1993) Citation for ‘Contribution to Hybrid Microelectronics Education and to Hybrid Microelectronics to Microwave Applications’, a Fellow member of IMAPS Society (1993), The International Microelectronics and Packaging Society, Citation for ‘Continuous Contribution to Microelectronics and Microelectronics Industries for numerous years’. Dr. Elshabini was awarded the 1996 John A. Wagnon Jr., Technical Achievement Award from IMAPS. She served as the Editor of the IMAPS International Journal of Microcircuits & Electronic Packaging for 10 years.

S5
Design and Process for Advanced SMT Manufacturing
Course Leader:
Ning-Cheng Lee, Indium Corporation of America

Cancelled

S6
An Engineer’s Training Guide to Successful Wire Bonding and Pull Testing
Course Leader:
Phillip G. Creter, Creter & Associates

Cancelled

1/2 Day Course - AM
Time: 9 am - Noon

S7
Lead-Free System: Drop-in Implementation & Production
Course Leader:
Dr. Jennie S. Hwang, H-Technologies Group, Inc., U.S.A.

Course Description:
To facilitate lead-free implementation, this course focuses on manufacturing know-how to achieve the yield, quality and reliability. The objective is to not disrupt or marginalize the existing manufacturing infrastructure to achieve Pb-free conversion. The course will summarize the Pb-free technology and present the real-world high-volume production results and process parameters including Thomson, Sony, Panasonic, Hitachi, etc. The common Pb-free production defects and preventive steps will be discussed in comparison with SnPb. The course material is designed to illustrate the best practices in Pb-free production process to minimize defects and maximize reliability. Information is applicable to all types of interconnections including flip chip, CSP, fine pitch QFP, BGA, and passive components.

Topics:
· Define Pb-free manufacturing
· Clarify prevalent notions about Pb-free manufacturing
· Outline existing SMT manu- facturing conditions and process parameters
· Outline Pb-free technology
· Two important Pb-free implemen- tation parameters
—by melting temperature
—by intrinsic wetting ability
· Performance of Pb-free BGA/CSP solder spheres
· SMT process temperature and reflow profile
· Discuss six scenarios in compat- ibility among material, process, components
· Common production problems - Pb-free vs. SnPb
· Illustration of drop-in production results
—Reflow performance
—Wave soldering performance
—Pb-free solder paste - character- istics and performance
—Paste-in-hole application
—Printing and Dispensing
—Fine wire application
—X-ray inspection
—Thermal cycling tests
—Reliability results
—Cost consideration
· Recommendations

Special Course Material:
All attendees will receive a complimentary copy of the newly released book, Environment-Friendly Electronics - Lead-free Technology, published by Electrochemical Publications, LTD, Great Britain (List Price US $238).

Who should attend?
This course will benefit those who are involved or have an interest in Pb-free packaging and assembly. The course material is suitable for both novice and experienced.

1/2 Day Course - PM
Time: 1 pm - 5 pm

S8
Lead-Free System: Lead-Free Electronic Packaging and Assembly - Reliability & Manufacturing
Course Leader:
Dr. Jennie S. Hwang, H-Technologies Group, Inc., U.S.A.

Course Description:
The course material is designed to integrate the manufacturing know-how and the resulting solder joint reliability. The purpose is to provide a proper level of understanding of Pb-free solder interconnection reliability in material basics, production process, and real-world performance, as well as the interrelation between them. The course also discusses the system compatibility between the BGA/CSP solder sphere, assembly solder paste, component coating and PCB substrate surface finish. Information is applicable to all types of interconnections including fine pitch QFP, BGA, flip chip, CSP, and passive components.

Topics:
· What does it take to derive a uni- versal life-prediction model - pa- rameters considered
· Basic alloy material fundamentals -in response to temperature changes during service life
· Key factors of solder joint integ- rity and reliability
· Differentiation of solder joint fail- ure modes between SnPb and Pb- free
· Approaches to further strengthen solder materials in improving creep-fatigue resistance
· Summarize Pb-free technology
· Selection of Pb-free coating com- ponents
· Selection of Pb-free PCB surface finishes
· Selection of Pb-free solder joint al- loys
· Selection of Pb-free solder sphere alloys
· The role of gold
· The role of intermetallics
· System compatibility - paste, sol- der sphere, component, PCB
· Reliability factors of BGA array and QFP peripheral solder joints
· Basic failure process and principle in creep, fatigue, thermal fatigue
· High fatigue-resistant performance - Pb-free vs. SnPb
· Performance of Pb-free solder joint - by fatigue behavior
· Recommendations

Who should attend?
This course provides a working knowledge to all who are involved with or interested in Pb-free surface mount/fine pitch/BGA assembling. The course will provide new personnel to the industry with the necessary understanding of the solder joint reliability issues and provide experienced personnel with insights into future technology advances.

Special Course Material:
All attendees will receive a complimentary copy of Dr. Hwang’s book, Modern Solder Technology for Competitive Electronics Manufacturing, published by McGraw-Hill (List Price $75).

Dr. Hwang has been a major contributor to the Surface Mount Technology since its inception. She has provided hands-on solutions to many challenging production problems and is also an advisor to major OEMs, EMSs and government including DoD F-22 project. She received Ph.D., M.S., M.A. B.S. degrees in Materials Science & Engineering, Physical Chemistry, Liquid Crystal Science, Chemistry, respectively. Among her many honors and awards, Dr. Hwang is elected to the National Academy of Engineering and received the U.S. Congressional Certificates of Recognition and Achievements. She is the recipient of Distinguished Alumni Awards from her alma maters and the YWCA Women of Achievement Award, and an inductee to the WIT International Hall of Fame. She was also named the R&D-Stars-to-Watch by Industry Week.

Dr. Hwang is a popular lecturer/keynote speaker worldwide, the holder of a number of patents, and the author of over 250 publications, including the sole authorship of six textbooks. She is also a prolific author on the topic of trade, business, education and social issues.

Dr. Hwang serves on the board of NYSE-companies, and civic and university boards, including Ferro Corporation, Case Western Reserve University, Second National Bank, US Commerce Department’s Export Council. Having held senior executive positions with Lockheed Martin, SCM Corp., Sherwin William Co., IEM Corp., currently she is the president of H-Technologies Group Inc., providing technology and business solutions to the electronics industry. She is also an invited distinguished adjunct professor with the Engineering School of Case Western Reserve University.

Her 900-page new book: “Environment-Friendly Electronics—Lead Free Technology” (ISBN: 0 901 150 401) published by Electrochemical Publications, LTD, Great Britain is receiving a wide circulation throughout the world.

PDC Info | Monday PDCs