Professional Development Courses (PDCs)
(All PDCs run 9am - 5pm)

Monday PDCs | PDC General Info

Register On-line

*All PDCs will be held in the Pennsylvania Convention Center. Room locations will be made available closer to the show date.


S1
Plating for Electronics: From the Plating Solutions to the Equipment
Course Leader:
Fred Mueller, Consultant, ASEF Instructor

Course Description:
• Provide a thorough overview of the use of nickel, gold, and other precious metals that are electroplated for a variety of applications in the field of electronics;
• Review electroless chemistries for copper, nickel, gold and others;
• Present methods for conservation (and reuse) of precious metals, as well as pollution prevention and waste treatment methods;
• Case histories and bath troubleshooting will be presented;
• Understand the use of Laboratory controls including the Hull Cell and other plating cells to test solutions;
• Highlight engineering differences in plating processes.

Who should attend?
This course is intended as an introductory to intermediate level course for process engineers, quality engineers, and managers responsible for Electronic Finishing.

Mr. Mueller is a consultant and serves as a national certified instructor for the American Electroplaters and Surface Finishing Society (AESF). He has over twenty-five years experience in the plating industry in printed circuits and plating for electronics. He is currently the National Quality Manager at General Magnaplate, Linden, NJ. As a Chemist, Fred has conducted experiments and presented technical papers at SurFin on various topics in electroplating. He is very active in AESF currently serving as First Vice President on the National Board. He is Chairman of the Quality in Surface Finishing Committee and the Electro-forming Committee of the AESF.


S2
Flip Chip and CSP Technologies – Constructions, Materials, Assembly and Reliability
Course Leader:
R. Wayne Johnson, Ph.D., Auburn University

Course Description:
The increasing number of I/O per semiconductor chip combined with product driven requirements of thinner, smaller and lighter weight have lead the electronics packaging and assembly industry to chip scale packages and flip chip (Flip Chip in Package (FCiP) and Flip Chip on Laminate (FCoL)) technologies. In fact, many CSPs use FCiP constructions. This course will begin by examining the drivers for flip chip and CSP technologies then will examine options, their construction and trade-offs. 3-D CSPs will also be examined. Substrate design requirements will be discussed including routing, and pad design. Major assembly issues are flux selection for flip chip, solder paste printing for CSPs, underfilling, if necessary, and inspection. Underfilling which is not a traditional SMT assembly process is required for flip chip and often for CSPs. The underfill process and material options for flip chip and CSP will be examined. Recently, wafer applied underfill material concepts for FCoL assemblies have been discussed and this new technology concept will be explored. The replacement of compliant leads by solder spheres impacts reliability, particularly in thermal cycling and bending, and must be considered prior to implementing these technologies. Reliability including lead free will be discussed.

Who should attend?
This course is intended for those individuals soon to be responsible for implementing flip chip assembly, suppliers of materials and equipment for flip chip assembly and others interested in flip chip implementation.

Dr. Johnson is a Ginn Professor of Electrical Engineering at Auburn University and Director of the Laboratory for Electronics Assembly and Packaging (LEAP). At Auburn, he has established teaching and research laboratories for advanced packaging and electronics assembly. His research efforts are focused on electronics manufacturing, advanced packaging and extreme environment electronics. He has published and presented numerous papers at workshops and conferences and in technical journals as well as book chapters on MCM technology and electronics assembly. Dr. Johnson was the Technical Vice President of IMAPS (2000-2004) and was the 1991 President of the Society. He received the 1993 John A. Wagnon, Jr. Technical Achievement Award from ISHM, was named a Fellow of the Society in 1994 and received the Daniel C. Hughes Memorial Award in 1997. He is also a member of SMTA, and IPC and a Fellow of IEEE. Dr. Johnson received the B.E. and M.Sc. degrees in 1979 and 1982 from Vanderbilt University, Nashville, TN, and the Ph.D. degree in 1987 from Auburn University, Auburn, AL, all in electrical engineering. He has worked in the microelectronics industry for DuPont, Eaton, and Amperex.


S3
The Integrated Circuit - The Packaging, Assembly, and Interconnections
Course Leader:
William J. Greig, Greig Associates

Course Description:
This course provides an overview of electronics/microelectronics manufacturing and addresses the impact of both Integrated Circuit and End Product requirements for “smaller, better, cheaper.” It covers IC packaging, chip assembly, and HDI packages and substrates. It focuses on packaging trends, in particular area array, the BGA, the CSP, and Flip Chip and its counterpart the Wafer Level CSP. It includes discussions on the advantages of alternative packaging options including multichip packaging (MCP) and Chip On Board (COB). Additionally emerging 3-D packaging initiatives rapidly entering mainstream are examined at both the chip and package levels, i.e., both die and package stacking. High Density Interconnect (HDI) packages/substrates manufacturing process technologies are reviewed including Thick Film, Co-fired Ceramic, and Thin Film that support Level 1.0 SCP and MCP, and Level 2.0 PWBs. In the latter case, significant developments in the PWB process technology are presented including Build Up Technology (BUT) that offers increased wiring density, fine lines and spaces, and microvias. Throughout the course technical issues will be emphasized and reliability concerns addressed where appropriate.

Who should attend?
The course is effectively a primer covering primarily the microelectronic packaging arena. It is intended for a variety of individuals, technical and non-technical, whether directly or indirectly involved with electronic product manufacturing. It will serve as a review of current and emerging technologies for the experienced engineer and technician or as an introduction for anyone new to the industry. It should be of special interest to materials and equipment suppliers and those in support activities such as procurement, quality assurance, marketing and sales, by providing an adequate technology base for evaluating, planning or implementing.

Special Course Material:
All attendees will receive a complimentary copy of the “Hybrid Microcircuit Technology Handbook,” by J. Licari and L. Enlow, 2nd edition, Noyes Publications, 1998 (List Price $148).

Bill Greig is currently an independent consultant specializing in microelectronic packaging and assembly. His previous work experiences include RCA Semiconductor, General Electric Co., Lockheed Electronics, and contract consultant to NASA. His areas of expertise cover semiconductor wafer processing and assembly, hybrid circuit manufacture, and printed wiring board fabrication. He has been granted 6 patents and has published or presented numerous papers at various technical symposia. He has presented courses at various national symposia and participated in CEE programs at U. of Wisconsin, Lehigh University and Rutgers University. He is a member of SMTA and IMAPS in which he is a Fellow, and Past President of the Garden State Chapter.


S4
RF/Microwave Hybrids; Basics, Materials and Processes
Course Leader:
Richard Brown, Richard Brown Associates, Inc.

Course Description:
In recent years, the demands for high frequency systems and products have been growing at a rapid pace, driven by wireless communication and automotive applications. Coupled with the continuing development of monolithic integrated circuits, MMICs are new materials and technologies for hybrids. As a result, system and product designers are faced with the choice between hybrids and MMICs; i.e., complete system on a chip vs. hybrids with discrete devices, or more often, somewhere in-between. The constant mantra for smaller packages is tempered by the more important necessity for impedance matching, which defines transmission line geometries, as well as the need for overall low system losses. As such, the design and manufacture of high frequency circuits are governed by materials and process strategies.
This course will begin with a short, non-mathematical review of high frequency basics. Next a comparison of MMICs and hybrids is presented. The transmission line as the basic circuit component of RF and microwave hybrids will be reviewed. Hybrid “waveguide” structures will be compared as they relate to transmission line properties. The basic materials (conductors, dielectrics and substrates) and their properties will be introduced. Their effect on impedance, circuit properties and performance will be discussed. Processing technologies and strategies suitable for RF/microwave hybrids will be reviewed. Selected packaging protocols, such as vias and bonding wires, will be discussed in light of their influence on RF/microwave performance. At the completion of this course, attendees will have a better understanding of many of the critical materials and processing factors affecting high frequency circuit performance.

Who should attend?
This introductory course will benefit those associated with the RF and microwave arena. In particular this course will benefit those with responsibility for design and manufacturing of RF/microwave hybrids. Supervisors, engineers and technicians involved in product development, design and manufacture are encouraged to attend.

Special Course Materials:
All attendees will receive a set of course notes and a copy of RF/Microwave Hybrids: Basics, Materials and Processes, by Richard Brown, Kluwer Academic Publishers, 2003 (List Price $185).

Richard Brown is a technical and engineering consultant in hybrids, with more than 30 years experience, encompassing thin and thick film, electroplating and substrate technologies. He began his career at Bell Telephone Laboratories. After joining RCA Solid State in 1968, he transferred in 1979 to the RCA Microwave Technology Center in Princeton. In 1991, Mr. Brown joined an Alcoa Electronic Packaging technology team as program manager to implement thin film on high temperature co-fired ceramic for MCMs. He has published extensively, authoring a chapter on Thin Film for Microwave Hybrids in “Handbook of Thin Film Technology,” McGraw-Hill, NY, 1998, A. Elshabini-Riad and F. D. Barlow III, Eds. In 1995, ISHM awarded him the prestigious John A. Wagnon, Jr., Technical Achievement Award. His text, “Materials and Processes for Microwave Hybrids,” was published in 1991 by ISHM, Reston, VA., and most recently, “RF/Microwave Hybrids; Basics, Materials and Processes,” Kluwer Academic Press, 2002.


S5
Practical Electronics Reliability – An Overview
Course Leader:
Andrew D. Kostic, Ph.D.

Course Description:
The student will learn basic principles of electronic reliability testing and measurement.
The class begins with an introduction and explanation of terms and concepts. After key definitions have been established, the student will learn fundamental information about failure distributions, component reliability, system reliability, Environmental Stress Screening (ESS) and how they are applied.

The presentation uses actual examples of issues encountered to help guide the student and provide a reference for when they return to their own company.
Students will receive a softcopy of the presentation along with simple Microsoft Excel reliability software tools that are demonstrated during the class.
After completing this course you will know how to:
• Understand and evaluate reliability data
• Carry out reliability testing
• Implement effective ESS
• Systematically improve product reliability

Who should attend?
This course is a must for Reliability Engineers, Quality Engineers, Manufacturing Engineers, Sales & Marketing personnel, Reliability Technicians, and anyone who wants to gain a basic understanding of electronic reliability.

Dr. Kostic has been intimately involved in the fields of electronics product quality and reliability for over 30 years. He has extensive experience with both semiconductor and system manufacturing. Andy is an Engineering Fellow in the Product Integrity department of Northrop Grumman Electronic Systems and an independent consultant. He has held senior technical leadership positions in Unisys Component Engineering Procurement Organization, IBM Global Procurement Quality Engineering, and IBM Microelectronics Corporate Quality. He has taught quality and reliability improvement classes all over the world since 1988 that have been highly praised by students as being effective and practical. His advice has enabled companies to dramatically improve their field reliability with small investment. Dr. Kostic has an extensive background in reliability that includes:

• Reliability modeling and prediction
• Supplier evaluation
• Electrical characterization
• Incoming inspection
• FRACAS
• Failure analysis
• Supplier qualification and management
• Component qualification
• Lead-free electronics

Dr. Kostic holds the B. Sc. and M. Sc. degrees in Physics and a Ph.D. in Engineering. He has over twenty-five publications in the field of quality and reliability and is the Northrop Grumman representative to JEDEC Solid State Products Quality and Reliability Committee.


S6
Optoelectronic Packaging for Telecommunications and Biomedical Applications
Course Leader:
W. Jeffrey Shakespeare, Ph.D., GlucoLight Corporation

Course Description:
Optoelectronics has emerged over the last 15 years as a powerful technology with a broad range of applications from the ultra-high bandwidth telecommunications that link our world to optical coherence tomography helping physicians and scientists image microscopic structures in the human body. These technologies would not be possible without the capability to cost effectively package photonics, optics and electronics for high volume production and submicron alignment. This course presents the current state of the art in optoelectronic packaging including background on optoelectronic devices, basic optics, optical alignment, light guide fibers, thermal management, MEMS, joining technology, materials, and automated manufacturing.

Who should attend?
Engineers in R&D, manufacturing, process development, and advanced technicians. This course is intended as an overview of optoelectronic packaging.

Currently Director of Product Development at GlucoLight Corporation, a biomedical startup company, and Visiting Research Scientist at Lehigh University’s Center for Optical Technologies, Dr. Shakespeare has 26 years of optoelectronic and microelectronic packaging experience in AT&T Bell Laboratories/Lucent Technologies, and T-Networks, Inc., with 15 years as a Technical Manager and Director. He has been an innovator in the design and manufacture of optoelectronics for the past 12 years, has several patents in the field of high volume, automated optoelectronic component manufacturing, and a number of technical presentations and publications in this area. Dr. Shakespeare created and teaches a graduate level course in Microsystems Packaging as an Adjunct Professor for Lehigh University and for the past 5 years taught a professional development course “Fiber Optic Communications and Components” as an Adjunct Professor for Northampton Community College. He received the Ph.D. in Mechanical Engineering from Lehigh University.


S7
Business and Technical Issues in Lead Free Conversion --
Cancelled
Course Leader:
Ray Prasad, Ray Prasad Consultancy Group


S8
Embedded Organic Passives: Status and Challenges --
Cancelled
Course Leader:
Swapan K. Bhattacharya, Georgia Institute of Technology


 


PDC Reception
Sunday, September 25th
5:00 pm - 6:00 pm
PDC Instructors and Attendees only.


Monday PDCs | PDC General Info

 

 

 

 

 

Sponsored in part by:
















Golf Tournament Sponsorsed in part by:
















IMAPS - International Microelectronics And Packaging Society
and Sidney J. Stein Educational Foundation
611 2nd Street, NE -- Washington, DC 20002
imaps @ imaps.org | 202.548.4001 | 202.548.6115 (fax)