Technical
Program
Tuesday, September 27, 2005
*All Technical Sessions will be held in the Pennsylvania Convention
Center. Room locations will be made available closer to the
show date.
TA1 | TA2 |
TA3 | TA4
TP1 | TP2 | TP3 | TP4 | TP5 | TP6 | TP7 | TP8
Wednesday
Sessions | Thursday
Sessions
Register
On-line
TA1
3D Packaging
Chairs: K. (Jay) Jayaraj, SiWave Inc.; Brian Farrell, Foster
Miller, Inc.
9:45 am – 11:25 am
3D Packaging is being pursued to satisfy the ever-increasing need for
higher packaging density and to enable novel architectures. This session
focuses on ways to achieve 3D assemblies including integration of passives
and the related thermal and reliability issues.
3-D PCB Toroidal Inductors for RF Applications
Saravana P. Natarajan, Thomas M. Weller, David P. Fries, University
of South Florida
Aligned Wafer Bonding for 3D Interconnect and Wafer-Level Layer Transfer
Processes
Thorsten Matthia, Stefan Pargfrieder, Markus Wimplinger, Paul
Lindner, EV Group
Thermal Assessment of a BGA Type System-in-a-Package using 3D-CSP
George Karvounas, Michael Foukopoulos, John Sifnaios, Reiner
Goetzen, National Technical University of Athens
Mold-Flow in 3 Die Stack CSP of Chip Array Packaging with different
Gate Types
Min Woo Lee, Amkor Technology Korea, R&D
TA2
Thermal Management
Chairs: Dave Saums, DS&A LLC; Herbert Neuhaus, Scimaxx Solutions
9:45 am – 11:25 am
Thermal management requirements at the device and system level have
become critical factors in electronics design and must be considered
from project initiation onwards. Industry demands for continued development
of materials offering specific thermal characteristics, heat dissipation
components and component manufacturing methods, and system heat dissipation
implications are increasingly important. Materials and component selection,
cost and performance trade-offs, and design concepts for implementation
of materials and components are key topics in this session.
Ultra-High Thermal Performance GaAs RF Amplifier
Chris G. Macris, George LaRue, Mohamed Osman, Deuk Heo, Christopher
B. Leyerle, Robert G. Ebel, Thomas R. Sanderson, Enerdyne Solutions
Microelectronic Packaging and Heat Sink Components with Controlled
Functionality using Novel Powder Injection Molding Technique
Lye-King Tan, Advanced Materials Technologies Pte Ltd.
Computational Fluid Dynamics for Thermal Analysis of a
Standard PC System
Virgil Ganescu, Adrian Pascu, University “Politehnica” Bucharest
Solving Today’s
Thermal and CTE Mismatch Issues
Don Roy, Carol Burch, Kris Vasoya, ThermalWorks
TA3
Reliability I (Issues in Packaging)
Chairs: Robert A. Clark, Teledyne Electronic Technologies;
Thomas Green, National Training Center for Microelectronics
9:45 am – 11:25 am
This session on Reliability addresses failure mechanisms in both devices
and packages. There are presentations on the studies of the failure
mechanisms themselves, testing for failure and lifetime modeling. This
session focuses on the mechanisms and their models.
Interface Defect Generation as a Predictor of the Reliability of Ultra-thin
Gate Oxides
Y. C. Yu, Q. Guo, H. Li, X. Zeng, S. C. Zou, Grace Semiconductor
Manufacturing Corporation
Modeling the Reliability of Ladder Crystal Filters with the Consideration
of Contact Uncertainties
Jingsong Xie, Beijing University of Aeronautics and Astronautics
(BUAA)
Reduction of Power Dissipation in VLSI Chips
Divya Dornadula, Z. J. Delalic, Li Bai, Temple University;
Praveen Alexander, Lehigh University
A Tin Whisker Risk Assessment Algorithm
Tong Fang, Michael Osterman, Michael Pecht, University of Maryland
TA4
Sensor and MEMS Packaging
Chairs: Richard Gehman, Honeywell Sensing and Control; David
Galipeau, South Dakota State University
9:45 am – 11:00 am
Sensors and MEMS are a growing market in the electronics industry.
Packaging can account for 30-90% of the total MEMS device cost, yet
there is little published research on packaging of these devices. This
session highlights new approaches in MEMS packaging for accelerometers
and biological, RF and optical devices.
Wireless Monitoring of Myocardial Mechanics
Yan Liu, Valérie Eveloy, Michael Pecht, University of Maryland
MEMS Packaging – Electronic
Stimulator for the Betterment of Bladder Functions
Raghu N. Chintakunta, Z. J. Delalic, Temple University
Through-Wafer Interconnections for Radio Frequency Applications by
a Molten Solder Ejection Method
Yoshio Fujii, Yoshinori Yokoyama, Yukihisa Yoshida, Hiroshi
Fukumoto, Munehisa Takeda, Tamotsu Nishino, Mitsubishi Electric Corp.
TP1
3D Packaging
Chairs: K. (Jay) Jayaraj, SiWave Inc.; Brian Farrell, Foster
Miller, Inc.
1:30 pm – 2:45 pm
3D Packaging is being pursued to satisfy the ever-increasing need for
higher packaging density and to enable novel architectures. This session
focuses on ways to achieve 3D assemblies including integration of passives
and the related thermal and reliability issues.
SiP in a 3D Design Environment
Gordon Jensen, CAD Design Software
Reliability Assessment of Embedded Passives on Multilayered Microvia
Organic Substrates
Kang J. Lee, Swapan Bhattacharya, Mahesh Varadarajan, Viswam
Puligandla, Steven Dunford, John Lauffer, Rao Tummala, Suresh Sitaraman,
Georgia Institute of Technology
Flip-Chip Assembly using Electroless Ni/Au and Solder Screen Printing
for High Performance Flip Chip BGA
Thorsten Teutsch, Elke Zakel, PacTech USA - Packaging Technologies,
Inc.; Carlo Gamboa, Bo Chang, Cypress Semiconductor
TP2
Thermal Management
Chairs: Dave Saums, DS&A LLC; Herbert Neuhaus, Scimaxx Solutions
1:30 pm – 2:45 pm
Thermal management requirements at the device and system level have
become critical factors in electronics design and must be considered
from project initiation onwards. Industry demands for continued development
of materials offering specific thermal characteristics, heat dissipation
components and component manufacturing methods, and system heat dissipation
implications are increasingly important. Materials and component selection,
cost and performance trade-offs, and design concepts for implementation
of materials and components are key topics in this session.
Fabrication, Assembly and Testing of On-chip Microfluidic Heatsink
Bing Dang, Paul Joseph, Muhannd Bakir, Paul Kohl, James Meindl,
Georgia Institute of Technology
Water Cooling of Low-Profile Servers
Albert Chan, Fujitsu Laboratories of America
A Thermal Performance Comparison of Copper Slugs, Embedded Heat Pipes,
Small
Charles J. Buondelmonte, Geoffrey P. Thyrum, Andrew
TP3
Reliability I (Issues in Packaging)
Chairs: Robert A. Clark, Teledyne Electronic Technologies;
Thomas Green, National Training Center for Microelectronics
1:30 pm – 2:45 pm
This session on Reliability addresses failure mechanisms in both devices
and packages. There are presentations on the studies of the failure
mechanisms themselves, testing for failure and lifetime modeling. This
session focuses on the mechanisms and their models.
Growth Mechanism and Mitigation of Tin Whisker after Temperature Cycling
and Temperature Humidity Tests
Seyoung Jeong, GiYoung Sohn, Nakadaira Yoshikuni, Namseog Kim,
TaeGyeong Jeong, Seyong Oh, Samsung Electronics
One Method for Fast Gate Oxide TDDB Lifetime Projection
Yi Zhao, Xinggong Wan, Xiangming Xu, Shanghai Hua Hong NEC
(HHNEC) Electronic Company Ltd.
A Creative Approach with Custom ASICs for a Cost Effective Long Term
Obsolescence Solution
Adam Jachniewicz, David J. Kayser, JSI Microelectronics Inc.
TP4
Sensor and MEMS Packaging
Chairs: Richard Gehman, Honeywell Sensing and Control; David
Galipeau, South Dakota State University
1:30 pm – 2:45 pm
Sensors and MEMS are a growing market in the electronics industry.
Packaging can account for 30-90% of the total MEMS device cost, yet
there is little published research on packaging of these devices. This
session highlights new approaches in MEMS packaging for accelerometers
and biological, RF and optical devices.
Influence of Die Attach Technology on Quality of CCD/CMOS Image Sensors
Thorsten Theilig, Alphasem AG
Hermetic Sealing of MEMS by Liquid-Phase Alloying of Indium with Silver
Gustina B. Collins, Sanjay Raman, Guo-Quan Lu, Virginia Polytechnic
Institute and State University
Micromachined Accelerometer Performance in Plastic Overmold Packages
Changhan Hobie Yun, X. Zhang, W. A. Webster, T. Lor, E. Lacsamana,
Analog Devices Inc.
TP5
Emerging Technologies
Chairs: Ron Jensen, Honeywell Solid State Electronics Center;
K. (Jay) Jayaraj, SiWave Inc.
3:15 pm – 4:30 pm
This session focuses on emerging nanotechnologies and their applications
in electronic packaging.
Modelling and Optimization of Vibration Damping (Dynamic) Properties
in Nanoscale-Reinforced Materials
Maksim Kireitseu, Institute of Mechanics, NAS of Belarus and
Rolls-Royce UTC; G. Tomlinson, Rolls-Royce UTC and Dynamics
Group, University of Sheffield – UK
Advanced Materials Development, Processing and Analysis: Applications
in Microelectronics and Electronic Packaging
Lesly A. McAnelly, Harry K. Charles, Jr., Johns Hopkins University – APL
Feasibility Evaluation of Applying Carbon Fiber in Electronic Interconnects
Yuliang Deng, Ji Wu, Michael Pecht, Michael Butler, Joseph
Swift, Stanley Wallace, University of Maryland
TP6
Attachment Technologies - Solder and Conductive Pastes
Chairs: Greg Caswell, VirTex Assembly Services, Inc.; Timothy
Lenihan, TGL Consulting
3:15 pm – 4:30 pm
Improvements in flip chip materials are essential to successful process
growth. This session focuses on improvements in underfills and solder
for the flip chip process.
Assessing UBM Reliability at Wafer Level
Jianxing Li, Jeff Coleman, Jorge Valadez, Caroline Merrill,
Intel Corporation
Evaluation of the Performance of RoHS Compliant Thick Film Conductors
with Various Lead Free Solder Alloys
Samson Shahbazi, Meg Tredinnick, James Wood, Heraeus Incorporated – CMD
Comparison between Electroless Ni(P)/Au and Cu OSP as a Surface Finish
Layer of Mobile Application
Yoon-Chul Sohn, Young-Kun Jee, Jin Yu, Junehyeon Ahn, KAIST;
Hoseong Seo, Kihyun Kim, Youngmin Lee, Samsung Electronics; Taek-Yeong
Lee, Hanbat National University
TP7
Manufacturing I: Packaging Processes & Quality Assessments
Chair: John Graves, The Micro-Tech Index; Randy Hume, Visteon
3:15 pm – 4:55 pm
From performing the assembly on thin substrates through the sealing
of hermetic packages, improvements in the processes for these operations
are key to the electronics packaging industry. The ability to verify
that these processes meet design requirements without defect is key
to making a quality product. This session focuses on several processes
and quality assessment methods for manufacturing electronic assemblies.
Experimental Characterization of the Impact of Various JEDEC Drop Test
Conditions on Board-level Reliability of Chip-scale Packages
Yi-Shao Lai, Po-Chuan Yang, Chang-Lin Yeh, Ping-Feng Yang,
Advanced Semiconductor Engineering, Inc.
Ultrasonic Image Interpretation Improvement for Detection of Defects
in Microelectronic Packages
Guang-Ming Zhang, David M. Harvey, Derek R. Braden, Liverpool
John Moores University
Thin Substrate Flip Chip Assembly - Managing Substrate Warp Through
Controlled Thermal Process
Shichun Qu, Robin E. Gorrell, 3M
Effects of Lead-Free Solder and Pin-Through-Hole Assembly Options on
the Assembly Costs for Portable Computer Printed Wiring Boards
Koki Shimohashi, Julie M. Schoenung, University of California,
Davis
TP8
Photonics/Optoelectronics Packaging
Chairs: Charlie Banda, Laboratory for Physical Sciences; Bud
Osthaus, Merrimac Industries
3:15 pm – 4:30 pm
Developments in optoelectronics and photonics assembly processes continue
to meet stringent packaging requirements that often surpass those of
conventional microelectronics assembly. Novel materials, processing,
assembly and alignment techniques are presented in this session that
addresses these packaging challenges.
Thermosonic Flip Chip Bonding for High Power LED Packages
Charles Chak-hau Pang, Hing-Suen Siu, Chi-Kong Law, Hon-Chiu
Hui, Kin-Yik Hung, ASM Assembly Automation Ltd.
The Development of Surface Mount Package with Differential Transmission
Line for 40Gb/s MUX/DEMUX Application
Kouki Kawabata, Kenji Tgami, Takanori Kubo, Kyocera Corporation
Development of Transparent and Transcalent Encapsulant Materials for
LED
Hsu Hsin Ling, Jia-Min Lin, Yu Chin Lin, Industrial Technology
Reseach Institute (ITRI)
TA1 | TA2 | TA3 | TA4
TP1 | TP2 | TP3 | TP4 | TP5 | TP6 | TP7 | TP8
Wednesday
Sessions | Thursday
Sessions
Register
On-line
