Professional Development Courses (PDCs)

All PDCs run 9:00 am - 5:00 pm, unless otherwise noted


Do you want to broaden and strengthen your skills and knowledge, optimize your manufacturing processes, and integrate the latest advances in materials and technologies to maintain your strength in today’s competitive global market? The Technical Committee of IMAPS is pleased to present a comprehensive offering of Professional Development Courses that provide detailed information on topics of immediate interest to the Microelectronics and Packaging community.  So please be sure to choose from the 18 in-depth Professional Development Courses taught by recognized industry experts.  You will discover the following key ways that will benefit you.

  • Better understand the skills and knowledge necessary in today’s industry.
  • Be exposed to the rapidly expanding developments in new materials and technologies.
  • Consult with renowned authorities about your current R&D or manufacturing problems and challenges.
  • Learn new ways to identify, think about, and address your problems and opportunities.
  • Great opportunities to interact with industry experts and other course attendees.
  • Certificate of Attendance and much more…

Your PDC Registration Fee Includes:

  • Lunch on the day of your course
  • Refreshment breaks
  • All course materials
  • PDC Reception on Sunday evening (for Attendees & Instructors only)
  • Certificate of Attendance

PDC Cancellation policy:

IMAPS reserves the right to cancel a course if the number of attendees is not sufficient.  You can transfer to a different course or we will refund you the corresponding amount.

Sunday, November 11, 2007

S1: RF/Microwave Hybrids: Basics, Materials and Processes
Course Leader: Richard Brown, Richard Brown Associates
S2: Electronics Reliability Overview
Course Leader: Andrew D. Kostic, Ph.D., Northrop Grumman Electronic Systems
S3: Technology of Screen Printing
Course Leaders: Art Dobie, Sefar Printing Solutions & David
Malanga, Heraeus, Inc. - Thick Film Division
S4: Adhesion Fundamentals in Microelectronic Packaging
Course Leader: Raymond A. Pearson, Ph.D., Lehigh University
S5: Advanced Power Packaging for High Reliability and Higher
Temperatures

Course Leader: Dr. Douglas C. Hopkins, University at Buffalo
(SUNY)
S6 - ½ day: 9 am - Noon
Gas Analysis of Hermetically Sealed Enclosures

Course Leader: Robert K. Lowry, Affiliate, Oneida Research
Services, and Consultant, Electronic Materials Characterization
S7 - ½ day: 1 pm - 5 pm
Principles of Technical Selling

Course Leader: Michael P. O’Neill, Reactive NanoTechnologies

Monday, November 12, 2007

M1: Wire Bonding in Microelectronics
Course Leader: George G. Harman, National Institute of Standards and Technology
M2: Advanced Thermal Management and Packaging Materials
Course Leader: Carl Zweben, Ph. D., Advanced Thermal Materials
Consultant
M3: Low Temperature Co-fired Ceramics (LTCC)
Course Leaders: Dr. Aicha Elshabini & Dr. Fred D. Barlow,
University of Idaho
M4: Hermeticity and “Near Hermetic” Packaging Concepts
Course Leaders: Thomas J Green, TJ Green Associates &
Aaron Der Marderosian Sr., Raytheon Company
M5: Introduction to Microelectronics Packaging Technology
Course Leader: Phillip G. Creter, Creter & Associates
M6: Plating Processes for High Reliability Microelectronic Devices
Course Leader: Fred Mueller, Consultant, ASEF Instructor
M7: Failures and their Prevention in Electronic Assemblies with Focus on Lead (Pb) Free Technology
Course Leader: Dr. Puligandla Viswanadham, University of
Texas at Arlington
M8: Selecting a Lead Free Solution for Military, Avionic
and Space Applications

Course Leaders: Craig Hillman &
Jim McLeish, DfR Solutions
M9: Packaging and Integration of RFIDs and Related Identification
Tags

Course Leaders: Ajay P. Malshe, Ph.D., University of Arkansas &
Frank Bachner, TechSearch International,
Inc.
M10 - ½ day: 9 am – Noon
ESD Factory & Cleanroom Issues, Equipment Troubleshooting,
ESD Packaging & Materials and ESD Standards/Test Methods

Course Leader: Robert J. Vermillion, RMV Technology Group, LLC
Institute of Packaging Professionals/CPP-Lifetime/Fellow
Certified, ESD Engineer-iNARTE
Certified, Product Safety Engineer-iNARTE
M11 - ½ day: 1 pm – 5 pm
Biomedical Materials, Devices and Packaging

Course Leader: Z. Joan Delalic, PhD, Temple University


Sunday, November 11, 2007

S1
RF/Microwave Hybrids:  Basics, Materials and Processes
Course Leader: Richard Brown, Richard Brown Associates

Course Description:
In recent years, the demands for high frequency systems and products have been growing at a rapid pace.  Coupled with the continuing development of monolithic integrated circuits, MMICs, are new materials and process refinement of hybrids.  As a result, system and product designers are faced with the choice between hybrids and MMICs; i.e., complete system on a chip vs. hybrids with discrete devices, or more often, somewhere in-between.

This course will begin with a short, non-mathematical review of high frequency basics.  Next a comparison of MMICs and hybrids is presented.  The transmission line as the basic circuit component of RF and microwave hybrids will be reviewed.  Hybrid “waveguide” structures will be compared as they relate to transmission line properties.  The basic materials (conductors, dielectrics and substrates) and their properties will be introduced.  Their effect on impedance, circuit properties and performance will be discussed.  Processing technologies suitable for RF/microwave hybrids will be reviewed.  Selected packaging protocols, such as vias and bonding wires, will be discussed in light of their influence on RF/microwave performance.  At the completion of this course, attendees will have a better understanding of many of the critical materials and processing factors affecting high frequency circuit performance.

Who Should Attend?
Microwave industry professionals who want to better appreciate the critical materials, process interactions and variables affecting high frequency hybrid manufacturing. Supervisors, engineers and technicians involved in product development, design and manufacture are encouraged to attend.

Special Course Materials:
All attendees will receive a complimentary copy of RF/Microwave Hybrids: Basics, Materials and Processes, by Richard Brown, Springer Publishers, 2003 (List Price $185).

Richard Brown is a technical and engineering consultant in hybrids, with more than 30 years experience, encompassing thin and thick film, electroplating and substrate technologies.  He began his career at Bell Telephone Laboratories.  After joining RCA Solid State in 1968, he transferred in 1979 to the RCA Microwave Technology Center in Princeton.  In 1991, Mr. Brown joined an Alcoa Electronic Packaging technology team as program manager to implement thin film on high temperature co-fired ceramic for MCMs.

He has published extensively, authoring a chapter on Thin Film for Microwave Hybrids in “Handbook of Thin Film Technology,” McGraw-Hill, NY, 1998, A. Elshabini-Riad, Ed., and most recently RF/Microwave Hybrids; Basics, Materials and Processes, Kluwer Academic Press, 2003.  In 1995, ISHM awarded him the prestigious John A. Wagnon, Jr. Technical Achievement Award.

S2
Electronics Reliability Overview
Course Leader: Andrew D. Kostic, Ph.D., Northrop Grumman Electronic Systems

Course Description:
The student will learn basic principles of electronic reliability testing and measurement.

Topics covered include:
• Basic statistical/mathematical concepts for reliability
• Measures of reliability
• Bathtub curve model for hazard rate for electronic devices
• Failure rate calculation methods
• Mean Time Between Failures (MTBF)
• Accelerated life testing theory and application
• System reliability modeling
• Costs of failures
• Methods to reduce potential failure rates
• Background and rationale for ESS
• ESS technical implementation issues
• Estimation of sample sizes as a function of failure rate and confidence interval
• Lead-free electronics–what it is and isn’t
Students will receive a softcopy of the presentation along with simple Microsoft Excel reliability software tools that are demonstrated during the class. Students are encouraged to bring along laptop computers to use during class exercises.

After completing this course you will know:
• How to understand and evaluate basic reliability data
• How to perform reliability testing
• The essentials of ESS
• How to improve product reliability

Who Should Attend?
This course is a “must” for Reliability engineers, Quality engineers, Manufacturing engineers, Sales & Marketing personnel, Reliability technicians, and anyone who wants to gain a basic understanding of electronic reliability.

Dr. Kostic has been involved in electronic quality and reliability for over 30 years. He has extensive experience with semiconductor and system manufacturing in both commercial and aerospace applications.
His courses have been praised as both effective and practical. Andy’s experience includes:
•  Reliability modeling & prediction
•  Supplier evaluation
•  Electrical characterization
•  Incoming inspection
•  Failure analysis
•  Environmental Stress Screening
•  Supplier qualification and management
•  Component qualification
•  Lead-free electronics
Dr. Kostic holds B. Sc. and M. Sc. degrees in Physics and a Ph. D. in Engineering with over twenty-five publications in electronics quality and reliability He founded and leads the Northrop Grumman Lead-Free Working Group. He serves as the Northrop Grumman representative to JEDEC Solid State Products Quality and Reliability Committee and the University of Maryland CALCE.

S3
Technology of Screen Printing
Course Leaders:Art Dobie, Sefar Printing Solutions & David Malanga, Heraeus, Inc. - Thick Film Division

Course Description:
Screen printing continues to offer innovative and cost effective solutions to the increasing demands for higher circuit densities. This course is intended to increase the understanding of the screen printing process, thereby improving production yield and print quality.

Presented are some of the latest advancements in composition, screens, and printing technology that enable screen printing to meet future circuit density requirements as well as the definition required for microwave circuitry.  The advantages of screen printing, an additive deposition process, are described and compared to alternative more costly and “less-green” subtractive deposition technologies.

This course is applications-oriented in terms of how to optimize the screen printing process; how to use and specify screen correctly; rheology properties that affect print results; minimizing printing defects and trouble-shooting problems related to screens, inks and the printing process itself.

Who Should Attend?
This course is targeted for production and process engineers, plant and production managers and supervisors, and any others interested in learning how to optimize and increase the use of the screen printing process.

Art Dobie is Manager of Screen Technology for Sefar Printing Solutions, Inc. He has been with Sefar 26 years since receiving his BS in Screen Printing Technology in 1980 from California University of Pennsylvania.

Art is an invited instructor of the Screen Printing Technical Foundation’s Professional Screen Making Workshop, and has instructed IMAPS’ “Technology of Screen Printing” PDC since its inclusion in 1991. He has delivered numerous technical presentations to screen-printing professionals at local, national and international level symposia.

Mr. Dobie is a Life Member and Fellow of the Society of IMAPS, and was the 2006 recipient of the IMAPS Technical Achievement Award for outstanding technical contributions to screen printing technology relating to microelectronics. 

In 1998, Art Dobie was inducted into the SGIA’s Academy of Screen Printing Technology.

David Malanga is currently the Worldwide Technical Service Manager and Sales Manager for Thick Film Products at Heraeus Thick Film Materials Division in West Conshohocken, PA.  David has over 19 years of experience at Heraeus working in both R&D, formulating thick film and LTCC materials, Technical Service solving processing and application problems directly with customers and as Manager of the Sales Department.  David has a B.S. and M.S. in Ceramic Science and Engineering from Rutgers University.  David has published various articles on thick film resistors, conductors, LTCC materials, and component metallizations worldwide.  He is a Fellow of IMAPS and has held both local and national positions in the organization.

S4
Adhesion Fundamentals in Microelectronic Packaging
Course Leader: Raymond A. Pearson, Ph.D., Lehigh University

Course Description:
Polymers are widely used in electronic packaging.  The lack of adhesion can adversely affect reliability as well as package performance.  The intention of this course is to review the fundamentals of adhesion and apply them to interfaces found in Plastic-Quad Flat Packs (PQFP), chip-scale packages (CSP), Flip-Chip (FC) assemblies, and optoelectronic packages. Adhesion issues in molding compounds, die attach adhesives, optoelectronic adhesives, and underfill resins will be covered.  Also, recent trends in using nanotechnology to toughen epoxy resins will be reviewed. By the end of the course, you should know how to choose the proper tools to predict and measure adhesion.

Course Outline:
1. Discuss Course Objectives
2. Review Microelectronic and Optoelectronic Packages (Brief)
3. Discuss the Role of Chemical Forces in Adhesion
4. Examine Extrinsic Deformation Mechanisms in Polymers
5. Review Common Tests to Assess Adhesion
6. Evaluate the Procedures Used to Form Adhesive Bonds
7. Apply Interfacial Fracture Toughness Concepts to Gage Reliability
8. Review the latest trends in epoxies containing nanosize fillers.

Special Course Material:
All attendees will receive a complimentary copy of Adhesives Technology for Electronics Applications: Materials, Processes, Reliability by James J. Licari and Dale W. Swanson, William Andrew Inc. 2005 (List Price $165).

Who Should Attend?
Engineers, scientists and managers involved in the design, process and manufacturing of IC electronic components and hybrid packaging, electronic material suppliers involved in materials manufacturing and research & development.

Dr. Raymond A. Pearson joined the Materials Science and Engineering Department at Lehigh University in August of 1990 after obtaining his doctorate in Materials Science and Engineering from University of Michigan.  Prior to graduate school, Ray had worked for seven years with General Electric Company: from 1980-1984 as an associate staff member at GE’s Corporate Research and Development Center in Schenectady, New York and from 1984-1987 as a materials specialist at GEPE’s  Product Technology Center in Bergen op Zoom, the Netherlands.  His research interests include all aspects of processing, deformation, yield, and fracture of polymers.  He has worked extensively in the area of fracture mechanisms and adhesion. In 2001, Ray became Director of the Center for Polymer Science & Engineering. He has worked closely with organizations such as Semiconductor Research Corporation and SEMATECH.

S5
Advanced Power Packaging for High Reliability and Higher Temperatures
Course Leader: Dr. Douglas C. Hopkins, University at Buffalo (SUNY)

Course Description:
Advanced electro-physical design integrates several traditional packaging techniques, such as direct-bond-copper, FR-4 and IMS into a single circuit or system. Recently, advanced materials, such as conductive epoxies and adhesives, allow unique positioning of components to increase density and improve thermal management. Finally, the use of SiC has fostered significant development in approaches that offer high temperature operation, or extended reliability at traditional temperatures.

The objective is to provide an advanced designer with the critical issues and design guidelines for power-related packaging that directly influence the electrical, mechanical and thermal circuit design, performance and cost. Particularly, issues are addressed in design of high density, high frequency circuits and systems, including definition of and design for reliability, thermal management, and EMC (coupling and radiation). Significant time is given to introducing aluminum-based packaging, e.g., with direct-bonded-aluminum, aluminum PWBs and composites (AlSiC), to show advantages of using “near mono-material” metallurgical hierarchies to greatly increase reliability and provide high temperature packaging (>200°C). Recent results in electro- and thermo-migration testing will show the impact on reliability, and how new design rules are needed.

When finished, the attendee should be able to compare present and evolving packaging approaches; partition a circuit for optimum packaging technologies; and identify critical test parameters for manufacturing and test.

Who Should Attend?
Engineers and managers responsible for power-related electrical and physical circuit designs, which need to move to much higher thermal and packaging densities, or to improve reliability at much higher operating temperatures.

Dr. Hopkins is associate research professor at the University at Buffalo (SUNY), assistant director of the UB Electronics Packaging Laboratory and director of the Electronic Power and Energy Research Lab, where he directs R&D in the physical integration of very high-density power electronic systems. He worked for GE’s and Carrier’s R&D Centers, and held visiting positions at several national labs.  He is an IEEE and IMAPS senior member. He is a founding member and now chair of the IMAPS Subcommittee on Power Packaging. He was Technical Chair of the International Workshop on Integrated Power Packaging 1998, and General Chair 2000, co-sponsored by IMAPS and IEEE. He has authored over 60 journal and conference publications, received three ISHM “Best Paper of Session” awards, and other awards.

 

S6 -- ½ Day Course: 9:00 am - Noon
Gas Analysis of Hermetically Sealed Enclosures
Course Leader: Robert K. Lowry, Affiliate, Oneida Research Services, and Consultant, Electronic Materials Characterization

Course Description:
To assure reliability of hermetic enclosures, it is crucial to know the chemical composition of their gas ambients, chemical species that threaten component reliability, and material/process factors essential for controlling these species. This course covers methods for analyzing gas composition of hermetic enclosures and associated reliability concerns.

The course reviews high-profile microelectronic component failures of the 1970s caused by moisture in packages, the technical concerns that inspired creation of Test Method 1018, and factors that led to selecting 5000ppmv as the moisture limit. It covers failure mechanisms caused by moisture and other species within enclosures, including metallization corrosion, optoelectronics fogging, stiction, dendritic growth, device instability, solder cracking, etc.

The course describes three types of in-situ sensors and three methods of gas-phase chemical analysis, and reviews the quantitative and survey attributes of mass spectrometry suiting it uniquely to package gas analysis. It describes mass spectrometers configured for package gas analysis and focuses on data interpretation, including several case studies.

We explore laboratory correlation issues and recent measurement improvement studies, including DSCC round robins and a “consensus standard” single sample cylinder circulatable between laboratories for correlation studies. The course concludes with recommendations for materials handling and processing to control gases in sealed devices.

Who Should Attend?         
This PDC is appropriate for design, process, product, and quality/reliability engineers and managers who produce hermetic packages, and system engineers and managers who assure hermetic product compliance to moisture limits.

Mr. Lowry is an electronic materials consultant, affiliated with Oneida Research Services. After obtaining BS/MS degrees in Chemistry he worked for 32 years at Radiation, Inc., Harris Semiconductor, and Intersil Corp. He was responsible for materials analysis and was Senior Scientist in charge of Analytical Services at Harris and Intersil. He did failure analysis work on early moisture-related failures of NiCr and aluminum-metallized ICs. He patented a surface conductivity dewpoint sensor and helped draft Test Method 1018. He established a DSCC-suitable facility at Harris for statistical control of hermetic sealing capable of the moisture limit thereby assuring compliant product. He conducted extensive split-lot studies of correlations between two different mass spectrometers. He also helped characterize a “consensus standard” circulatable single sample cylinder using humidified air to improve correlation between laboratories. 

S7 -- ½ Day Course: 1:00 pm – 5:00 pm
Principles of Technical Selling
Course Leader: Michael P. O’Neill, Reactive NanoTechnologies

Cancelled

Register


Monday, November 12, 2007


M1
Wire Bonding in Microelectronics
Course Leader: George G. Harman, National Institute of Standards and Technology

Course Description:
Wire bond manufacturing defects range typically from about 1000 to 100 ppm, with exceptions to >10,000 and <50 ppm. In order to achieve the lower numbers in production, one must understand all of the conditions that affect both bond yield and reliability (since they are interrelated). This course will discuss many small- and large-wire bonding problems, as well as subjects of specific interest to hybrid/MCM device bonding. In addition, a number of advanced topics, such as high yield, fine pitch (towards 25 µm ball bond pitch), and bonding to flex will be covered. Newer developments are included along with a major discussion of wire bonding to multichip substrates, soft substrates, Cu-Lok and the special intermetallic problems occurring when fine pitch chips are used. Wire bond testing and metallurgy (covering both aluminum and gold bonds); intermetallic compounds in general; cratering; cleaning for high yield and reliability; failures resulting from electroplating; mechanical problems in wire bonding; new bond technologies and developments; how ultrasonic bonds are formed, and the metallurgy of gold and aluminum wire. It concludes with methods of making very low loops, implementing TAB and Flip Chip by using wire bonding/stud bumping techniques.

Who Should Attend?
Engineers in R&D, QA, QC, manufacturing, process development, and advanced technicians. It is assumed that participants have some familiarity with wire bonding and general device assembly technologies.

Special Course Materials:
All attendees will receive a complimentary copy of Wire Bonding in Microelectronics, by George Harman, McGraw Hill, NY, 1997 (List price $65), as well as complete course notes and explanations.

Mr. Harman is a Fellow Emeritus of the National Institute of Standards and Technology (NIST) and a consultant. He received a BS in Physics from Virginia Polytechnic Institute & State University and a MS in Physics from the University of Maryland. Mr. Harman has published over 60 papers, two books on wire bonding, and holds four U.S. Patents. He was the 1995 President of ISHM and is a Fellow of IMAPS and the IEEE. He has received numerous awards for his work from IMAPS, IEEE, DVS, SME, and others. He has presented numerous talks, and has taught courses for the University of Arizona and IMAPS for over 15 years, as well as the IEEE, to name a few. He has presented many papers and given courses in the USA, Europe, and Asia.

M2
Advanced Thermal Management and Packaging Materials
Course Leader: Carl Zweben, Ph.D., Advanced Thermal Materials Consultant

Course Description:
The need for advanced thermal management and packaging materials is highlighted in the iNEMI 2007 Roadmap.  In response to the needs, there have been revolutionary advances in the last few years.  There are now over a dozen low-CTE, low-density materials with thermal conductivities ranging between that of copper (400 W/m-K) and 1700 W/m-K.  Major corporations are involved.  Advanced materials can reduce component and system cost.  Many have low densities.  They can tailor PCB CTE, potentially eliminating the need for underfill.  They also can increase PCB thermal conductivity, allowing heat removal from the bottom, as well as the top of a chip.  There are a large and increasing number of applications, including substrates, PCBs, PCB cold plates, heat spreaders, heat sinks, thermal interface materials, microelectronic packages, RF packages, power modules, thermoelectric cooler modules, and laser diode and LED packages.  For example, IBM has used diamond particle composite heat spreaders having a low density, low CTE and thermal conductivity over 600 W/m-K.  This course covers the large and increasing number of advanced thermal management and packaging materials, providing a discussion of properties, manufacturing processes, applications, cost, lessons learned, typical development programs, and future directions, including carbon nanotubes.  Traditional materials are also discussed.

Who Should Attend?
Engineers, scientists and managers involved in microelectronic, optoelectronic and MEMS/MOEMS packaging design, production and R&D; packaging material suppliers.

Dr. Zweben, an independent consultant, directed advanced thermal and packaging materials R&D for over 30 years.  He was formerly Advanced Technology Manager and Division Fellow at GE Astro Space, where he worked on low-CTE PCBs, and was the first to use Al/SiC in microelectronic and optoelectronic packaging.  Other affiliations have included Du Pont, where he worked on aramid PCB materials, Jet Propulsion Laboratory and the Georgia Tech NSF Packaging Research Center.  He was the first, and one of only two winners of both the GE One-in-a-Thousand and Engineer-of-the-Year awards. He is a Life Fellow of ASME, a Fellow of ASM and SAMPE, an Associate Fellow of AIAA, and has been a Distinguished Lecturer for AIAA and ASME.  He has published and lectured widely on advanced thermal management and packaging materials.

M3
Low Temperature Co-fired Ceramics (LTCC)
Course Leaders: Dr. Aicha Elshabini & Dr. Fred D. Barlow, University of Idaho

Course Description:
This course focuses on the materials, processes, design, and applications of Low Temperature Co-fired Ceramics (LTCC). The course will begin with a brief history and background of the technology. A detailed discussion of the process flow and processes will cover each step used in the fabrication of LTCC substrates. A discussion of the material properties and design guidelines and considerations will also be covered in detail. Finally, a discussion of the technical advances and the technical applications of the technology will outline the relative strengths of LTCC for a number of target markets.

Topics:
• History of LTCC and Background
• LTCC Process
• Material Properties
• Design Considerations
• Technical Advances
• Applications

Special Course Material:
All attendees will receive a complimentary copy of Ceramic Interconnect Technology Handbook by Fred D. Barlow, III and Aicha Elshabini, CRC Press 2007 (List Price $130).

Who Should Attend?
Engineers, managers, and technicians, who desire to expand their background or strengthen their understanding of the technology. The course will not assume any prerequisite background.

Aicha Elshabini is Professor of Electrical Engineering and Dean of Engineering at the University of Idaho. She obtained a B.Sc. in Electrical Engineering at Cairo University, a Masters in Electrical Engineering at University of Toledo, and a Ph.D. Degree in Electrical Engineering at the University of Colorado. She served as a faculty member at Virginia Tech in the period 1979-1999, the position of Professor and Department Head for the Electrical Engineering Department at University of Arkansas (1999-2006), and Interim Department Head for Computer Science & Computer Engineering Department (2000-2003). She served as the faculty advisor for the IMAPS student program at both Virginia Tech and University of Arkansas institutions from 1980 to 2006. Elshabini is a Fellow of IEEE/CPMT Society (1993) a Fellow of IMAPS Society (1993). Dr. Elshabini was awarded the 1996 John A. Wagnon Jr., Technical Achievement Award from IMAPS. She has served as the Founding Editor of the IMAPS International Journal of Microcircuits & Electronic Packaging for 10 years.

Fred Barlow earned a Bachelors of Science in Physics and Applied Physics from Emory University, a Masters of Science in Electrical Engineering from Virginia Tech, and a Ph.D. in Electrical Engineering from Virginia Tech. Dr. Barlow has published widely on electronic packaging and is Co-Editor of The Handbook of Thin Film Technology  (McGraw Hill, 1998) & Co-Editor of the Ceramic Interconnect Technology Handbook (CRC Press 2007). In addition, he has written several book chapters including two chapters on thin films and one on components and devices. He is currently an Associate Professor of Electrical Engineering at the University of Idaho and serves as the Editor-in-Chief of the Journal of Microelectronics and Electronic Packaging.

M4
Hermeticity and “Near Hermetic” Packaging Concepts
Course Leaders: Thomas J Green, TJ Green Associates & Aaron Der Marderosian Sr., Raytheon Company

Course Description:
Hermeticity of electronics packages and hermeticity test techniques continue to be of critical importance to the microelectronics packaging community.  Specifically, in the area of MEMS/MOEMS packaging, medical implants, optoelectronic components and packaging for Military and Space.  In contrast to a hermetic cavity style package “near hermetic” high performance/low cost  packages made from Teflon and LCP  materials are in increasing demand by the military OEMs.

This course begins with an overview of hermetic sealing processes.  The class will then examine the accepted leak test techniques as prescribed in Mil Standard 883 Test Method 1014. This misunderstood test method is often a source of frustration. We’ll discuss the many ways to test for hermeticity and equations that relate leak rates to moisture ingress, which is the primary concern in the final package configuration.

Optical Leak Test (OLT) is a method that makes use of a laser interferometer to measure out plane deflection on a lid surface in response to a changing pressure and relates these measurements to an equivalent helium leak rate.  Cumulative Helium Leak Detection (CHLD), which can measure leak rates as low as 10E-13 He cc/sec will also be discussed.

Packages made from polymeric materials as opposed to traditional hermetic seals (i.e., metal, ceramic, etc.) require a different approach from a testing standpoint.  The problem is now one of moisture diffusion through the barrier and package interfaces.  A brief review of the techniques and methods to evaluate a “non-hermetic” approach is presented.

Special Course Material:
All attendees will receive a complimentary copy of Hermeticity of Electronic Packages by Hal Greenhouse, Noyes Publications 2000 (List price $167) and a Practical Guide to TM 1014 authored by Mr. Green.

Who Should Attend?
This PDC is intended as an introductory to intermediate level course for process engineers, designers, quality engineers, and managers responsible for sealing, leak testing and RGA results and for those responsible for evaluating new polymeric cavity style packages.

Thomas Green is an independent consultant and Adjunct Professor at the National Training Center for Microelectronics.  He has over twenty-five years experience in the microelectronics industry and has worked at Lockheed Martin Astro Space and USAF Rome Laboratories. At Lockheed he was a Staff engineer responsible for the materials and manufacturing processes used in building custom high reliability space qualified microcircuits for military and commercial communication satellites. Tom has demonstrated expertise in seam sealing and leak testing processes.   He has conducted experiments and presented technical papers at NIST (National Institute Standards and Technology) and IMAPS on leak testing techniques and optimization of seam welding processes through statistical DOE methods. Tom is an active IMAPS member and has a B.S. in Materials Engineering from Lehigh University and a Masters from the University of Utah.

Aaron Der Marderosian is an Engineering Fellow in the Mechanical Engineering Directorate, Materials Department at Raytheon Company in Sudbury, Mass.  He has been actively involved for more than 40 years in failure mode analysis and in particular, areas associated with moisture related problems. He has authored more than 60 technical papers and presentations on a wide range of subjects on device reliability and failure mechanisms. His experiences include environmental testing, hermeticity test methods and specification, experimental stress analysis, accelerated test development, electrical properties of materials, humidity related corrosion testing and analysis, component evaluation, chemical analysis and extensive instrumentation and evaluation of deployed systems.  Mr. Der Marderosian received his education at Northeastern University Dept. of Electrical Engineering and has lectured in its Center for Continuing Education.

M5
Introduction to Microelectronics Packaging Technology
Course Leader: Phillip G. Creter, Creter & Associates

Course Description:
This up-to-date and constantly revised course provides an introduction to microelectronics packaging using simple terms with no prior knowledge of microelectronics required for ease of understanding. Emphasis will be on visual aids including actual samples, a variety of photos and figures. The attendee will learn basic packaging definitions and current t terminology of materials, processes and equipment, including: thick/thin film technology, and nanotechnology as applied to microelectronics and semiconductor processing.

New 2007 updates include MEMS, SiP, RFID, Thru-Silicon Vias, Thin Chips/3D/WLP, Green Technology, and new metal/metal oxide transistors. An overview of major industry leaders include Intel’s 45nm process, IBM’s C4NP, Freescale’s RCP, Samsung’s TSV, Amkor’s SiP & SoP, and others.

Technical topics with video clips highlights include WLP, FC bumping, substrates (ceramic, conductors, dielectrics, co-fired, LTCC); components – passives, actives, chips vs. discrete SMT components and flip chip; assembly including details of basic package types (SO, LCC, CERDIP, QFP, QFN, BGA, stacked die, and plastic over molded lead frame). Also covered is die attach, wire bonding and micro soldering, rework & repair, final assembly including elements of visual inspection, test, failure analysis, design, documentation, cleanrooms and handling techniques.

A 200-page invaluable class handout includes an expanded glossary and list of references.

Who Should Attend?
Designed primarily for entry-level R&D/manufacturing/quality technicians/engineers or others with little knowledge of microelectronics packaging but also includes topics of interest for senior engineers’ overview, sales/marketing, purchasing, safety and management.

Phillip Creter has over 30 years of microelectronics packaging experience and is a Life member of IMAPS. He was elected a Fellow of the Society, National Treasurer and President of the New England Chapter (twice). He received a BS in Chemistry from Suffolk University and has published numerous papers, holds a U.S. patent, has given many technical presentations (received Best Paper of Session award IMAPS 1998) and chaired technical sessions for symposia. He is currently a consultant with experience at Polymer Flip Chip Corporation, Mini-Systems, GTE and Itek Corporation. His past positions include GTE Microelectronics Center Manager (receiving the coveted Lesley Warner Technical Achievement Award), Process Engineering Manager, Process Development Manager, Materials Engineering Manager and Manufacturing Engineer. Phil currently teaches courses at microelectronics events and for the Department of Homeland Security.

M6
Plating Processes for High
Reliability Microelectronic Devices
Course Leader: Fred Mueller, Consultant, ASEF Instructor

Course Description:         
• Provide a thorough overview of the use of nickel, gold, and other precious metals that are electroplated for a variety of applications in the field of electronics;
• Present methods for conservation (and reuse) of precious metals, as well as pollution prevention and waste treatment methods;
• Understand the use of Laboratory controls and plating cells to test solutions, including a “hands on” demonstration of the Hull Cell;
• Highlight the engineering differences in plating processes.

Special Course Material:
All attendees will receive a copy of Plating for Electronics (an AESF Publication).

Who Should Attend?         
This course is intended as an introductory to intermediate level course for process engineers, quality engineers, and managers responsible for Electronic Finishing.

Mr. Mueller is a consultant and serves as a national certified instructor for the American Electroplaters and Surface Finishing Society (AESF).  He has over twenty-five years experience in the plating industry in printed circuits and plating for electronics.  He is currently the National Quality Manager at General Magnaplate, Linden, NJ.  As a Chemist, Fred has conducted experiments and presented technical papers at SurFin on various topics in electroplating.  He is very active in AESF, currently serving as Past President on the National Board.  He has served as Chairman of the Quality in Surface Finishing Committee and the Electro-forming Committee of the AESF.

M7
Failures and their Prevention in
Electronic Assemblies with Focus on Lead (Pb) Free Technology
Course Leader: Dr. Puligandla Viswanadham, University of Texas at Arlington

Course Description:
This course provides a comprehensive account of the commonly observed failures in electronic assemblies, their modes and mechanisms. It begins with an overview of packaging hierarchy, followed by why failures occur, the methods to detect and analyze them. The module then explores some real life failures in PWBs, components, and assemblies.

Assembly with Lead (Pb)-free alloys is relatively new, considering the long history and experience with eutectic Sn/Pb. Understanding of the performance of Pb-free interconnections under a variety of loading conditions is in its infancy. Compositional variations in the PB-free alloy can have a significant impact on the interconnection behavior under different loading conditions. While Sn-Ag-Cu alloy is a three-component system, the joint itself can be of five or six components.  Variations in the alloy, the PWB surface and component finishes, and assembly process can cause variation in performance and reliability. A variety of failure mechanisms, different from the ones with eutectic Sn/Pb solders, were reported. Influence of minor elements on the behavior of Pb-free solders is not adequately explored. There is a need for a better understanding of Pb-free solders to ensure product performance and reliability since their implementation has already started. Materials & microstructural aspects, unique failure modes & mechanisms will be covered along with a discussion of prevention.

Who Should Attend?
As an introductory to intermediate level course in materials, design, process aspects of electronic assembly failures and their prevention, it is beneficial to those entering the electronic packaging industry, process engineers, managers, and those involved in (Pb)-free technology.

Dr. Puligandla Viswanadham is an Adjunct faculty at the University of Texas at Arlington, Texas. He recently retired as a Principal Scientist at Nokia, Irving, Texas. He worked, in the past at Raytheon and TI as Senior Member of the Technical Staff, and at IBM as Advisory Engineer.
He authored/co-authored over 125 papers, 8 book chapters, and a book on Failure Modes and Mechanisms in Electronic Packages. He holds 7 patents and 15 invention disclosures. He is currently preparing books on portable electronics and fundamentals of electronic packaging.
He received the Third IBM Invention Achievement Award, an Excellence Award, and a Fourth Level Author Recognition Award. He was on the faculty of Ohio Dominican College, Columbus, Ohio (1974-78).

His experience encompasses Advanced Packaging and Laminate Technologies, Reliability, Failure Analysis and (Pb)-Free technology. He is a member of SMTA.

M8
Selecting a Lead-Free Solution for Military, Avionic and Space Applications
Course Leaders: Craig Hillman & Jim McLeish, DfR Solutions

Cancelled

M9
Packaging and Integration of RFIDs and Related Identification Tags
Course Leaders: Ajay P. Malshe, Ph.D., University of Arkansas & Frank Bachner, TechSearch International, Inc.

Cancelled

M10 -- ½ Day Course: 9 am – Noon
ESD Factory & Cleanroom Issues, Equipment Troubleshooting, ESD Packaging & Materials and ESD Standards/Test Methods
Course Leader: Robert J. Vermillion, RMV Technology Group, LLC

Institute of Packaging Professionals/CPP-Lifetime/Fellow
Certified, ESD Engineer-iNARTE
Certified, Product Safety Engineer-iNARTE

Cancelled

M11 -- ½ Day Course: 1 pm – 5 pm
Biomedical Materials, Devices and Packaging
Course Leader: Z. Joan Delalic, Ph.D., Temple University

Course Description:
The basic objective of this workshop is to provide material to professional engineers and scientists who work in design, packaging, and manufacturing of medical devices.  The workshop will emphasize the latest research in drug delivery and implantable devices for sensing and diagnostic purposes.

Biomedical engineering is divided into multiple components—large equipment for diagnostic purposes, smaller portable equipment for home/hospital use, sensors and MEMS/NEMS to measure and/or enhance specific body function and the latest drug delivery devices. Recent developments in high power microscopy are allowing the development of implantable micro/nano devices.
The materials used for packaging implantable biomedical devices must address issues in the selection of biocompatible materials to bio-stability to structure/function relationships. The focus of this workshop is the use of specific biomaterials based on their physiochemical and mechanical characterizations.

Many studies are being conducted in laboratories to develop nanoscale bio-structures. These structures can mimic or affect a biological process or interact with a biological entity. The structures include numerous micro/nano scale sensors that work using physical properties of bulk materials via complex mechanical and electronic apparatus.

This workshop will introduce a novel approach in designing, packaging, and defining bio-compatible materials for bio-devices used as implantable, monitoring,  drug delivery and replacement of bio-parts devices, MEMS/NEMS, etc.

Who Should Attend?
This course is intended as an introductory to intermediate level course for packaging engineers, designers, materials engineers, and engineering managers.

Dr. Z. Joan Delalic is a Professor in the Department of Electrical/Computer Engineering, Temple University. She has a BS and MS in Electrical Engineering and a PhD in Bioelectronics. She is currently involved in Biomedical and Nanotechnology research. Her involvement in biomedical research involves different types of implantable sensors for measuring various biological functions. Her nanotechnology research involves the development of implantable structures for drug delivery to tumors.

 

Register

 

Platinum Sponsor:
NATEL - Platinum Sponsor
Gold Sponsor:
Panasonic Factory Solutions - Gold Sponsor
Silver Sponsor:
Hesse & Knipps - Silver Sponsor
40th Anniversary
Hospitality Sponsor:

Heraeus, Thick Film Div. - 40th Anniversary Hospitality Host

 

Event Sponsor - Keynote:
Cisco - Keynote Presentation Sponsor

Teledyne Microelectronics - Keynote Presentation Sponsor

Event Sponsor -
Speaker Gifts,
Memory Sticks:

Kingston Technology - Speaker Gifts, Memory Sticks

Event Sponsor - Lanyards:
Sefar - Event Sponsor, Lanyards
Event Sponsor - Cafe:
TT APSCO - Event Sponsor, IMAPS Cafe
Event Sponsor - Cafe:
PacTech - Event Sponsor, IMAPS Cafe

Event Sponsor - Cafe:
Kyocera - Event Sponsor, IMAPS Cafe

Event Sponsor - Bag Inserts:
Ticona Engineering Polymers - Event Sponsor, Bag Inserts
Event Sponsor - Bag Inserts:
Advanced Chemical Technology (ACT), Inc. - Event Sponsor, Bag Inserts
Event Sponsor - Bag Inserts:
Barry Industries, Inc. - Event Sponsor, Bag Inserts
Event Sponsor - Bag Inserts:
Chip Supply - Event Sponsor, Bag Inserts
Event Sponsor - Bag Inserts:
Gannon & Scott - Event Sponsor, Bag Inserts

Final Program Sponsor:
Indium Corporation - Final Program Sponsor


Golf Sponsors:
NXGen Electronics - Golf Sponsor
VIOX Corporation - Golf Sponsor
Ed Fagan, Inc. - Golf Sponsor

Emerson & Cuming - Golf Sponsor

GDSI - Golf Sponsor

Metalor - Golf Sponsor

SENTEC E&E - Golf Sponsor

Torrey Hills Technology, a G Tech Systems Group - Golf Sponsor
Torrey Hills Tech.
Threerollmill.com

SPM - Golf Sponsor

Zentrix Technologies - Golf Sponsor

Media Sponsors:

Advanced Packaging - Media Sponsor

Global SMT & Packaging - Media Sponsor
Photonics Spectra - Media Sponsor

Chip Scale Review - Media Sponsor

Antennas Online - Media Sponsor
Equipment Protection - Media Sponsor
LED Journal - Media Sponsor
SMT - Media Sponsor
Thermal News - Media Sponsor

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Organized by the International Microelectronics And Packaging Society (IMAPS)
611 2nd St, NE - Washington, DC 20002 - 202-548-4001
© IMAPS 2007. All Rights Reserved.

Unless otherwise noted, all photos courtesy of IMAPS.
Thin Si 2007 courtesy of Charles Banda, Lab for Physical Sciences & R. Wayne Johnson, Auburn University. Cell phone circa 1997 courtesy of Nokia. SMT Computer Module circa 1987 courtesy of Greg Caswell, VirTex Assembly Services. Hybrid Assembly circa 1977 courtesy of Bruce Romenesko, JHU/APL. Hybrid circa 1967 courtesy of Alan Hirschberg, Northrup Grumman.