Sessions (TA1 - TA6) | Afternoon Sessions (TP1 - TP6)
Sessions (WA1 - WA6) | Afternoon
Sessions (WP1 - WP6)
Sessions (THA1 - THA6)
Session | Program Grid (At-a-Glance)
Tuesday, November 13, 2007 |
8:00 AM - 10:45 AM
|RF, Automotive and Translated Track" |
|Advanced Technologies Track
RF and Microwave
Chairs: Aicha Elshabini, University of Idaho; Ron Barnett, Giga-Tronics, Inc.
Novel uses of materials and manufacturing techniques for RF and Microwave performance enhancement in LTCC, ceramic and PCB environments.
High Performance 3-Dimensional Hybrid-Integrated Switch Matrix for Ka-Band Satellite Communication Applications based on Ceramic Multilayer Technology
J. F. Trabert, K.-H. Drüe, J. Müller, R. Stephan, M. A. Hein, Technische Universitat Ilmenau
Innovative Technique of Shielding for RF Applications at Package Level
Scott Morris, Milind Shah, RFMD
Interconnect Integrity Challenges in the Development of a Flexible Package
Syed Sajid Ahmad, Fred Haring, John Jacobson, Zane Johnson, Kevin Mattson, Aaron Reinholz, Bernd Scholz, Greg Strommen, Conrad Thomas, Karen White, North Dakota State University (NDSU)
Origami Packaging – Novel Printed Antenna Technology for Ad-hoc Sensor Applications
Sergio Melais, Thomas M. Weller, University of South Florida; C. Mike Newton, Randall W. Smith, Carol A. Gamlen, Harris Corporation
Examination of Thermal Via Design within LTCC Structures
T. Vincent, B. Pierce, M. Ehlert, Barry Industries
Improved Thermal Management in High Power Applications by Utilizing Novel “Filled Vias” Thin Film Substrate Technology
A. Kaiser, K. Ruess, B. Holl, J. Vanselow, E. Feurer, Reinhardt Microtech GmbH; J. Kusterer, University of Ulm
Chairs: Wenning Liu, Pacific Northwest National Lab.; Fred Barlow, University of Idaho
Lead-free assembly continues to be a critical area. While significant progress has been made, a number of key issues still exist in the attachment materials themselves as well as the interaction of these materials with die and substrate metallization. The papers in this session will focus on lead-free attachment materials, compatible metallization, and the resulting impact on reliability.
Zn-Sn and Zn-In High Temperature Lead-Free Solders
K. Suganuma, S.-J. Kim, J.-E. Lee, K.-S. Kim, Osaka University
Formation and Growth of Intermetallic Compounds at the Interface between Pb-Free Solder and Cu-Zn Alloy UBM
Chang Yul Oh, Hee Ra Roh, Young-Ho Kim, Hanyang University
A Study of Ni Thickness Effect on Mechanical Strength of Pb-free BGA Spheres on Selectively Plated Ni/Au Finish
Eu Poh Leng, Freescale Semiconductor Malaysia Sdn Bhd; Min Ding, Joah Rayos, Freescale Semiconductor Inc.; Ibrahim Ahmad, National University of Malaysia; Azman Jalar, National University of Malaysia; Cui Cheng Qiang, Compass Technology Co., Ltd.
Alloying Effect of Ag and Cu in SAC Solder for Ductile - Brittle Failure at Different Mechanical Test of Solder Joint
Liang Yi Hung, Chun Hsien Fu, Don Son, JiangYu Po Wang, C. S. Hsiao, Siliconware Precision Industries Co., Ltd.
New Thick Film Conductor Pastes on AlN for Pb-Free Solder
Melanie Hentsche, Christel Kretzschmar, Chriffe Jaidane, Fraunhofer Institute for Ceramic Technologies and Systems
The Study of Non-Wet Phenomena between Solder Ball and Paste
Shikyung Kim, Kyungdu Kim, Hun Han, Sungchan Han, Dongchun Lee, Samsung Electronics Co.
Impact Property Evaluation of Ag-Epoxy Conductive Adhesive Joint
Do-Seop Kim, Min Kang, Keun-Soo Kim, Sun-Sik Kim, Seong-Jun Kim, Katsuaki Suganuma, Osaka University; Qiang Yu, Yokohama National University
Chairs: Douglas C. Hopkins, University at Buffalo (SUNY)
This is a very leading-edge session introducing several new packaging material approaches. From nitride to nano-silver and from LTCC to embedded ferrules, both advanced materials and structures are described for LED packaging. A good description of matrix LED assembly is presented.
High Heat Dissipation Package Structure of Nitride-based Semiconductor Green Light Emitting Diodes
K. C. Chen, Ricky W. Chuang, Y. K. Su, J. Q. Huang, National Cheng Kung University; C. L. Lin, Kun-Shan University
An Ultra High Performance 1Tbps Bandwidth Optoelectronic LSI Package using Post-Reflow Optical-Interface Stacking Technique
Hiroshi Hamasaki, Hideto Furuyama, Hiroshi Uemura, Hideo Numata, Chiaki Takubo, Hideki Shibata, Toshiba Corporation
Design and Synthesis of Mesoporous Nano-Silver-Based Die Attach Material for High Power Electronics
Katsuaki Suganuma, Jinting Jiu, Doseop Kim, Keunsoo Kim, Osaka University
Designing and Manufacturing Microelectronic Packages for High-Power Light-Emitting Diodes
Brian Wright, Jianbio Pan, Richard Savage, Cal Poly State University
High Brightness Matrix LED Assembly Challenges and Solutions
Daniel D. Evans, Jr., Palomar Technologies, Inc.
Welding Induced Alignment Distortion in Dual-in-Line LD Packages
Wenning Liu, Xin Sun, M. Khaleel, Pacific Northwest National Laboratory; Frank G. Shi, University of California
Chairs: Jim Knighten, Teradata; Glenn E. Oliver, DuPont Electronic Technologies
This session focuses on signal integrity and EMI radiation issues related to systems, printed circuit boards, and devices. Signal integrity design issues relate to problems encountered in the transmission of high-speed digital signals. EMI design issues relate to system shielding, printed circuit board design, and device characteristics.
Electric and Magnetic Scans of the Near Field of a PC Platform System Clock
Kevin P. Slattery, Kevin J. Daniel, Xiaopeng Dong, Intel Corporation
Methodology of Physics-Based Model Development for Differential Vias
Jianmin Zhang, Wheling Cheng, Darja Padilla, Eddie Wu, John Fisher, Luis S. Boluna, Bill Chen, Kelvin Qiu, Cisco Systems, Inc.; Zhiping Yang, Nuova Systems, Inc.; James L. Drewniak, University of Missouri-Rolla
Measurement of Differential Skew for State of the Art Applications
James R. Broomall, Christopher G. Ericksen, W. L. Gore & Associates, Inc.
Evaluation of the Shielding Characteristics of a Commercial 19-Inch Rack-Based Cabinet
Jue Chen, James L. Drewniak, Richard E. DuBroff, Jun Fan, University of Missouri-Rolla; James L. Knighten, John Flavin, Teradata Corporation
Using Unconventional Materials for Electromagnetic Shielding
Lothar O. Hoeft, Electromagnetic Effects
A Theoretical Statistical Analysis of Fiber-Weave Impact on High Speed Differential Signaling
Xiaoning Ye, Jeff Loyer, Intel Corporation
Determining the Effects of Package Parasitics on SI and EMC Performance
Douglas C. Smith, D. C. Smith Consultants
Reliability Challenges of Military Systems
Chairs: Thomas Green, TJ Green Associates LLC; Ron Zhang, Sun Microsystems
Reliability of critical weapons systems for Military and Homeland security continue to be a major concern, especially in the area of no lead, flip chip, opto applications and how is system reliability affected under long term storage conditions. We’ll examine each of the topics in more detail during this session.
Development of a Fluxless Flip Chip Bonding Process for Optical Military Electronics
Michael Girardi, Daric Laughlin, Philip Abel, Steve Goldammer, John Smoot, Honeywell Federal Manufacturing and Technologies
Risk Assessment Methodology for Lead-Free Solder Assembly
T. F. Marinis, K. A. Cooper, E. E. Judge, C. K. Bjune, J. A. Medernach, A. L. Robert, J. W. Soucy, Charles Stark Draper Laboratory
Assessment of the Impacts of Packaging, Long-Term Storage, and Transportation on the Failure Modes of MEMS Devices
J. L. Zunino III, D. R. Skelton, U.S. Army RDE Command
A Study of Uni-Traveling Carrier Traveling Wave Photo Detector for Generation of Microwaves and MM Waves
N. Koka, A. Madjar, Temple University; M. Draa, J. Bloch, P. K. L. Yu, University of California
Interconnect Technologies and High Density Boards
Chairs: Munawar Ahmad, Molex, Inc.; Bruce M. Romenesko, The Johns Hopkins University/APL
This broadly focused session encompasses many aspects of high density interconnections, including high frequency applications. Included are papers pertinent to strengths and tradeoffs of design, materials, and process areas relevant to the life cycle of high density hardware.
Vapor Phase Reflow for Reliable Assembly of a New High Performance Interconnect Technology
Theron Lewis, IBM ECAT Qualification and Assembly; Joe George, Amphenol – TCS, Inc.
"Inside-Out" Fabrication of HDI Layers: Flush Pads With No Plating
Jim Haley, Ken Holcomb, Catherine Shearer, Ormet Circuits, Inc.
Signal Integrity Optimizations for Vertical Interconnection Solder Balls of Chip Scale Package Stacks using Full-Wave Simulations
Mohammed Shahriar Sabuktagin, Pramod C. Karulkar, University of Alaska Fairbanks
Development of Film Based Thin Multilayer PCB by Roll-to-Roll Process
Takashi Ichiryu, Yoshihisa Yamashita, Seiichi Nakatani, Tatsuo Ogawa, Matsushita Electric Industrial Co., Ltd.
Unwanted Coupling in Millimetre-Wave Multilayer Circuits
Anne D. Abeygunasekera, Charles E. Free, University of Surrey
Tuesday, November 13, 2007 | Afternoon Sessions:
1:45 PM - 4:55 PM
|RF, Automotive and Translated Track" |
Chairs: Timothy Mobley, DuPont Microcircuit Materials; Tracey Vincent, Barry Industries Inc.
The RF Broadband session will focus on the challenges presented by designing an integrated RF circuit within a multilayer system namely connector to trace and layer to layer transitions, discussion of coupling shielding and filter design, modeling and fabrication. The session also has a variety of subtopics that include new design methodology for increasing bandwidth capabilities, reliability of solder joints for high power applications from a microstructure perspective, and building a realistic simulation model for analyzing design and fabrication tolerance issues.
Discontinuity Cancellation to Boost Package Bandwidth up to Material's Limitations – 40 Gbps Package Design using Wire-Bonded PBGA
Dong Gun Kam, IBM T.J. Watson Research Center; Joungho Kim, Korea Advanced Institute of Science and Technology (KAIST)
Analysis of the Fabrication Issues Relating to Multilayer Microwave Components
Chunwei Min, Charles E. Free, University of Surrey
LTCC Design Techniques for Microwave Integrated Circuits used in Radar and T/R Modules
Timothy Mobley, Glenn Oliver, DuPont Electronic Technologies
Integrated EMI Shield for RF Modules: Packaging Technology, Simulation and Characterization
Thomas E. Noll, Dinhphuoc V. (Jimmy) Hoang, Yifan Guo, Skyworks Solutions, Inc.
High-Performance Broadband and High Frequency Interconnect Designs for RF Coaxial Connector to Multilayer Ceramic Package Transitions
Jerry Aguirre, Heather Tallo, Joseph Tallo, Marcus Vargas, Paul Garland, Adel Karmouche, Steve Hira, Kyocera America Inc.
Using Prognostics for Extending Maintenance-Free Operation Interval - A Case Study using Inductive Sensor for Condition Based Maintenance of a Wave Solder Machine
Pedro O. Quintero, Rupal Jain, Patrick McCluskey, University of Maryland
Reliability and Microstructure of SnAgCu Solder Joints in High Power RF Packaging
Mahesh Shah, Jin-Wook Jang, Freescale Semiconductor; Richard Wetz, Covidien/Energy-based Devices
Chairs: Mr. David Geiger, Flextronics; Patrick Story, Plexus
The Lead-Free presentations include the latest informative and interesting studies on lead-free alloys and their applications. These studies report on SAC405, SAC387, alloy with Cerium; mechanical considerations; and the capability for 01005 stencil printing process. Lead-free processes and applications are a vital path forward to the entire microelectronics and packaging industry.
Lead-Free Die Attach Reliability Assessment for High Temperature Environments
Pedro O. Quintero, Tim Oberc, Patrick McCluskey, University of Maryland; Bruce Geil, Army Research Laboratory
Effects of Peak Temperature Reflow on the Solder Joint Strength of Lead-Free Solder Ball on Semiconductor Units (PBGA) and Correlation of the Adhesion Strength to Intermetallic Thickness and Type
Eu Poh Leng, Khoo Meng Tze, Freescale Semiconductors Malaysia Sdn Bhd; Zanuldin Ahmad, Malaysia University Science and Technology (MUST)
A Novel Lead-Free Solder Alloy with Cerium Addition
Le Liang, Qian Wang, Jaisung Lee, Zhenqing Zhao, Samsung Semiconductor (China) R&D Co., Ltd.
Process Capability Indices for 01005 Stencil Printing Process
Krishnan Vishwanathan, Sudeep Nambiar, Daryl Santos, Arun S. Ramasubramanian, Binghamton University; Rita Mohanty, Vatsal Shah, Speedline Technologies
A Comparison Study of SAC405 and SAC387 Lead-free Solder Ball Alloy Characteristic and Solder Joint System on Ni/Au Finish
Eu Poh Leng, Freescale Semiconductors Malaysia Sdn Bhd; Min Ding, Freescale Semiconductor Inc.; Ibrahim Ahmad, National University of Malaysia; Azman Jalar, National University of Malaysia
Lead Free Interconnection Technology for Modern Packaging Application
Tom Thieme, ATOTECH Deutschland GmbH
Chairs: David L. Saums, DS&A, LLC; W. Kinzy Jones, Jr., Amoeba Technologies
Critical topics in electronics thermal management include accurate methodologies for modeling and testing component and material temperatures, adequately addressing extremely high heat flux in extremely limited on-die areas, and leakage current prediction and minimization. Constant industry efforts to reduce physical footprints while increasing functionality bring continued pressure on thermal and packaging engineering for lower thermal resistances at the die, package, and system levels. This technical session includes excellent presentations on these topics from semiconductor manufacturers, system OEMs, and university research activities.
Thermal Management in 8-Strata 4Gb DRAM SiP
Satoshi Matsui, Yoichiro Kurita, Makoto Itou, Masaya Kawano, NEC Electronics Corporation; Toshiro Mitsuhashi, Oki Electric Industry Company Limited; Hiroaki Ikeda, Elpida Memory Incorporated
Highly Efficient Thermoelectric Materials: Nanolayered Nanocrystals
Daryush Ila, R. L. Zimmerman, S. Budak, B. Zheng, C. Muntele, Alabama A&M University
Ultra Fast Calculation of Temperature Profiles of VLSI ICs in Thermal Packages Considering Parameter Variations
Je-Hyoung Park, Virginia Martin, Hériz Ali Shakouri, University of California at Santa Cruz; Sung-Mo Kang, University of California at Merced
Dynamical Heat Transfer Analysis on 3D-TSV Devices
Isao Sugaya, Kazuya Okamoto, Nikon Corporation
Chairs: Mark Hoffmeyer, IBM Corporation; Ivan Ndip, Fraunhofer Institute for Reliability and Microintegration (FhG-IZM)
System packaging includes an array of application requirements for electronic devices both large and small (“cell phones to supercomputers”). This session examines a multitude of specific packaging applications that use a broad scope of advanced materials, processes, packaging constructions, and design methods to optimize a host of emerging electronic technologies.
Packaging and Processing of a State-of-the-Art Encryption Technology
Phil Isaacs, Carl Buscaglia, Claudius Feger, Kitty Pearsall, Heiko Wolf, IBM Austin; Keith Cuthbert, Steve Hunter, W.L Gore & Associates; Mario Cesana, Giulio Moscheni, SEM
A Generalized Wide Band Model for 3D Multi-Chip Microwave Integrated Circuits and Packaging Technique Adaptable to Satellite Applications
Arvind Swarup, Dave Davitt, Ian Christison, Com Dev Ltd.
Development of an M3-Approach for Optimal Electromagnetic Reliability in System Packages
Ivan Ndip, Stephan Guttowski, Herbert Reichl, Fraunhofer Institute for Reliability and Microintegration (IZM)
Dimensional Changes in LCP SMT DIMM Connectors and the Effect on Circuit Card Flatness
Amanda Mikhail, Joe Kuczynski, Theron Lewis, Arv Sinha, IBM Corporation
High Frequency Characterization of Silicon Carrier Technology for System-in-Package Applications
Maciej Wojnowski, Grit Sommer, Florian Binder, Infineon Technologies AG; Alfred Martin, Stephan Dertinger, Qimonda AG
Evaluation of a Phase Change Passive Cooling System
Matthew Yao, Anna Kern, Ross Wilcoxon, Matthew Yao, Dave Dlouhy, Rockwell Collins
Consumer Products: Reliability and Packaging
Chairs: Ephraim Suhir, University of California at Santa Cruz; Lee Smith, Amkor Technology, Inc.
In the Feb. 2007 “Global Semiconductor Survey” by KPMG, semiconductor executives predict that ‘consumer products will become the most important application category to their revenue growth in three years.’ To capitalize on these growth opportunities, system and semiconductor designers are looking to microelectronics and packaging technologies to help solve their integration, miniaturization, cost, and time to market challenges. This session will feature papers from across the supply chain with strong participation from industry leaders from the system level through assembly to the component level. The critical role board level solder joint reliability testing and modeling plays in new portable consumer products will be covered in depth in this session.
Accelerated Life Testing of Portable Consumer Products
E. Suhir, University of California at Santa Cruz
0.3mm Pitch CSP/BGA Development for Mobile Terminals
Takayoshi Katahira, Nokia Japan Co., Ltd.; Joan Scanlan, JongWook Park, KwangSeok Oh, Amkor Technology, Inc.
Board Level Reliability of Solid State Camera Modules
G. Humpston, L. Mirkarimi, M. Huynh, Tessera, Inc.
New Innovations in MEMS Fabrications are Responsible for Meeting the Demand for Low-Cost Inertial Sensors for Consumer Market
Steve Nasiri, InvenSense, Inc.
Board Level Assembly and Rework Assessment of Thin Substrate Chip Scale Package (tsCSP), a Multi-Row Leadless Package
Sundar Sethuraman, Allen Mays, Solectron Corporation; Bob Bancod, Ahmer Syed, JaeYoon Kim, JongWoon Choi, Amkor Technology, Inc.
Thermal Management of Mobile Electronics: A Case Study in Densification
Hongyu Ran, Laura Mirkarimi, Tessera, Inc.
LTCC, Ceramic & Conductive Materials
Chairs: John R. Menaugh, DuPont Microcircuit Materials; Larry Zawicki, Honeywell International, Inc.
The use of ceramics in the electronics industry continues to grow. Ceramic applications in electronics include sensors, actuators, electro-optical materials, packaging of semiconductors, and multilayer modules for RF and Microwave applications. The reasons for the increased use is that ceramics is chemically inert, provides a hermetic package around unpackaged ICs, capable of withstanding high temperatures, and the TCE closely matches the performance of the semiconductors.
Micro-Fluidic Optoelectronic Packages based on LTCC
Edward F. Stephens, Ryan Feeler, Greg Kemner, Northrop Grumman; Fred Barlow, Jared Wood, Aicha Elshabini, University of Idaho
A Photoimageable Tape On Substrate System; Materials, Processing & Reliability
Michael A. Skurski, Barry E. Taylor, Larry A. Bidwell, Mark F. McCombs, K. M. Nair, The DuPont Company
High Performance MEMS Inertial Instruments Fabricated on LTCC Substrates
Thomas F. Marinis, Joseph W. Soucy, Brian D. Johansson, Charles Stark Draper Laboratory
LTCC-Compatible through Silver 3D 50 um Vias for High Power Microwave Source Construction
Feng Zheng, W. Kinzy Jones, Florida International University; Hubert George, Norte Dame University
The Influence of Substrate Parameters on Millimeter-Wave Planar Circuits
Wesam Ali, Charles Free, University of Surrey
Performance of a Robust Lead and Cadmium Free Thick Film Gold Conductor that Exhibits High Fired Film Density and Reliable Wire Bond Adhesion
Samson Shahbazi, David Malanga, Jim Wood, Dong Zhang, Heraeus Inc. Thick Film Materials Division
Synthesis of Semiconducting Barium Strontium Titanate Nanosize Powders through Sol-Gel Process
Wenzhong Wu, W. Kinzy Jones, Yanqin Liu, Florida International University
Wednesday, November 14, 2007 | Morning Sessions:
8:00 AM - 11:25 AM
|RF, Automotive and Translated Track" |
Microelectronics Packaging in China I (Chinese to English Translation)
Chairs: Keyun Bi, China Academy of Electronics and Information Technology; Randy Klein, WC Heraeus - HMTS
This session will focus on the Chinese microelectronic packaging market and trends, and the Chinese packaging technology, process, material, and equipment. The session will be presented in Chinese with English translation available.
The Development of Semiconductor Packaging and Testing Industry of China
Keyun Bi, China Electronics Packaging Society
Micro Mechanical Behaviours of Sn, SnPb and SnAG Solder Alloys during In-Situ Tensile Testing under TEM
Chunqing Wang, Ying Ding, Harbin Institute of Technology
Development of Green Epoxy Molding Compound for High Density Leaded Packages
Jianglong Han, Xinyu Du, Xingming Cheng, Henkel Huawei Electronics Co., Ltd.
NANTONG FUJITSU's Packaging Technic and Market
Xiaochun Wu, Nantong Fujitsu Microelectronics Co., Ltd.
The Technique Research on FBP
Jerry Liang, Jiangsu Changjiang Electronics Technology Co., Ltd.
Package Failure Mechanism Study for Interfacial Delamination
Jubshan Zhu, Ling Jin, Guangdong Yuejing High-Tech., Co., Ltd.
Chairs: Linda Bal, Freescale Semiconductor, Inc.; Jasbir Bath, Solectron Corporation
Papers in this session highlight the diversity of RoHS’s impact on the electronics community. Topics include environmental design, compliance screening methods, developments/improvements of compliant materials, and environmental testing effects on whiskers in assemblies.
Environmental Performance Evaluation of Printed Electronics in Parallel with Prototype Development
Esa Kunnari, Jani Valkama, Matti Mäntysalo, Pauliina Mansikkamäki, Tampere University of Technology
XRF Screening - A Reality Check
Sia Afshari, Paul Bennett, RMD Instruments, LLC
Eco-Design as the Tool for Decreasing the Impact of Electronic Technology on Environment
Ivan Szendiuch, Brno University of Technology; Karsten Schischke, Fraunhofer IZM
Performance of a RoHS Compliant Resistor System from 50 milli/ohm to 1 meg /ohm
Jim Wood, Meg Tredinnick, David Malanga, Heraeus Incorporated - Thick Film Division
Investigation of Sn3.5Ag and Sn3.8Ag0.7Cu Pb-Free Alloys for BGA Application on Ni/Au Finish
Min Ding, Freescale Semiconductor, Inc.; Eu Poh-Leng, Freescale Semiconductor Malaysia Sdn Bhd; Ibrahim Ahmad, National University of Malaysia
Chairs: Douglas C. Hopkins, University at Buffalo (SUNY); Anwar A. Mohammed, Infineon Technologies
This session is hot, providing leading-edge information on module packaging for high temperatures. Three papers discuss reliability issues, while the other three cover details on advanced applications. Topics cover encapsulants, module structures, such as Al-based packaging, and applications including electric vehicle drives.
Investigation of Silicone-Based Encapsulants for a High Temperature Power Module
Yunqi Zheng, Dimosthenis (Dimos) Katsis, Athena Energy, LLC
Investigation of Thermal Impedance and Stress in Direct Attached Ceramic-AlSiC Structures for use in Power Packaging
Troy McKay, State University of New York at Buffalo
Insulated Metal Substrate for High-Temperature Power Electronics Packaging
Jesus N. Calata, Thomas G. Lei, Jonathan Claassens, Guo-Quan Lu, Khai Ngo, Virginia Polytechnic Institute and State University
Reliability of Gold Wire Bond Interconnects in High Temperature (450°C), High Sheer Force (14,500 G) Applications
B. Western, J. Fraley, J. Hornberger, B. McPherson, A. B. Lostetter, Arkansas Power Electronics International, Inc.
Development of the Micro Heat Spreader for Eliminating Hot Spot in Electronic Packaging
Seok-Hwan Moon, Gunn Hwang, Chang-Auck Choi, Kyoung-Ik Cho, ETRI
High-Temperature SiC Packaging for HEV Traction Applications
Fred D. Barlow, A. Elshabini, University of Idaho; K. Vanam, Micron Inc.; B. Ozpineci, L. D. Marlino, M. S. Chinthavali, L. M. Tolbert, Oak Ridge National Laboratory
Power Delivery Techniques
Chairs: James L. Knighten, Teradata, a division of NCR; Herman Chu, Cisco Systems, Inc.
This session discusses noise reduction and modeling techniques for power delivery to both microelectronic devices and printed circuit boards which operate at high digital speeds.
Electromagnetic Bandgap Structures - Design, Modeling and Integration in Mixed Signal Modules
Madhavan Swaminathan, Tae Hong Kim, Ege Engin, Abdemanaf Tambawala, Georgia Institute of Technology
Low Bounce Noise Multilayer PCB with High Performance 3D-EBG Structure
Ki-Jae Song, Hunkyo Seo, J-I Lee, H-S Shim, Samsung Electronics; Jongmin Kim, Jongwoon Yoo, Wansoo Nah, Sungkyunkwan University
Ultra-Wideband SSN Mitigation by Splitting PWR Plane in Triangle Patches and Hexagonal Arrays
Antonio Ciccomancini Scogna, CST of America, Inc.
Characterizing Package Supply Inductances for High-Speed Interface Systems
Ralf Schmitt, June Feng, Rambus Inc.
System Power Delivery Analysis in Complex Multi-Core Microprocessor Computer Systems
J. Ted Dibene II, Henry Koertzen, Intel Corporation
Package Reliability - New Trends and Applications
Chairs: Robert Forman, Rohm and Haas Electronic Materials; F. Patrick McCluskey, University of Maryland
This session focuses on the latest developments in the assessment and enhancement of reliability of electronic components and their packaging, with emphasis on the die level and first level interconnection.
Predictive Reliability Assessment and Failure Rate Modeling for Electronic Packages
Liyu Yang, Joseph Bernstein, James Walls, Freescale Semiconductor Inc.
Evaluation of Irregular Inter-Metallic Compound Growth in Gold Wire Bonds Encapsulated with Reliable, Green Epoxy Mold Compound
Spencer Chew, Alvin Seah, Santosh Kumar, Jason Wong, Lin Shuk Chin, Andrea Soriano, Cookson Electronics Semiconductor Packaging
Numerical Analysis of Moisture Induced Failure in Semiconductor Package
Joonyoung Oh, Saeyoung Yang, Junho Lee, Soyoung Jung, Haekyung Oh, Yoonrae Cho, Younghee Song, Samsung Electronics Co.
Power Cycling Reliability Assessment of Various Die-Attach Materials
Dimeji Ibitayo, Thomas E. Salem, Mark Morgenstern, Gail Koebke, Bruce R. Geil, U. S. Army Research Laboratory
High Temperature and Element Alloying Influences on Kirkendall Voiding in Au Ball Bond Interconnects on Al Chip Metallization
M. Schneider-Ramelow, K.-D. Lang, H. Reichl, Fraunhofer Institute for Reliability and Microintegration (IZM); B. Schuch, Conti Temic Microelectronic GmbH
Aluminum Migration on the Die Surfaces of a Power Transistor in High-Intensity Electric Fields
Jingsong Xie, Jing-Jing He, Beijing University of Aeronautics and Astronautics (BUAA); Patrick McCluskey, University of Maryland
Reliability of μPILR™ Packages Under Shock Loading
Piyush Savalia, David Baker, Tessera, Inc.
3D Packaging and High Density Substrates
Chairs: Guoyan Zhang, Rensselaer Polytechnic Institute; Leonard W. Schaper, University of Arkansas
This session deals with advanced developments in the design and fabrication of 3-D packaging and dense interconnect substrates.
2nd and 3rd Level Solder Joint Reliability of High-End Flip Chip System in Package (SiP)
Sang Ha Kim, Han Park, NEC Electronics America; Chika Kakegawa, Hiroshi Tabuchi, NEC Electronics Corporation
Development of Fine 3-D MID Technology using one-shot Laser-Structuring Method
Masahiro Sato, Mitsuru Kobayashi, Yoshiyuki Uchinono, Matsushita Electric Works Ltd.; Serge Zinger, Panasonic Electric Works Corp. of America
Assembly Technology for 3-D VLSI Chip Stacks
Leonard W. Schaper, Yang Liu, Susan Burkett, Alphonso Kamto, Gayathri Jampana, University of Arkansas
3D μPILR® Package Development and Qualification Testing
Vern Solberg, Tessera, Inc.
A Novel Three-Dimensional Packaging Method for Al-Metallized SiC Power Devices
Fengqun Lang, Yusuke Hayashi, Hiroshi Nakagawa, Masahiro Aoyagi, Hiromichi Ohashi, National Institute of Advanced Industrial Science and Technology (AIST)
Wednesday, November 14, 2007 | Afternoon Sessions:
1:30 PM - 4:55 PM
|RF, Automotive and Translated Track" |
Microelectronics Packaging in China II (Chinese to English Translation)
Chairs: John Zhang, Finisar; Randy Klein, WC Heraeus - HMTS
This session will focus on Chinese packaging technology, process, material, and equipment. The session will be presented in Chinese with English translation available.
Dependence of Wetting Temperature on Solder/Substrate Oxidation in a Reductive Atmosphere
Lei Zhang, Guangwei Sun, J. K. Shang, Chinese Academy of Sciences; Li Li, Harbin Engineering University
Cross-Interaction of Different Pad Finishes in SMT Joints and Its Effect on Board Level Reliability
Lei Wang, Zhenqing Zhao, Xiaoqiang Xie, Qian Wang, Jaisung Lee, Taekoo Lee, Samsung Semiconductor China R&D Co., Ltd.
Wettability of Au-Ag-Si Brazing Filler Metal with Ni
Guosheng Jiang, Zhifa Wang, Datian Cui, Central South University
Development of an Irregular Multilayer Ceramic Feedthrough for X Band
Ling Gao, Jun Li, Hebei Semiconductor Research Institute
The Research of Zero Shrinkage LTCC Tape for Integral Substrate / Package
Charles Luo, Heraeus Materials Technology Shanghai Ltd.; He Zhongwei, East China Photo-electronic IC Institute
Flip Chip Bumping
Chairs: Hong Yang, Applied Micro Circuits Corporation; Soren Norlyng, Micronsult
This session is focused on advanced developments in flip chip bumping technologies with emphasis on interconnection formation processes.
Flip Chip Process using Mushroom Bumps and Interlocking Bumps
Tae-Sung Oh, Sun-Hee Park, Kwang-Yong Lee, Hye-Jin Won, Hongik University; Young-Ho Kim, Hanyang University
Extraneous “Microball” Formations Encountered in Leading Edge, High Pb Flip Chip on Organic Packaging Applications
David Danovitch, Pascal Blais, Elaine Cyr, IBM Global Engineering Solutions
An Electrochemical Investigation of Deposit Initiation used to Develop a Low Corrosion, Non Cyanide Immersion Gold for UBM Applications
Yu Luo, Kai Want, Neil Brown, Rohm and Haas Electronic Material, LLC
Large Die Fine Pitch Flip-Chip Bumping Technologies for Cu/low-k Devices Applied High Density Flip-Chip Ball Grid Array (FCBGA) Packages
Gi-Jo Jung, Byoung-Yool Jeon, Jun-Kyu Lee, In-Soo Kang, Nepes Corporation; SU Yoon, XW Zhang, TC Chai, Institute of Microelectronics (IME)
Removing Flux Residue under High Lead Flip Chip Die
Mike Bixenman, Kyzen Corporation
Manufacture and Characterization of a Novel Flip-Chip Package Z-Interconnect Stack-up with RF Structures
Michael J. Rowlands, Rabindra N. Das, EI (Endicott Interconnect Technologies)
Au to Au Thermosonic Flip Chip
Jim Clatterbaugh, Agilent Technologies
Sensor and MEMS Packaging
Chairs: Ajay P. Malshe, University of Arkansas; David W. Galipeau, South Dakota State University
Sensors and MEMS development continues to be an area of high interest and growth due to its role in state-of-the-art electronic systems and homeland security applications. Packaging of these devices is of major concern as it can account for a major part of device cost. This session highlights new approaches and solutions to MEMS and sensor packaging and includes specific applications in RF, optical, and acoustic devices, and gas and temperature sensing.
Vacuum Micropackaging Technology for MEMS
P. Topart, S. Garcia-Blanco, C. Alain, L. LeNoc, H. Jerominek, INO
Wafer-Level Integration with Heterogeneous Chip Redistribution and Inter-Chip Layer Process
Yutaka Onozuka, Hiroshi Yamada, Michihiko Nishigaki, Atsuko Iida, Kazuhiko Itaya, Hideyuki Funaki, Shuichi Uchikoga, Toshiba Corporation
MEMS Package for an Iron-Gallium Nanowire Based Acoustic Sensor
Rupal Jain, F. Patrick McCluskey, Alison B. Flatau, University of Maryland
Portable Gas Sensing System using Zeolite-Y/Nile Red Dye in Host-Guest Configuration
Son Nguyen, Z. Joan Delalic, Temple University
Direct Bonding of Langasite for High Temperature Applications
Erik Ansorge, Thomas Leneke, Daniel Müller, Bertram Schmidt, Otto-von-Guericke-University Magdeburg
Thick Film Sensor for Temperature Balanced Process Monitoring
I. Szendiuch, M. Reznicek, Z. Reznicek Jr., Brno University of Technology; Z. Reznicek, HIT Ltd.; V. Tvarozek, Slovak University of Technology
Design & Modeling
Chairs: Patrick Story, Plexus; Roupen Keusseyan, DuPont Microcircuit Materials
The Design and Modeling session presentations include the latest informative and interesting characterization of electrical and mechanical effects on various materials and advanced packages from super high frequency and data rates to heat sink weight optimization.
A SPICE Model of Transmission Lines Transformer (TLT)
Sergiu Radu, Sun Microsystems, Inc.
Multi-Decade Gigabit SiP with over 20 Metal Layer PALAP FCBGA Substrate
Ryuichi Oikawa, NEC Electronics Corporation
Dielectric Material Characterisation above 100GHz using the Microstrip Ring Resonator
Richard Hopkins, Charles Free, University of Surrey
The Effect of Package Pin Map on Signal Integrity for Test Applications
Hongjun Yao, Jianhua Zhou, James Forster, Antares Advanced Test Technologies
Skew Specifications for Multiple Gigabit Copper Interconnects
Christopher DiMinico, LEONI High Speed Cables
Constructing a Complex Radiation Source from Simple Point Sources
Kevin P. Slattery, Kevin J. Daniel, Xiaopeng Dong, Intel Corporation
A Modeling Methodology for Weight Optimization of Heat Sinks for Microprocessor Cooling
Ali A. Merrikh, Mike Eyman, David Walshak, Tom Dolbear, Sridhar Sundaram, Advanced Micro Devices
Chairs: F. Patrick McCluskey, University of Maryland; Jie Xue, Cisco Systems
This session focuses on the latest developments in the assessment and enhancement of the reliability of electronic products and packaging, with emphasis on solder and attach reliability.
Surface Finish of Substrate BGA Pad Effect on Flip Chip Ball Grid Array Package Solder Joint Reliability
Leilei Zhang, Lan Hoang, Peter Ubaldo, Xilinx, Inc.
Thermal Fatigue Property of WLCSP with Dielectric Polymer Layer of High Elastic Modulus
Jong Hoon Kim, Min Suk Suh, Qwan Ho Chung, Kwang Yoo Byun, Hynix Semiconductor Inc.
Packaging Reliability of Indium Attach in SiGe Electronic Module for Space Exploration Applications
Rui Wu, F. Patrick McCluskey, University of Maryland
Techniques for Investigation of Solder Interconnect Electromigration under Time Varying Current Stressing
Kevin E. Enser, Douglas C. Hopkins, Cemal Basaran, University at Buffalo
Correlations of Long-Term Reliability and Irregularly Electrodeposited Metal Surface Induced Corrosion on Module Tabs
Joohan Lee, Hyunjung Ham, Yonghyun Kim, Dongchun Lee, Heeseok Kim, Samsung Electronics Co., Ltd.
Solder Joint Thermal Fatigue Analysis of MCP
Chen Song, Liu Hai, Lee Jaisung, Samsung Semiconductor (China) R&D Co., Ltd.
Chairs: Lee R. Levine, Surfect Technologies, Inc.; Faina Zaslavsky, Microelectronic Solutions
Wire bonding is widely used in advanced, ultra-fine pitch and stacked die packages where its flexibility provides high yields and reliability.
New Developments in Wire Bonding for Future Packages
Tobias Mueller, Eugen Milke, W. C. Heraeus GmbH; EK Chung, Heraeus Oriental HighTec Co., Ltd.
Wire Bonding to Ultra-Thin Stacked Die Devices with Overhang
Yan Lie Zhang, Jovy Michael G. Sena, Suresh Kumar, Ireneo Villavert, Marit Seidel, Oerlikon Singapore Pte Ltd.
Composite Aluminum-Copper Ribbon Bonding - Heel Reliability
Christoph Luechinger, Tick-Kwang Loh, Kristian Oftebro, Garrett Wong, Orthodyne Electronics Corporation
Robust Wirebonding of X-Wire ™ Insulated Bonding Wire Technology
Christopher Carr, Juan Munar, William Crockett, Robert Lyn, Microbonds Inc.
Predictive Modeling of Diffusive Failure in Copper Wirebonded Packages
Amip J. Shah, Hewlett Packard Laboratories; Anthony A. Fischer, Intel Corporation
Organic Residues and Plasma Treatment for Wirebond-able Gold
Vincenzo Casasanta, Joel Wetzstein, Crane Aerospace and Electronics
Bond Test Methodologies for Large Aluminum Ribbon
Garrett Wong, Kristian Oftebro, Orthodyne Electronics Corp.
Thursday, November 15, 2007 | Morning Sessions:
8:50 AM - 12:00 PM
|RF, Automotive and Translated Track" |
Jisso Trend on Automotive Electronics in Japan (Japanese to English Translation)
Chairs: Fumio Miyashiro, PI R&D Co., Ltd.; Michael Alan Stein, Electro-Science Labs, Inc.
This session will discuss future trends on Automobile Electronics Jisso (Packaging Technology) Trend including semiconductors, sensors, materials and lead-free soldering in Japan. The session will be presented in Japanese with English translation available.
Future Trend of Automobile Electronics in Japan
Masayuki Hattori, Toyota Motor Corporation
Automotive Semiconductor Sensor and Packaging Technology
Takahiko Yoshida, DENSO Corporation
Stress Immunity of the Semiconductor Devices for Automotive Use
T. Tominaga, A. Shimada, CalsonicKansei Corp.
The Advanced SiP Packaging Technologies
Michitaka Kimura, Renesas Technology Corp.
Packaging Material Developments for Next Generation Vehicles
Toshiaki Ishii, Yasunori Odakura, Noriyoshi Urushiwara, Yoshitaka Takezawa, Hitachi Ltd.; Akio Takahashi, Yokohama National University
Toward Higher Reliability Lead Free Solder Paste for Automotive and Industrial Application
Atsushi Irisawa, KOKI Company Limited
Underfill, Adhesives, and Reliability
Chairs: Paul Morganelli, Emerson & Cuming; Lyndon Larson, Dow Corning
Advances in adhesives and encapsulants are critical to the development and design of new components and processes. This session will focus on the relationship of adhesive and underfill properties to the assembly and reliability of various types of components. The characteristics of the materials in their cured and uncured states will be discussed relative to demanding requirements in dispensing, reworkability, and reliability.
Technology Advancements for Flipchip Microprocessor Lid Adhesive
Stanton J. Dent, Lyndon Larson, Cassandra Larson, Dow Corning Corporation; Jacquana Diep, Seah S. Too, Charlie Zhai, Advanced Micro Devices Incorporated
High-Temperature Adhesives for Temporary Wafer Bonding Using a Sliding Approach
Wenbin Hong, Rama Puligadda, Alex Smith, Dongshun Bai, Brewer Science, Inc.; Stefan Pargfrieder, Chad Brubaker, Sarah Pfeiffer, EV Group
Evaluation of Removal Rate of Cured Silicone Adhesive from Various Electronic Packaging Substrates by Solvent and Silicone Digesters for Rework Applications
Michelle Velderrain, Marie Valencia, Nusil Technology LLC
Effect of "Total System Accuracy™" On The Underfill Process
Rita Mohanty, Brian Prescott, Tom Prentice, Dave Levasseur, Speedline Technologies
Effect of Moisture on Dielectric Properties of CSP Board-Level Underfill
Andrew Collins, Ian Cole, Emerson & Cuming
Challenges Associated with Lead Free Bump Qualification for 65 nm Technology Node
Uday Vissa, Nicole Butel, James Rowatt, Avago Technologies; Dave McCann, Jeff Collins, Amkor Technologies
Chairs: Brian Farrell, Foster Miller, Inc.; Rajen Chanchani, Sandia National Laboratories
Papers in this session focus on emerging packaging technologies being developed in industry and academia. Topics include optimization of Quantum Dot Design, inkjet printing, bumping for COG, Opto-electronic packaging, High Thermal Conducting filler particles for use in high density packaging.
A Proper Clocking and Optimization Technique for Quantum Dot Cellular Automata Designs
Satyaki Ganguly, Z. Joan Delalic, Temple University; Chen-Huan Chiang, Alcatel-Lucent
Design Considerations for Inkjet Printed Electronic Interconnections and Packaging
V. Pekkanen, M. Mäntysalo, P. Mansikkamäki, Tampere University of Technology
The Resin Core Bump Technology for COG (Chip on Glass) Application
Shuichi Tanaka, Imai Hideo, Ito Haruki, Mizuno Shinji, Hashimoto Nobuaki, Makabe Akira, Seiko Epson Corporation
Design and Process Considerations in Transitioning to Aluminum Ribbon
K. Huth, V. Tanzi, C. Italiano, L. Monterulo, Z. Guo, Semiconductor Packaging Materials Co.
Electrical and Thermal Conductive Property of High Packing Density Conductive Filler
Hideji Kuwajima, Nikka Techno Service Co., Ltd.; Kirk McNeilly, Metalor Technologies USA
Optoelectronic Packaging for 16-Channel Optical Backplane Bus using Volume Hologram Optical Elements for High Performance Computing
R. T. Chen, Hai Bi, Jinho Choi, J. Ellis, University of Texas at Austin
Electrostatic Discharge Protection
Chairs: David Swenson, Affinity Static Control Consulting, L.L.C.; Karen Shrier, Electronic Polymers; Robert Vermillion, RMV Technology Group, LLC
Control of static electricity and electrostatic discharge (ESD) within electronic manufacturing operations are becoming more critical due to increased ESD sensitivity of electronic parts. Industry standards and accepted practices have evolved over the past five years to aid in designing and defining factory controls. The presentations in this session highlight current understanding, technology and implementation techniques for managing electrostatic issues today and into the factories of the future.
Silicon Technology Development and the Impact on ESD Design with Advanced IC Packages
Charvaka Duvvury, Steve Marum, Texas Instruments
Advanced Techniques to Determine Electrostatic Risks in Electronics Factories
David E. Swenson, Affinity Static Control Consulting, L.L.C.
The Perfect ESD Storm
Ted Dangelmayer, Terry Welsher, Dangelmayer Associates
Chairs: Z. Joan Delalic, Temple University
The biomedical session will present papers relevant to electronic devices applied to the biomedical field. The electronic devices presented here will consist of biosensors and electronic circuits packaged together.
Design and Simulation of a Portable Yeast-Based Biosensor
Son Nguyen, Sowrabha Vijayanna, Z. Joan Delalic, Danny Dhanasekaran, Temple University
Synthesis of Super Paramagnetic Iron Oxide (Magnetite) Nanoparticles and their Future Application as Therapeutic Agents
Asha B. Seshadri, Z. Joan Delalic, Sudeep Debnath, Feroze B. Mohamed, Scott H. Faro, Daniel R. Strongin, Temple University
Implantable Insulin Delivery System Utilizing Wireless Technology
Gena Heng, Son C. Vo, Son Nguyen, Z. Joan Delalic, Temple University
Flip Chip - Reliability Advances in Flip Chip Assembly
Chairs: Robert Forman, Rohm and Haas Electronic Materials; Charles V. Banda, Laboratory for Physical Sciences
State-of-the-Art Flip Chip packaging continues to advance offering advantages in electrical performance and packaging density. In this session, reliability of the latest flip chip interconnects and processes will be presented.
Stress Analysis of Lidded Flip-Chip Packages Incorporated with Organic Interposers
Yi-Shao Lai, Chin-Li Kao, Tong Hong Wang, Advanced Semiconductor Engineering, Inc.
The Impact of Planarization on Bump Reliability in Flip Chip Technology
Shu-Ching Ho, Yi-Chang Lee, Hsiang-Ming Huang, Hao-Ying Tsai, An-Hong Liu, ChipMOS Technologies, Inc.
Mechanical Reliability of Cu/Low-k Multi-Layer Interconnects in Flip Chip Packages
Chihiro J. Uchibori, Fujitsu Labs. America, Inc.; Xuefeng Zhang, Sehyuk Im, Paul S. Ho, The University of Texas at Austin; Tomoji Nakamura, Fujitsu Labs LTD.
Package Reliability Using μPILR™ in Stacking and Flip Chip
Baharah Banijamali, Ilyas Mohammed, Tessera, Inc.
Board Level Drop Reliability of Package-on-Package
Seok Won Lee, Hyon Chol Kim, Chi Young Lee, Heung Kyu Kwon, Tae Je Cho, Sa Yoon Kang, Samsung Electronics, Co.
Gold Stud Bump for High Density Flip Chip Interconnect
Philip Couts, TDK Corp., of America; Dan Evans, Palomar Technologies
Chairs: Jie Xue, Cisco Systems; Virgil Ganescu, ITT Technical Institute
This session features the challenges and the latest developments in materials, assembly process, and packaging reliability for products ranging from space to consumer applications.
A Survey of Organic Materials for Printed Circuit Board Based Cavity Packaging
Linas Jauniskis, Brian Farrell, Andrew Harvey, David Walker, Foster Miller Inc.; Scott Kennedy, Rogers Corporation
Plastic Air Cavity QFN Coupled with an Innovative Ultrasonic Lid Process Achieves True Hermetic Performance
Mike Zimmerman, Christopher Lee, Quantum Leap Packaging, Inc.
Development of Newly Instrumented Plastometer and Rheological Characterization of the Low Shear Zone of an Epoxy Molding Compound for Encapsulation of Semiconductor Devices
Masaki Yoshii, Hitachi Chemical Co., Ltd.
Design, Manufacturing and Reliability Tests of a Large AlSi Fully Hermetic Package for Space Application
P. Monfraix, A. Plaza, S. Donat, C. Debarge, C. Drevon, J. L. Cazaux, THALES ALENIA SPACE FRANCE; L. Couto, W. Holmes, HCC AEGIS Inc.
High Performance Liquid Metal Thermal Interface for Large Volume Production
Yves Martin, Theodore van Kessel, IBM - T.J. Watson Research Center
Pre-flowed Gold/Tin for Hermetic Package Sealing and Die Attach
K. Huth, V. Tanzi, C. Italiano, L. Monterulo, Z. Guo, Semiconductor Packaging Materials Co.
Component vs. System Level Analysis using CFD
Virgil Ganescu, M. Curtis, ITT; A. Pascu, University "Politehnica" Bucharest