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Image courtesy of Panasonic Factory Solutions Company of America

Image courtesy of Hesse & Knipps

Images courtesy of:
Natel, Panasonic and Hesse & Knipps.

Technical Program (Sessions)


Tuesday: Morning Sessions (TA1 - TA6) | Afternoon Sessions (TP1 - TP7)
Wednesday: Morning Sessions (WA1 - WA6) | Afternoon Sessions (WP1 - WP7)
Thursday: Morning Sessions (THA1 - THA6)
Interactive Poster Session
| Translated Sessions | Program Grid (At-a-Glance)


Tuesday, November 4, 2008 | Morning Sessions: 8:00 AM - 11:10 AM

Information for Session TA4 - Chinese Translated Session - can be found here

Industry Focused Track
Systems/Design
Track
Materials Track
Translated Track
Reliability Track
Advanced Technologies Track

TA1
Automotive Electronics
Chairs: Adam Schubring, Kyocera America, Inc.; Giff Plume, Sensata Technologies

The modern automobile expands its electronic content every year. Applications run the gamut from complex control units to relatively simple sensory systems. The drive for performance particularly with respect to EMI, smaller size, high reliability, and cost effectiveness coupled with harsh environmental requirements continue to push the bounds of electronic packaging. This session gives a glimpse into some of the work done in this area to satisfy these requirements and serve this market space.

Benchmarking of 96% Alumina Substrates for Thick Film Hybrids
Dean Buzby, Sarah Groman, Heraeus, Inc.

Aluminum Coated Gold Wire for Room Temperature Wedge-Wedge Bonding
Tobias Mueller, Eugen Milke, W. C. Heraeus GmbH; Frank Rudolf, Christian Nobis, Technical University of Dresden

Flipchip Reliability Improvements for an Automotive Sensor Application
Gifford W. Plume, Sensata Technologies

Reliability of Embedded Large-Area High-K Dielectric Capacitors in LTCC Substrates
M. Ray Fairchild, Delphi Electronics and Safety; K. M. Nair, M. McCombs, Michael Skurski, DuPont Electronics; Phillip Fisher, CIS Microelectronics

Reliability Considerations of Inverter/DC Link Capacitor using PP Film and 105C Engine Coolant
Edward Sawyer, Terry Hosking, SBE Inc.

Wire Bond Comparison of Different Aluminum Alloys and Thicknesses
Barry Njoes, David M. W. Williams, Technical Materials Inc.; Michael McKeown, Orthodyne Electronics Corporation; Alex Marraiaw, Jason Hibbert, Farmingdale State University

Heavy Aluminum Wire Wedge Bonding on LTCC Substrate for Automotive Electronics
Je-Hong Sung, Jin-Wan Kim, Yun-Huek Choi, Taek-Jung Lee, Samsung Electro-Mechanics

TA2
Embedded and Integrated Passives
Chairs: Len Schaper, University of Arkansas; Gene Dunn, Panasonic Factory Solutions Company of America

Embedded and integrated passives save space on interconnect media and yield performance benefits. This session covers the latest in integrated passive technology.

Using Embedded Capacitance to Improve Electrical Performance, Eliminate Capacitors and Reduce Board Size in High Speed Digital and RF Applications
Joel S. Peiffer, 3M Company

Development of Thin LSI Embedded Circuit Board
Shuji Sagara, Tsuyoshi Tsunoda, Isao Miyatani, Jiro Takei, Shinya Amakai, Dai-Nippon Printing Co., Ltd.

Migrating Printed Wiring Board Assemblies into a System-in-Package
Irving Memis, Steven G. Rosser, Harry Vonhofen, Endicott Interconnect Technologies, Inc.

New Niobium Pentoxide (Nb2O5) Integrated Capacitors for Decoupling Applications
Leonard W. Schaper, Susan Jacob, University of Arkansas

The Design and Applications of Embedded Passives on Flexible PCB Substrates
Syun Yu, Chang-Lin Wei, Chang-Sheng Chen, Cheng-Hua Tsia, Rich Chang, Industrial Technology Research Institute

Use of High Dk, Low Loss Composite Material as used for Embedded Capacitors in High Frequency Applications
John Andresakis, Jin Hwang, Pranabes Pramanik, Oak-Mitsui Technologies, LLC

TA3
Pb-Free Materials, Solder and Reliability
Chairs: Wenning Liu, Pacific Northwest National Laboratory; David Malanga, Heraeus Incorporated - Thick Film Division

With the implementation of the Restriction of Hazardous Substance (RoHS), hybrid microelectronic manufacturers are globally embracing the Pb-free (lead free) movement. Development and application of Pb-free solder materials are great challenges to engineers and scientists on various aspects such as material selection, processes, performance, and reliability.  The purpose of this session is to bring in the latest development of Pb-free solder materials.

Effects of Pre-Pack Thermal Aging on the Formation and Evolution of IMC for Sn-Pb36-Ag2 and Sn-Ag3.8-Cu0.7 and its Correlation to Solder Joint Strength
Vemal Raja Manikam, Freescale Semiconductors; Mohd Hamdi Bin Abd Shukor, University of Malaya

The Effect of Solder Selection on High Platinum Palladium Silver Thick Film Conductors
Samson Shahbazi, David Malanga, Meg Tredinnick, Heraeus Incorporated - Thick Film Division

Board Level Failure Analysis of Drop Tested Chip Scale Package Assemblies
Nicholas Vickers, Andrew Farris, Michael Krist, Kyle Rauen, Ron Sloat, California Polytechnic State University

WLCSP Solder Bumping Mechanical Reliability Testing (Lead-Free Solder Alloys and Electroless Nickel UBMs)
Andrew J.G. Strandjord, Thorsten Teutsch, Thomas Oppert, Elke Zakel, Pac Tech

Vibration Durability of Mixed Solder Interconnects
Gustavo Plaza, Michael Osterman, Michael Pecht, University of Maryland - CALCE

Drop Impact Dynamic Response Study of JEDEC JESD22-B111 Test Board
Michael Krist, Andrew Farris, Nicholas Vickers, Jianbiao (John) Pan, California Polytechnic State University

TA4
Microelectronics Packaging in China (Chinese to English Translation)
Chairs: Randy Klein, WC Heraeus – HMTS; Charles Luo, Heraeus Materials Technology Shanghai Ltd.

Session cancelled on October 20 due to visa rejections.

TA5
Flip-Chip Reliability
Chairs: Linda Bal, Freescale Semiconductor, Inc.; Katarina Boustedt, Ericsson Mobile Communications

Papers in this session focus on Flip chip solder joint reliability. Topics include electromigration, intermetallic formation, and Solder Joint Fatigue.

Modification to Darveaux Solder Joint Fatigue Life Prediction Method for Flip-Chip Solder Joints
Bahareh Banijamali, Ilyas Mohammed, Tessera, Inc.

Investigation on Statistical Distribution of Electromigration Lifetime in Flip Chip Solder Bumps
Min Ding, Peng Su, Freescale Semiconductor, Inc.

Mechanical Characterization of CuSn Intermetallics for Advanced Flip-Chip Bonding
Wenqi Zhang, W. Ruythooren, IMEC

Bend Testing Direct Chip Attach Bump Architectures with Stress Mode Correlated to Field-Wearout in Handheld Applications
Mark R. Larsen, Fairchild Semiconductor; Ian R. Harvey, University of Utah; Anthony P. Curtis, Theodore G. Tessier, FlipChip International, LLC

A Comparative Study: Thermosonic Bonding of Flip Chip with Gold Stud Bumps to Variety of Organic Substrates
Nick Stolper, Gene Dunn, Panasonic Factory Solutions Company of America

TA6
3D Packaging and High Density Substrates
Chairs: Charles Banda, Laboratory for Physical Sciences; James J.-Q. Lu, Rensselaer Polytechnic Institute

This session focuses on the latest achievements in 3-D packaging including Through-Silicon-Via (TSV) processes, microfluidic cooling, 3D inductors, and high density interconnect substrates.

3-D VLSI Structure for High Power and High Speed Computation
Yang Liu, L. Schaper, S. Burkett, A. Kamto, I. U. Abhulimen, S. Jacob, G. Jampana, University of Arkansas, HiDEC / ENRC

A New Idea to Manufacture High Density Packaging Substrates
Chih Kuang Yang, Princo Corp.

Inter-Wafer Inductors with Magnetic Core for 3D Power Delivery
Mark E. Anderson, Guoyan Zhang, Zhengchun Liu, James Jian-Qiang Lu, Rensselaer Polytechnic Institute

Temporary Wafer Bonding Material Used at High Temperature
Dongshun Bai, Wenbin Hong, Mike Swope, Amandine Jouve, Rama Puligadda, Chad Brubaker, Sarah Pfeiffer, Erkan Cakmak, Brewer Science, Inc.

Fabrication and Electrical Performance of Z-Axis Interconnections: An Application of Nano-Micro-Filled Conducting Adhesives
Voya Markovich, Rabindra N. Das, Michael Rowlands, John Lauffer, Endicott Interconnect Technologies, Inc.

Formation of Through-Silicon-Vias using Sn Filling Process for 3D Packaging
Tae-Sung Oh, Sung-Kyu Kim, Kyung-Won Park, Min-Yong Kim, Hongik University


Tuesday, November 4, 2008 | Afternoon Sessions: 1:50 PM - 5:40 PM
Information for Session TP7 - Japanese Translated Session - can be found here
Industry Focused Track
Systems/Design
Track
Materials Track
Signal Integrity Track
Reliability Track
Advanced Technologies Track

TP1
Biomedical Electronics
Chairs: Nancy Gleason, Nordson Corporation; Joan Delalic, Temple University

Proven Electronic Packaging Technologies Adapted to Life Science Applications.

Technology for Medical Human Implants: Vision Chip on Thin Film Multilayer
Alexander Kaiser, K. Ruess, B. Holl, J. Vanselow, E. Feurer, Reinhardt Microtech GmbH; L. Liu, A. Rothermel, University of Ulm; A. Möller, MCS GmbH; A. Harscher, Retina Implant AG

Flexible Interconnect and Packaging for MEMS-based Moveable Neural Microelectrodes
Nathan Jackson, Jit Muthuswamy, Arizona State University

Computer Modeling of Induced Hyperthermia Using Superparamagnetic Iron Oxide Nanoparticles and their Application
Chris Conklin, Z. Joan Delalic, Feroze B. Mohamed, Scott H. Faro, Temple University

Laser Reflow: A Solution for Medical Electronics Assembly
John Vivari, EFD Inc.

Analog Tetrode Spikes Detection Nadia Barakat, Iyad Obeid, Temple University

LTCC Based Microfluidic Structures for the Controlled Synthesis of Antioxidant Polymers
Richard E. Eitel, Thomas Dziubla, Wenli Zhang, Paritosh Wattamwar, Kelly Cummins, University of Kentucky

A JAVA Implementation of Modified Rapid Upper Limb Assessment Yaoyao Huang, Li Bai, Judy Gold, Z. Joan Delalic, Temple University

 

TP2
Thermal Management
Chairs: Herman Chu, CISCO Systems; Douglas Hopkins, University at Buffalo

Significant advancements in thermal analysis and design for electronics and electronic components.

Thermal Simulations for 4-Layer Stacked IC Packages
Chih-Kuan
g Yu, Chun-Kai Liu, Ming-Ji Dai, EOL/Industrial Technology Research Institute

BEOL Thermal Characterization for 3D Packaging
Jamil Wakil, Evan Colgan, Lijun Jiang, Shaochen Chen, IBM Corp.

Improvement of High-Power LED Performance with Sintered Chip Attachment
Tao Wang, Guo-Quan Lu, Thomas G. Lei, Xu Chen, Louis J. Guido, Virginia Polytechnic Institute and State University

Alternative Cooling Solutions for High Power Optoelectronics
Michael Leers, Fraunhofer Institute for Laser Technology; Hans Schmidt, Fraunhofer Institute for Manufacturing Technology and Applied Materials Research

Flow Study in Magnetic Ferrofluid Micro-Channel Heat Pipe
B. J. Wang, C. R. Chen, J. R. Tsai, W. F Lee, C. H. Chen, C. Y. Chen, NSPO/NYUST/NKIT/NCTU

A Method for Predicting Thermal Conductivity for LTCC with various via Densities
Tracey S. Vincent, Worcester Polytechnic Institute; Peter Barnwell, Barry Industries

TP3
Ceramic, LTCC, Polymer and Conductive Materials
Chairs: Larry Zawicki, Honeywell International, Inc.; John Menaugh, DuPont Microcircuit Materials

The use of ceramics in the electronics industry continues to grow.  Ceramic applications in electronics include sensors, actuators, electro-optical materials, packaging of semiconductors, and multilayer modules for RF and Microwave applications. The reasons for the increased use is that ceramics is chemically inert, provides a hermetic package around unpackaged ICs, capable of withstanding high temperatures and the TCE closely matches the performance of the semiconductors.

Elimination of Surface Defects for Printable High Density Gold Conductor Pastes
Dong Zhang, Brian Kistler, Weiming Zhang, Heraeus Incorporated - Thick Film Materials Division

Response Surface Analysis and its Use to Predict LTCC Firing Shrinkage for RF Microelectronics
Michael Girardi, Gregg Barner, Cristie Lopez, Brent Duncan, Larry Zawicki, Honeywell Federal Manufacturing and Technologies

A New 3D Shaped, Monolith PZT Beam Actuator Produced by Ceramic Injection Molding
Matthias Hartmann, Soeren Hirsch, Bertram Schmidt, University of Magdeburg (IMOS)

Full-Tape-Thickness Thick Film Features Enable New Capabilities in LTCC
Richard T. Knudson, Ken Peterson, Sandia National Laboratories; Greg Barner, Frank Smith, Larry Zawicki, Honeywell International, Inc.

A Study of Thin Metal Film Formation on LTCC Substrate
Kim Yong Suk, Won-Hee Yoo, Byeung-Gyu Chang, Sung-Yeol Park, Yong-Soo Oh, Samsung Electro-Mechanics Co., Ltd.

 

TP4
Microwave and RF Applications
Chairs: Ron Barnett, GeoMat Insights; Tracey Vincent, Worcester Polytechnic Institute

Session includes Microwave packaging methods from one to forty GHz, use materials for Microwave applications, and Time Domain Reflectometry (TDR) techniques.

Implementation of Gen2 RFID Tag with Data Storage to Log and Maintain Vehicle History
Kavya Kollu, Z. Joan Delalic, Sai Nava Patanjali, Temple University

3-6 GHz Tunable Bandpass Filter using Heavily Loaded Evanescent-mode Cavity Resonators and Piezoelectric Actuators
Hjalti H. Sigmarsson, Himanshu Joshi, Dimitrios Peroulis, William J. Chappell, Purdue University

Millimeter-Wave Radio System in a Package (SIP) at 40GHz
Rick Sturdivant, Microwave Packaging Technology, Inc.

Designing Transitions using Time Domain Reflectometry
Bill Rosas, Southwest Microwave

A Low Power 5.5 GHz Current Reuse LNA for Wireless LAN Receiver
S. Toofan, A. R. Rahmati, M. Crepaldi, A. Abrishamifar, M. Graziano, M. R. Casu, G. Roientan Lahiji, Iran University of Science and Technology, Politecnico Di Torino

TP5
Manufacturing, Outsourcing and Quality Assessment
Chair: Herb Dwyer, Kevin Kennedy Associates

As outsourcing becomes dominant and contract manufacturing continues to grow, control of the manufacturing chain becomes critical. New, highly automated visual inspection systems provide the data required for quality assurance. Factory ESD control and protection are a requirement for contract manufacturing. This session will focus on outsourced manufacturing and automated inspection.

Automatic Optical Inspection of Ceramic Thick Film, Thin Film Hybrids and LTCCs
Sabine Miksa, Stratus Vision

Laser and Camera Inspection Technologies for On-Line Defect Detection
Timothy A. Potts, Dark Field Technologies, Inc.

An Alternative Green Packaging Solution in a Fully Automated In-Line Assembly-Test-Finish Operation for a Nickel-Palladium-Gold (NiPdAu) Pre-Plated Frames Leadframe Based Packages
Alvin Denoyo, Cypress Manufactory Limited

Relationship of Cu Oxidation and Hardness towards Cratering in Wirebonding
Chai Ying Lee, Cher Chia Lee, Chee Chian Lim, Infineon Technologies (M) Sdn Bhd.

Expanding Use of Onsite UHP Hydrogen Production Improves Safety, Quality and Productivity in Semiconductor Operations
David Wolff, Larry Moulthrop, Proton Energy Systems Inc.

ESD Solutions for a Class Zero Facility
Kevin Ouellette, Craig Blanchette, BAE Systems

Chun Hsien Fu, David Chiang, Y. P. Wang, C. S. Hsiao, Siliconware Precision Industries Co., Ltd.

TP6
Flip-Chip Processes
Chairs: Linda Bal, Freescale Semiconductor, Inc.; Katarina Boustedt, Ericsson AB

Flip chip approaches for High Frequency, RF, and consumer applications are presented in this session along with bumping techniques and process improvements.

Materials and Process Selection for High Frequency Flip Chip
Katarina Boustedt, Ericsson AB

Thermosonic Gold to Gold Flip Chip Bonding for Small Die High Density Interconnect
Philip Couts, TDK Corporation of America

Electrochemical Process for Through via/Bump Formation without CMP and Lithographic Processes Jae-Ho Lee, Seong-Hun Kim, Yun-Sung Moon, Suk-Ei Lee, Yeong-Kwon Ko, Kyoung-Jin Park, Hongik University

Evaluation of Innovative Nano-Coated Stencils in Ultra-Fine Pitch Flip Chip Bumping Processes
Dionysios Manessis, R. Patzelt, A. Ostmann, R. Aschenbrenner, H. Reichl, A. Axmann, G. Kleemann, Technical University Berlin/Fraunhofer IZM Berlin

Substrate Printing for Micro BGA
Rita Mohanty, Speedline Technologies

Corrosion Resistant Anisotropic Conductive Adhesive for Consumer Electronic Application
Bo Xia, Jayesh Shah, Wanda O’hara, Emerson & Cuming


Wednesday, November 5, 2008 | Morning Sessions: 8:00 AM - 11:40 AM

Industry Focused Track
Systems/Design
Track
Materials Track
Signal Integrity Track
Reliability Track
Advanced Technologies Track

WA1
Consumer Electronics
Chair: Aicha Elshabini, University of Idaho

This session addresses the next generation of consumer high density electronics, from fabrication of devices and components environmentally friendly, interconnect and assembly, to packaging with detailed qualification and improved reliability at a competitive cost. As the complexity of the product increases, basic fundamental science and engineering issues are addressed.

Hybrid CSP Package: Challenges and Solutions in Design and Manufacturing
Roden Topacio, Y. S. Low, Liane Martinez, AMD

Deposition of Ba1-xCaxTi1-yZryO3 Thin Films on HR-Si Substrate by RF Magnetron Co-Sputtering System
Hsin-Hsien Yeh, Sheng-Hao Chang, Chiung-Hsiung Chen, Jiun-Jang Yu, Ying-Chang Houng, Tai-Bor Wu, National Tsing Hua University

Effect of Material Properties on Top PoP Package Warpages
Myung Jin Yim, Ma Rong, Jason Brand, Zhenyu Huang, Ravi Kumar, Nanette Quevedo, Dejen Eshete, Jun Dayawon , Eric Pike, Numonyx

Design and Thermal Management of a Miniaturized 3D Radio in Package
Hongyu Ran, Ilyas Mohammed, Matt Schwiebert, Tessera Technologies, Inc.

Cu Wire Bond Reliability Improvement Through Focused Heat Treatment after Bonding
Yow Kai Yun, Eu Poh Leng, Freescale Semiconductors Malaysia Sdn Bhd

Nano Electro Machining (nanoEM): A Novel Method for Sculpting Nano Vias (<20 nm) for Nanopackaging
Ajay P. Malshe, Kumar Virwani, Valliappa Kalyansundaram, Kamlakar Rajurkar, University of Arkansas (HiDEC-MEEG)

Increasing IC Leadframe Package Reliability
Bruce Lee, Dan Hart, MacDermid Inc.

WA2
Design and Modeling
Chairs: Marc Zampino, Foxconn - South Florida Design; Brian Pierce, CPS Technologies Corporation

The session focuses on design methodologies and analysis techniques applied to a range of topics across the packaging community. Traditional application of engineering analysis and novel new approaches are presented covering applications in system design, package design, vibration, thermal management, wire bonding mechanics, and design automation.

Parallel Parking Simulation using MATLAB
Jagadeesh Gowda, KTwo Technology Solutions

RF MEMS Flip-Chip Package Design: Finite Element Modeling and Experimental Verification
Li Sun, Shawn Cunningham, Art Morris, WiSpry, Inc.; Changsoo Jang, Bongtae Han, University of Maryland

Effect of Thermal Contact Conductance and Bond Line Thickness on Thermal Measurement Condition of Thermal Interface Material Tester
Yi-Shao Lai, Tong Hong Wang, Chang-Chi Lee, Advanced Semiconductor Engineering, Inc.

Physical Boundaries of Gold and Copper Ball Formation
Beni Sonnenreich, Kulicke & Soffa Bonding Tools; Alon Gany, Technion-Israel Institute of Technology

RF System in Package Design for Portability between Suppliers and Technology Platforms
Chris Barratt, Insight SiP

WA3
Pb-Free Solder Materials, RoHS, and Reliability
Chairs: Wenning Liu, Pacific Northwest National Laboratory; David Malanga, Heraeus Incorporated - Thick Film Division

Pb-free (lead free) movement due to environment-friendly requirement are challenging engineers and scientists on various aspects such as material selection, processes, performance, and reliability. The purpose of this session is to bring you the latest progress concerning whisker growth, reliability, lead-free materials.

A Study of Lead-Free BGA Backward Compatibility Through Solderability Testing at Component Level
Eu Poh Leng, Wong Tzu Ling, Freescale Semiconductor Malaysia Sdn Bhd; Nowshad Amin, Ibrahim Ahmad, University of Malaysia

Pb-Free Solder for Portable and High Temperature Electronic Devices
Ganesh Iyer, Eric Ouyang, Witoon Kittidacha, Suresh LK, Spansion Inc.

Degradation Mechanism of Conductive Adhesive/Sn Interface under High Humidity
Sun Sik Kim, Keun Soo Kim, Seong Jun Kim, Katsuaki Suganuma, ISIR, Osaka University

Lead-Free Solder Ball Attach Improvement on FCPBGA with SOP Pad Finishing
Wong Tzu Ling, Eu Poh Leng, Freescale Semiconductors Malaysia Sdn Bhd; Nowshad Amin, Ibrahim Ahmad, National University of Malaysia

Mechanism of Whisker Growth caused by Corrosion of Solder
Yasuhide Ohno, N. K. Uwano, K. Inokuchi, S. Hirano, M. Ueshima, University of Tokyo

3 Steps to Successful Solder Paste Selection
John Vivari, EFD Inc.

WA4
MEMS and Sensors
Chairs: Ajay Malshe, University of Arkansas; David Galipeau, South Dakota State University

This session includes current developments in MEMS packaging and testing as well as new thick film sensor and photovoltaics applications.

True 3D Through Hole Interconnection Formed by Femtosecond Laser Irradiation/Wet Etching and Molten Metal Suction Method
Osamu Nukaga, Satoshi Yamamoto, Hiroyuki WakiokaTatsuo Suemasu, Hirokazu Hashimoto, Fujikura Ltd.

Effects of Thermocompression Die Bond Residual Stress on MEMS Inertial Sensors
Ryan T. Marinis, Ryszard J. Pryputniewicz, Worcester Polytechnic Institute; Thomas F. Marinis, Joseph W. Soucy, Charles Stark Draper Laboratory

Bonding with Al Metallurgies for 200mm MEMS Devices
Shari Farrens, Mark Franklin, Sumant Sood, SUSS MicroTec

Optical Approach to NDT of MEMS
Ryszard J. Pryputniewicz, Ryan T. Marinis, Peter Hefti, Worcester Polytechnic Institute

Thick Film Materials for Strain Gage Applications
James L. Wood, Heraeus Incorporated - Thick Film Materials Division

Fine Line Screen Printing of Thick Film Pastes on Silicon Solar Cells
Dean Buzby, Heraeus, Inc.; Art Dobie, Sefar Printing Solutions, Inc.

WA5
Package Reliability I
Chairs: F. Patrick McCluskey, University of Maryland; Jie Xue, CISCO Systems

This session is focused on interconnect reliability challenges ranging from the latest bumping technology, wiring bonding, Cu/low-k die, and substrate materials.

Filler Dispersion in Epoxy Mold Compound and its Effect on the Reliability of Cu/Low-k Devices in Plastic Ball Grid Array Packages
Min Ding, Nick Vo, Tu Anh Tran, Sheila Chopin, Peng Su, Freescale Semiconductor, Inc.

Anomalous Reliability Behaviour of 99.99% and 99.999% Pure Aluminium Wire Bonds under Thermal Cycling
P. A. Agyakwa, W. S. Loh, S. C. Hogg, M. R. Corfield, C. M. Johnson, The University of Nottingham

Manual Soldering Options for High Reliability Applications
John Vivari, EFD Inc.

Overcoming Challenges in Thermally Enhanced BGA Packaging with Low-k Silicon
Tu Anh Tran, David Dorinski, Simon Gonzales, Phong Vu, Ron Weberg, Freescale Semiconductor, Inc.

Thermal Aging of Laminate Materials and the Maximum Use Temperature of Organic Packages
Laura L. Kosbar, Claudius Feger, Soojae Park, IBM T.J. Watson Research Center

3D Corner Delamination Analysis for Fan-Out Chip Scale Package
Tz-Cheng Chiu, Huang-Chun Lin, National Cheng Kung University; Stoke Chen, G. S. Shen, ChipMOS Technologies Ltd.

Challenges in Cavity-Down Thermally Enhanced Packages Containing Low-k Dies
Chu-Chung (Stephen) Lee, TuAnh Tran, Yuan Yuan, Freescale Semiconductor, Inc.

WA6
Wafer Level Packaging / CSP
Chairs: Robert Forman, Rohm and Haas Electronic Materials; Hobie Yun, Analog Devices

Wafer-Level Chip-Scale Packaging (WLCSP) has been widely used for smaller & thinner packages at lower cost in many consumer electronics applications. This session will address current issues in WLCSP including probing challenges, reliability in automotive, solderless connection, through-Si Via etching & filling, and MEMS sensor applications.

Optimization of Probing Needle Design for Wafer-Level Probing Test
Yi-Shao Lai, Meng-Kai Shih, Advanced Semiconductor Engineering, Inc.

Reliability Improvement of Resin Stress Buffer Layer Type Wafer Level Chip Size Package for Automotive Applications
Shunpei Ogaya, Shuichi Tanaka, Haruki Ito, Hirokazu Ito, Nobuaki Hashimoto, Seiko Epson Corporation

Solderless Connection for Space Application: From DC to Microwave Frequency and Reliability Results
Philippe Monfraix, C. Dreon, A. Boetti, R. Cirone, J. L. Cazaux, THALES ALENIA SPACE FRANCE

Alternative Processing Methods for Copper Through Silicon Vias
Gayathri Devi Jampana, Leonard W. Schaper, Isi Abhulimen, University of Arkansas

Optimization of Redistributed Layers between Heterogeneous Devices for Wafer-Level Integration
Yutaka Onozuka, Atsuko Iida, Hiroshi Yamada, Kazuhiko Itaya, Hideyuki Funaki, Toshiba Corporation

Wafer Level Encapsulation of Micromachined Pressure Sensors to Realize a Liquid Flow Sensor
Ali Shakir, Changhan Yun, Bob Sulouff, Bob Murcko, Krishnaswami Srihari, SUNY- Binghamton


Wednesday, November 5, 2008 | Afternoon Sessions: 1:35 PM - 5:25 PM
Information for Session WP7 - Interactive Poster Session - can be found here
Industry Focused Track
Systems/Design
Track
Materials Track
Signal Integrity Track
Reliability Track
Advanced Technologies Track

WP1
Military Applications
Chairs: Thomas J. Green, TJ Green Associates LLC; Terry Baum, L-3 Communications Cincinnati Electronics

This session addresses a variety of divergent technical issues facing the military today. These issues include everything from counterfeit electronics, RoHS initiatives, MEMS, long term storage, system health monitoring and revolutionary new materials that are changing the landscape. The common thread is technology and ideas focused on our national security interests.

Board Level Reliability Testing of High-Rel Microprocessors Associated to RoHS Packaging Solutions
Olivier Gaillard, e2v Semiconductors

Health Monitor System for Damage Assessment of Military Assets
Brian Hatchell, Jim Skorpik, Kurt Silvers, Fred Mauss, Pacific Northwest National Laboratory

Assessment of the Impacts of Packaging, Long-Term Storage, and Transportation on the Military MEMS
James L. Zunino, III, Donald Skelton, U.S. Army RDE Command

Low CTE Near Hermetic LCP-Based Package for MMIC Applications
Faheem F. Faheem, Foster-Miller, Inc.

Thermoelectric Device Packaging for High Reliability Aerospace Applications
Mike Gilley, Marlow Industries, Inc.

Wafer Level Packaging:  Balancing Device Requirements and Materials Properties
Shari Farrens, SUSS MicroTec

WP2
Electrical Modeling & Design
Chairs: Ivan Ndip, Fraunhofer Institute for Reliability and Microintegration (IZM); Karen Shrier, Electronic Polymers Inc.

In this session, different techniques used for electrical modeling, design and analysis of electronic packages/systems so as to ensure signal integrity, power integrity and reduced EMI, will be presented.

Understanding Power Integrity in System Designs
Zhen Mu, Cadence Design Systems Inc.

Estimation of 3D Stacked POP (Package on Package) Interconnect Parasitics using PME Algorithm
Eunseok Song, Samsung Electronics

Novel Approach in Computing with Ultra-High Processing Throughput
Son Nguyen, Z. Joan Delalic, Bjorn Gruenwald, Phil Monson, Temple University

LTCC Materials, Guidelines, and CAM and Test Outputs Integration for Electronic Design Automation (EDA)
Tom Dlouhy, CAD Design Software; Tim Mobley, DuPont Corporation

Studying the Interactions between Mushroom-Type EBGs, Transmission Lines and Vias
Ivan N. Ndip, Fraunhofer Institute for Reliability and Microintegration (IZM)

WP3
Advanced Materials
Chairs: Jianbiao “John” Pan, California Polytechnic State University; Lee Levine, Process Solutions Consulting

This session is focused on the latest development of advanced materials in thermal management, biosensor, fuel cell, and other packaging applications.

High-Speed Indium Electrodeposition: Efficient, Reliable TIM Technology
Edit Szöcs, Felix Schwager, Michael Toben, Nathaniel Brese, Rohm and Haas Electronic Materials

Thermal Resistance Characterization of a Nano-Graphite Composite Thermal Interface Material
Yan Zhang, Hongyu Ran, Ken Honer, Tessera, Inc.

Reaction Bonded Silicon Carbide Materials with Favorable Properties for Thermal Management Applications
Andrew L. Marshall, Michael K. Aghajanian, Allyn L. McCormick, M Cubed Technologies, Inc.

Biocompatible Electrospun Titania-Composite Nanofiber Networks for Whole-Cell Sensing
D. Eric Aston, Jamie M. F. Jabal, Anjil Giri, Kurt E. Gustin, University of Idaho

Comparison of Catalyst Performance for a Direct Methanol Fuel Cell Fabricated in Low Temperature Cofired Ceramics (LTCC)
Yong Gao, Xiangxing Kong, W. Kinzy Jones, Florida International University

A Comparison Study Focused on the use of Electroplated Zinc Material as an Alternative to Electroplated Copper Material
Michael J. Brouillard, Sumco Incorporated

Engineering Considerations for Fabrications of Multiple-Submicro-Layer Clad Metals
Lichun Leigh Chen, Paula R. Goldstein, Robert P. Willis, Technical Materials Inc.

WP4
High Performance Interconnects and Boards
Chairs: Munawar Ahmad, Molex, Inc.; Mark Hoffmeyer, IBM Systems & Technology Group

This session encompasses many development aspects of interconnects created for high performance, high density packaging of an array of electronic technologies spanning modules, boards, cabling elements, and associated high frequency packaging applications.  Included are papers that focus on interconnect and board packaging technologies, where specific emphasis is placed on  strengths and trade-offs of design, materials, and process areas relevant to the life cycle of  high density hardware.

An Experimental and Computational Study of the Current Carrying Capacity of High Performance PWB Interconnections
Michael Rowlands, Vara Calmidi, Endicott Interconnect

Design of a High Performance Single Beam Contact for Demanding and Long Life Time Applications in Industry and Telecom Markets
Jan Broeksteeg, Tyco Electronics Nederland B.V.

3M’s Industry Leading High Speed Cable-to-Board Solutions
Richard J. Scherer, Jim Vana, Abhay Joshi, 3M Electronic Solutions Divsion (A142-3E-01)

Temperature Rise Measurement due to Joule Heating in a Stamped Metal Land Grid Array Socket
Vidyu Challa, Myra Torres, Michael Osterman, Michael Pecht, University of Maryland

High Density Interconnect for a High Pin Count Optical IC
Gerard Kums, Nienke Bruinsma, Philips Applied Technologies

Low Thermal Expansion and High Heat Dissipation Printed Wiring Boards
Sohei Samejima, Tsuyoshi Ozaki, Atsushi Inoue, Kentaro Suzuki, Hiroyuki Osuga, Mitsubishi Electric Corporation; Sadao Sato, Tsuryo Technica Corporation; Katsuaki Matsui, Institute of Unmanned Space Experiment Free Flyer

Upgrading the Performance of Legacy Hard Metric Backplane Systems using the 3M UHM Connector
Alexander Barr, Thomas Suniga, Jim Vana, 3M Company

WP5
Package Reliability II
Chairs: F. Patrick McCluskey, University of Maryland; Jie Xue, CISCO System

This session covers packaging reliability topics ranging from the latest finding in Pb-free solder joints under thermal and mechanical stress conditions, plating process improvement, techniques to characterize strain fields, to innovative dry seal packages in today’s microelectronic industry.

Intermetallic Compound Growth Mechanisms of SAC305 Pb-Free Solder on Different Surface Finishes and their Effects on Solder Joint Reliability of Flip Chip BGA Packages at Different Thermal Aging and Temperature Cycle Conditions
Sang Ha Kim, Hiroshi Tabuchi, Han Park, NEC Electronics America

Processing and Reliability Issues for Eutectic AuSn Solder Joint
J. C. McNulty, DfR Solutions, LLC

Investigation of Strain Fields at Copper/Polymer Interface by Image Correlation Technique
M. Hossein Shirangi, Jürgen Auersperg, Wolfgang Mueller, Bernd Michel, Fraunhofer Institute IZM, Micromaterial Center Berlin

Study of Suitable Palladium Thickness in ENEPIG Deposits and Comparison of the Deposition Methods for Thick Gold Deposits in ENEPAG Plating
Donald Gudeczauskas, George Milad, Uyemura International Corporation; Yukinori Oda, Seigo Kurosaka, Akira Okada, Masayuki Kiso, Shigeo Hashimoto, C. Uyemura and Co., Ltd.

Methods for Providing a Dry Seal Environment
Thomas E. Salzer, Hermetric, Inc.

Accelerated Degradation Test under Multiple Environmental Stresses and Reliability Estimation for Circular Electrical Connectors
Bo Sun, Shengkui Zeng, Beijing University of Aeronautics and Astronautics (BUAA)

WP6
Advanced Packaging
Chairs: Eric Huenger, Rohm and Haas Electronic Materials; Dave Saums, DS&A LLC

As our industry continues to evolve and new devices are developed new packages are required. The development of these packages and the solutions that they provide are the focus of this session.

Packaging of GaAs Chips for Use in RF MCM Products
Thomas F. Marinis, Caroline Bjune, Charles Stark Draper Laboratory

Bump on Flexible Lead for Wafer Level Packaging
I. Eidner, K. Buschick, L. Dietrich, M. J. Wolf, O. Ehrmann, H. Reichl, Fraunhofer Institute for Reliability and Microintegration

Inkjet Printed Interconnections on Flexible Substrates
Esa Kunnari, Kimmo Kaija, Jani Valkama, Pauliina Mansikkamäki, Tampere University of Technology

A Comparison Study on SnAgNiCo and Sn3.8Ag0.7Cu C5 Lead Free Solder System
Eu Poh Leng, Min Ding, Wong Tzu Ling, Freescale Semiconductor Malaysia Sdn Bhd; Nowshad Amin, Ibrahim Ahmad, University of Malaysia; Mok Yong Lee, A.S.M.A. Haseeb, University Malaya KL

Vertical Interconnects using Magnetically Aligned Anisotropic Conductive Adhesive for RF Packaging
Sungwook Moon, William J. Chappell, Purdue University

 


Thursday, November 6, 2008 | Morning Sessions: 8:00 AM - 12:00 PM

Industry Focused Track
Packaging Processes
Track
Materials Track
Signal Integrity Track
Packaging Processes
Track
Advanced Technologies Track

THA1
Telecom Packaging and Optoelectronics
Chairs: John Mazurowski, The Pennsylvania State University – Electro-Optics Center; Raymond Pearson, Lehigh University

This session covers: 1) processing light as a signal, 2) using light in processing or measurement, and 3) packaging topics related to the telecommunications industry.

Protoflight Model Development for Spaceborne LTCC RF-Modules
Reinhard Kulke, Carsten Günner, Gregor Möllenbeck, Peter Uhlig, Matthias Rittweger, IMST GmbH

Higher Speed Ethernet – 40 Gb/s and 100 Gb/s Copper Cable Assembly Specifications
Christopher DiMinico, Henning Hansen, LEONI High Speed Cables

Understanding the Role of Impurity Level in the Screen-Printed Front Silver Paste for High Sheet Resistance Emitter Silicon Solar Cells
Abasifreke Ebong, Georgia Institute of Technology; Weiming Zhang, Heraeus Inc. - Thick Film Materials Division

Thermoplastic Based Solutions for Microelectronics Packaging and Components
Scott MacGillivray, Matrix Incorporated

Automation: The Means to High Reliability Aerospace Fiber Optic Cables
Anthony Christopher, kSARIA Corporation; David Enlow, Jeff Sroga , Lockheed Martin Space Systems; John Mazurowski, David Ditto, Penn State University; Michael Hackert, US Naval Air Systems

Micron Level Placement Accuracy Case Studies for Optoelectronic Components
Daniel D. Evans, Jr., Zeger Bok, Palomar Technologies, Inc.

THA2
Wirebonding and Stud Bumping
Chairs: Patrick Story, Remec Defense & Space East; Faina Zaslavsky, Crane Electronics Group

The papers presented in this Wirebonding and Stud Bumping Session include: an indepth evaluation of 120kHz ultrasonic frequency; gold stud bump attachment process for large silicon IC to an organic laminate PCB; development of real-time information of bond formation; photoacoustic method for bond process control and formation; investigation into systematical pull and shear testing; reliability of large aluminum ribbon bonds; and the quality control of wire bonding.

The Effects of 120KHz Ultrasonic Frequency on the Reliability of Fine Pitch Gold Wire Bonding
Minh-Nhat Le, Jianbiao “John” Pan, Cuong Van (C.V.) Pham, California Polytechnic State University

Thermosonic Gold Stud Bump Attach for Large ICs on Laminate Substrates
Ian Hardy, Crane Electronics; Nick Stolper, Panasonic Factory Solutions

Electric NDT Method to Estimate Wire Bond Pull Force
Antti Kaskela, Henri Seppänen, Antti Meriläinen, Markku Oinonen, Edward Hæggström, University of Helsinki

Systematical Pull and Shear Test Investigations on very Small Bond Loops (Wire &#8804; 25 µm) and Innovative Alloys
Martin Schneider-Ramelow, J.-M. Göhre, Fraunhofer Institute for Reliability and Microintegration (IZM)

Thick Al Ribbon Interconnects: A Feasible Solution for Power Devices Packaging
Wei-Sun Loh, P. Agyakwa, C. M. Johnson, T. K. Loh, C. Luechinger, K. Oftebro, The University of Sheffield

Process Integrated Quality Control for Wire Bonding
Roberto Gilardoni, Hesse & Knipps Semiconductor Equipment GmbH

THA3
Underfills, Encapsulants and Adhesives
Chairs: Paul Morganelli, Emerson & Cuming; Lyndon Larson, Dow Corning Electronics

This session will look at key topics in electronic adhesive and encapsulant technology.  The properties of novel conductives and dielectrics, environmental effects and emerging techniques for processing will be discussed.

Characterization of Die Attach Adhesives to Identify Contamination Source Present in MEMS Packages
James M. Hochrein, Michael S. Baker, John A. Mitchell, Michael I. White, Jason R.  Brown, Richard W. Wavrik, Steven M. Thornberg, Sandia National Laboratories

Electrical and Mechanical Properties of Carbon Nanotube Filled Adhesives on Lead Free PCB Surface Finishes
Keerthivarma Mantena, Janet K. Lumpp, Naveen Velicheti, Midhun Jasti, Poojitha Sirigiri, University of Kentucky

Mechanism of Moisture Diffusion, Hygroscopic Swelling and Adhesion Degradation in Epoxy Molding Compounds
M. Hossein Shirangi, Bernd Michel, Fraunhofer Institute IZM, Micromaterial Center Berlin

Highly Reworkable Board-Level Underfill for Large PoP Devices
Andrew P. Collins, Patrick O’Malley, Paul Morganelli, Vinod Mohan, Emerson & Cuming

Cooling Rate Dependent Underfill Fracture Toughness Soojae Park, Claudius Feger, IBM Research; Edel Farah, University of North Texas; Melania Doll, Columbia University

Electrical, Microstructure and Rheology Properties of the Low-Curing-Temperature Silver Paste with Different Carbon-Chain Type Metallo-Organic Salt Wetting Coating
Chun-An Lu, Hong-Ching Lin, Industrial Technology Research Institute; Sea-fue Wang, Chung-Ying Jung, NTUT

THA4
Packaging for Extreme Environments
Chairs: Fred Barlow, University of Idaho; Anwar Mohammed, Infineon Technologies

Packaging electronic devices and systems that must operate effectively under extreme environmental conditions is a growing and important area. This session highlights and provides a discussion of the key challenges and advancements that represent the state of the art in both extremely hot and cold environments.

Evaluation of DirectFET® Flip Chip Packaging Technology, Lead and Indium Solder Alloys in Extreme Cold Thermal Environments
Martin J. Burmeister, Amin Mottiwala, Stellar Microelectronics, Inc.

SiC & GaN Die Attach for Extreme Environment Electronics
Srikanth Kulkarni, Fred Barlow, Aicha Elshabini, University of Idaho

Efficient Gate Drive Mechanism for Novel Silicon Carbide Power FETs
Vijayaraghavan Madhuravasal, Pratibha Kota, Chia-Ming Liu, Chriswell Hutchens, Oklahoma State University

Thermal Stress Analysis in a Multilayer Power Module
Rahul Rajgarhia, Brice McPherson, Jared Hornberger, Alex Lostetter, Ashok Saxena, University of Arkansas

Prototyping a SiC JFET Drop-In Replacement Module for a 600-V, 600-A Si IGBT Half-Bridge Module
Guoyun Tian, M. S. Mazzola, M. Molen, P. Martin, V. Bondarenko, J. R. Gafford, C. J. Parker, L. Cheng, Mississippi State University

Leakage Rates through LTCC Substrates for Extreme Environment Applications
Karl Rink, Fred Barlow, Aicha Elshabini, University of Idaho

Thermal Verification of a High-Temperature Power Package Utilizing Silicon Carbide Devices
Robert Shaw, Brice McPherson, Jared Hornberger, Alex Lostetter, Takukazu Otsuka, Keiji Okumura, Arkansas Power Electronics International, Inc.

THA5
Packaging Process Technologies
Chairs: Virgil Ganescu, ITT; Ronald Jensen, Honeywell Solid State Electronics

Papers in this session were dedicated to a wide spectrum of applications ranging from the fabrication of IC chips for fluidic assembly using components-off-the-shelf, to the analysis of the wirebondability and solderability of various electro-less metallization on Si wafers after exposure to high temperatures and all the way to the introduction of solderless connectors for space applications.

Polyimide Restructuring: Application for Printed Leadfree Bump Integrity Improvement
Roden Topacio, AMD

Low-k Interconnect Oriented Lead Free Sn-Cu Bump Process Integration with Sn/Cu Stack Plating
Tadashi Iijima, Tatsuo Migita, Takashi Togasaki, Masayuki Miura, Toshistune Iijima, Kyoko Kato, Kazuhiro Murakami, Masahide Goto, Hiroyuki Oohashi, Hiroki Sakurai, Koro Nagamine, Toshiba Corporation; Hirokazu Ezawa, Oita Operation

High Speed Dispensing Solutions for Packaging and Manufacturing
Bo Li, Kenneth Church, nScrypt Inc.

Enabling of Off-the-Shelf IC for Parallel Stochastic Self-Assembly
Bernd Scholz, Yuriy Atanasov, North Dakota State University

Understanding Behavior of Liquid Crystal Polymer (LCP) in Laser Assisted Bonding (LAB) for Wafer-Level Packaging of MEMS and Related Microsystems
Ujjwala Darvemula, Mohammed Chowdhury, Ajay P. Malshe, University of Arkansas

Wirebondability and Solderability of NiAu Electroless Metallizations Subjected to High Temperature Process Flows
Juan A. Herbsommer, Thorsten Teutsch, Osvaldo Lopez, Ciclon Semiconductors

Counterfeit Electronic Parts Detection through Packaging Evaluation
Kaushik Chatterjee, Diganta Das, Michael Pecht, University of Maryland – CALCE

THA6
Emerging Technologies
Chairs: Linas Jauniskis, Foster-Miller, Inc.; Rajen Chanchani, Sandia National Laboratories

The Emerging Technologies session is an opportunity to be exposed to recent developments in a broad array of application areas. Papers range from nano, to micro and up to macro scale issues; from materials to device and assembly breakthroughs.

High Temperature Resistance Conductive Film for RF Grounding Application
Jing Fan, Art Ackerman, Jayesh Shah, Doug Katze, Emerson & Cuming

Trade-off Between Speed and Defect Tolerance of QCA Designs in the Presence of Different Manufacturing Defects
Satyaki Ganguly, Z. Joan Delalic, Temple University

Ceramics, Coatings, and Catalysts for CleanTech
John A. Olenick, Venkat Venkateswaran, Gregory Korbut, James Newkirk, ENrG Incorporated

Thick Film Heater for Aluminium Nitride Ceramic
Melanie Hentsche, Christel Kretzschmar, Jochen Schilm, Peter Marcinkowski, Fraunhofer Institute for Ceramic Technologies and Systems

Modified Polypyrrole Nanowire Networks for Electrochemical Sensors
D. Eric Aston, Jim Erwin, University of Idaho

 

 


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