Micross


   Platinum Premier Sponsor:

   Gold Premier Sponsor:
   Silver Premier Sponsor:
NEO Tech - Premier Sponsor, Platinum
Heraeus Materials Technology - Premier Sponsor, Gold
Metalor - Premier Sponsor, Silver

IMAPS 2015 - Orlando
Advanced Packaging & the Internet of Things: The Future of Our Industry
www.imaps2015.org

IMAPS 2015 - Orlando

Conference:
October 27-29, 2015
Exhibition:
October 27-28, 2015
Professional Development Courses &
Welcome Reception :
October 26, 2015
General Chair:
Urmi Ray
Qualcomm, Inc.
Technical Chair:
Erica Folk
Northrop Grumman Corp.

Technical Committee:
Technical Co-Chair - USA:
Dan Krueger
Honeywell FM&T
Technical Co-Chair - Europe:
Andre Rouzaud
CEA LETI
Technical Co-Chair - Asia:
Woong-Sun Lee
SK Hynix, Inc.
Assistant Technical Co-Chair - USA:
Mary Cristina Ruales Ortega,
University of Missouri
Tim Mobley, Triton Micro Tech
Assistant Technical Co-Chairs - Europe:
Gabriel Parès, CEA LETI
Steffen Kroehnert, Nanium
Assistant Technical Co-Chairs - Asia:
Yu-Hua Chen, Unimicron
Won Kyoung Choi, Stats ChipPAC

GBC, Keynote Presentations, & Proceedings Papers
Now Linked to IMAPSource below!




IMAPS 2015 Technical Program

Download Final Program PDF:
IMAPS 2015 Program


Monday, October 26, 2015

Professional Development Courses (PDCs)
10:00 AM - 6:00PM

PDC "Working Lunch" in Rooms: 12:00-1:00pm (full-day and "morning" PDCs only)
PDC Afternoon Coffee Break in Foyer: 3:00-3:15pm

PDC Coffee Breaks & Lunch sponsored by:
Heraeus Materials Technology - Premier Sponsor, Gold

ALL NEW Microelectronics/Packaging Industry Tour
Featuring: Plasma-Therm, Jabil & University of S. Florida
Plasma-Therm
Jabil
University of South Florida
  • For attendees that have arrived in Orlando and are not planning on taking PDCs, you cannot miss this great tour of the local microelectronics industry!
  • No charge for IMAPS 2015 registrants to participate
  • Departs Rosen Centre at 9:30 AM and returns 5:00PM
  • Lunch will be provided during the visit at Plasma-Therm
  • Tentative tour schedule is as follows:
    • 9:30am Tour departs Rosen Centre Hotel
    • 11:30am Arrive at Plasma-Therm

      Attendees will be led from reception area to North wing for lunch, video and live presentations. (Note that attendees will not be entering cleanroom or manufacturing areas, no protective gear required): • Welcome and lunch -- meet and mingle, view exhibits. Plasma processing (including dicing) technology and product exhibits will be displayed around the north wing and will be available throughout the lunch period. • Introduction to MDS: Brief video of the Singulator™ platform showing the system and explaining the basics of plasma dicing. • Overview of Plasma-Therm facilities: Video views of cleanroom, assembly and test areas and equipment. • Plasma dicing and advanced packaging: presentation by Thierry Lazerand (with Q&A) on the new technology. A "live via video" demonstration of wafer singulation in the PT process lab is planned. • University of South Florida (USF) technology presentation: USF plans to show 3 or 4 brief videos along with a poster display. Their presentations will include introductions and overviews of USF, the college of engineering, and the DfX lab. Total time about 20 minutes with Q&A.


    • 1:30pm Depart Plasma-Therm
    • 1:45pm Arrive at Jabil
      Jabil will host a tour of the solar lab for approximately an hour
    • 2:45pm Depart Jabil 5:00pm Return to Rosen Centre Hotel in time for welcome reception
  • Maximum 50 tour registrants
  • There are no citizenship requirements from either Plasma-Therm or Jabil.
  • IMAPS will collect information on tour registrants via pre-registration signups
  • Registering does NOT guarantee your spot on the tours. IMAPS will process all requests and prepare the final accepted participant list.
  • Registration for tour NOW CLOSED - email blamm@imaps.org with questions

Plasma-Therm Facilities in St. Petersburg FL

Plasma-Therm Singulator

 

Welcome Reception | 6:00 PM - 8:00 PM
(Rosen Centre Hotel Ballroom)

Welcome Reception Sponsored by:

   Platinum Premier Sponsor:

   Gold Premier Sponsor:
   Silver Premier Sponsor:
NEO Tech - Premier Sponsor, Platinum
Heraeus Materials Technology - Premier Sponsor, Gold
Metalor - Premier Sponsor, Silver

 

Featuring NEO Tech's Third Annual Star Suppliers Awards for 2014-2015:
Based on the success of last year’s awards, NEO Tech will again recognize its best supplier's Monday evening with its Star Suppliers awards during IMAPS 48th annual International Symposium. The awards presentation will be held at the Rosen Centre in Orlando, FL during the Welcome Reception, Monday, October 26, 2015.

Based on the rapidly changing business environment we depend on our suppliers to continue their high quality and excellent delivery. They have been chosen based on their firm’s Quality and On-Time Time delivery status in order to be one of our Star Suppliers for 2014-2015.

Premier Star Supplier:
MICROWAVE COMPONENTS INC -- Component Distributor -- Mike Caputo & Tony Licari

Star Suppliers:
SEMI DICE INC -- Component OEM -- Scott Smith
QORVO INC. -- Component OEM -- Doug Cole
STELLAR INDUSTRIES CORP. -- Boards -- Brandy Wolski
ROSENBERGER NORTH AMERICA -- Component OEM -- Paul Smith-CEO , Pete Robinson Regional Sales, Joel Antipuna Operations
PICONICS, INC. -- Component OEM -- Jim Spanos (Sales Manager) & Tony Meyer .

 

TUESDAY, OCTOBER 27

7:00 AM - 5:30 PM: Registration Open
11:00 AM - 5:00 PM: Exhibit Hall Open

IMAPS 2015 Opening Ceremonies & Plenary Session:

8:00 AM - 8:15 AM: Welcome to IMAPS 2015 Orlando!
Urmi Ray, General Chair, Qualcomm

8:15 AM - 8:45 AM: Annual Business Meeting & Awards Ceremony
IMAPS President

Keynote Introductions - Urmi Ray

8:45 AM - 9:30 AM: Keynote 1
Lee Wiewiora, Northrop Grumman Corporation

Microelectronics and Packaging in the Defense Industry: Importance of Size, Weight and Power - Cost
The modern battlefield demands that soldiers endure rough terrain and weather while carrying all necessary items for their mission. These necessities include their food, water, ammunition and mission essentials, typically electronics. In order to give the troops the most capability while in the field, the efficiency and dependability of electronics is paramount. Key to the requirements definition for mission electronics is Size, Weight and Power - Cost, commonly known as the acronym SWAP-C. In addition to satisfying the SWAP-C requirements, all mission electronics need proven reliability since lives are at stake.

Major defense systems in the past have lasted 30+ years. With this in mind, systems for tomorrow are being designed to support the defense industry's need for reliability, longevity and upgrade compatibility. This talk will focus on SWAP-C and high reliability in electronics and packaging to support the defense industry for years to come.

Lee Wiewiora is a business area director at Northrop Grumman in Apopka, Florida. His primary responsibilities include the airborne laser designator/rangefinders, infrared countermeasure lasers and precision targeting equipment for special operations. He has worked in the defense industry for 36 years, primarily in program management. He has also held leadership positions in engineering and business development, has a Bachelor's Degree in Electrical Engineering from the University of South Florida and a Master's Degree in Business Administration from Florida Institute of Technology.

 

9:30 AM - 10:00 AM: Coffee Break in Foyer

10:00 AM - 10:45 AM: Keynote 2
Berthold Hellenthal, Robust Design, AUDI AG

Future Challenges and Roadmaps of Semiconductor, Packaging and Integration
in the Automotive Industry

More than 80% of all automotive innovations are directly or indirectly enabled by semiconductors. In recent years premium cars became an early adopter of new technologies to enable new customer functions. Nowadays automotive is even pushing new semiconductor and packaging technologies in some areas. The automotive megatrends continuously impose new challenges on semicondcutors and their package in performance, energy efficiency as well as in reliability and robustness.

The presentation will introduce the automotive megatrends and explain the new challenges by practical examples. In addition it will be explained how the Audi semiconductor strategy, the Progressive SemiConductor Program (PSCP), addresses the challenges - synchronizing the development speed of semiconductors with the need for increased reliability.

Dipl.-Ing. Berthold Hellenthal joined Audi in 2008 as a member of the management team. Working in the Electronic Development Department, he comprehensively supports all Audi electronic development out of the competence center "Robust Design: Electronics and Semiconductors", specializing in electronic hardware reviews and application analysis as well as semiconductors. Mr. Hellenthal is responsible for the comprehensive "Competence center Electronics and Semiconductors" as well as for the comprehensive Audi Semiconductor Strategy, the Audi Progressive SemiConductor Program (PSCP).

 

10:45 AM - 11:30 AM: Keynote 3
Jackson Bond, Co-founder and Head of Product, Relayr
*This presentation will be delivered via video/phone from remote location*


Our Hardware Revolution: How a Cloud inspired a Box of Smart Chocolates
The "internet of things" has been talked about for over 15 years. Stop talking. Build something.

When relayr started, in October 2013, we set out to build a Cloud Platform, inspired by the Cisco BlueBox. The BlueBox was the firstf multi-protocol router, that finally translated disparate protocols so different computer networks from different manufacturers could talk to each other. 30 years later the population of smart devices and smart things is exploding, but mostly in closed environments, not able to talk to each other. We set out to create a Cloud Platform to translate and interconnect, to become an agnostic interoperable layer so things can talk to each other, regardless of who makes them.

But how do you bring things and more importantly the developers into your cloud?

And that is where the Box of Smart Chocolates was born for the Internet of Things!

More Details in the talk!

Jackson Bond is the CPO and Co-Founder of relayr.io. It is time to shift from isolated things in the internet to the true inter-net of things. It must get easy, very easy. relayr.io is operating at the convergence of hardware and software, and are creators of easy tools for developers for designing, building and connecting things into the internet. The Open Sensor Cloud platform provides SDKs, REST API, and device integration for building apps across different devices from different manufacturers. The Wunderbar is an Internet of Things starter-kit for App Developers, with Wifi and 6 detachable modules with 6 Beacons, 6 Sensors, and a bridge to Arduino and Rasberry Pi. It was conceived in October 2013 and succesfully crowdfunded in March 2014, then exclusively licensed by Conrad Electronic to manufacture and distribute, globally. More at:relayr.io/wunderbar.

Jackson is also co-founder of MONOQI, Europe's premier store for discovering new designer products, and co-founded 8hertz, a speech-recognition application company (sold to VoxGen in 2007), and is an advisor to JOBSPOTTING. He previously built businesses and products for XING and Holtzbrinck.

 

11:30 AM - 11:45 AM: Introduction and What's Ahead with the Technical Program
Erica Folk, Technical Chair, Northrop Grumman

11:45 AM - 1:15 PM: Lunch & Networking in Exhibit Hall

 

AFTERNOON SESSION SCHEDULE

PACKAGING THE INTERNET OF THINGS & OTHER ADVANCED APPLICATIONS

INTERPOSERS & 2.5/3D PACKAGING

ADVANCED PACKAGING & ENABLING TECHNOLOGIES

ADVANCED MATERIALS & PROCESSES

RELIABILITY

DESIGN, MODELING & TEST

Tuesday, October 27, 2015

1:15 PM -
5:10 PM

New Packaging Technologies for IoT
Chairs: Kyu-oh Lee, Intel Corp.; Yu-Hua Chen, Unimicron

IOT is the next big opportunity to enrich every person on earth. By 2020, 50B devices is expected to be connected to the internet which means 7 connected devices every person on earth. The IOT is often times described as any combination of one or more integrated circuit(s) of different functionalities. The demands for higher levels of integration and lower costs coupled with a growing awareness of complete system configuration have continued to drive the popularity of IOT. The challenge is how to integrated all of these components seamlessly into a package. The session will focus on the challenges and solutions in the latest IOT developments of various application fields.

3D Technology Trends & Applications
Chairs: Josh Luff, Honeywell

Many advances and thought processes are coming to fruition in the 3D packaging world. This session addresses some of the changes in technologies and how industry is applying those new found principles for the future of the 3D packaging world.

Enabling Technologies for Wafer Level Packaging
Chairs: Steffen Kröhnert, NANIUM S.A.; Matt Apanius, SMART Microsystems

WLP allows for smallest and thinnest package possible. Batch processing and thin-film technology allow for high volume low cost manufacturing. Now WLP is back to "Enabling Technologies". It is gaining increasing importance, since past limitations mainly in size and reliability have been overcome. New materials enable larger WLCSP beyond the current max 8x8mm2 sizes and higher reliability. Smaller feature sizes and new 3D integration solutions are getting ready for HVM. This makes the packaging technology attractive for markets so far counting on BGA, FCBGA or fan-out WLP.

Materials and Processes
Chairs: Tim Jensen, Indium Corporation

Material choices and processing techniques play a key role in assembly and packaging. Optimizing the materials set and improving processing techniques is vital from both a cost and performance standpoint. This session will focus on the latest developments in this exciting and diverse area.

Flip Chip/BGA Reliability
Chairs: Mary Cristina Ruales Ortega, University of Missouri; Bill Marsh, Northrop Grumman ES

Flip Chip and BGA reliability, especially focused on solder joint, device and package integrity. Session includes significant emphasis on modeling and life testing Flip Chip and BGA devices.

Structural and Reliability Analysis with Mechanical Simulation
Chairs: Dan Krueger, Honeywell FM&T; John Torok, IBM Corporation

In this session, the application of various simulation and modeling methods to new system and package configurations will be presented. These results will be compared with experimental measurements to highlight the packaging configuration effects on system reliability.

1:15 PM - 1:40 PM

The Growth of Advanced Packaging: An Overview of Latest Technology Developments, Applications and Market Trends
Rozalia Beica, Yole Developpement (Andrej Ivankovic, Thibault Buisson, Jerome Azemar)

Quantitative Projections of the Cost Benefits of 3D Integration
Adam Beece, GLOBALFOUNDRIES (Dragomir Milojevic, Geert van der Plas, IMEC; Rod Augur, Michelle Sureddin, Jagar Singh, Senapati Biswanath, Bouche Guillaume, Alapati Ramakanth, Stephens Jason, Lin Irene, Rashed Mahbub, Yuan Lu, kYE Jongwook, Woo Youngtag, Wehbi Ali, Hang Peter, Ton-that Van, Kanagala Vijay, Yu Donald, Gao Shan, Samavedam Srikant)

Fan-in WLP: Technology and Market Trends
Andrej Ivankovic, Yole Developpement (Thibault Buisson, Jerome Azemar, Santosh Kumar, Amandine Pizzagalli, Rozalia Beica)

Semiconductor Market Update & Outlook: From Assembly Materials Perspective
William Crockett Jr, Tanaka (Bruening, Tanu Sharma)

Sn-Ag-Cu Solder Joints Interconnection Reliability of BGA Package during Thermal Aging and Cycling
Chaobo Shen, Auburn University (Cong Zhao, Zhou Hai, Jiawei Zhang, M. J. Bozack, J. C. Suhling)

Finite Element Analysis and Measurement of Low-Profile BVA™ Package On Package (PoP) Warpage Characteristics
Akash Agrawal, Invensas Corporation (Rey Co, Hala Shaba, Wael Zohni)

1:45 PM - 2:10 PM

Embedded Flexible Hybrid Electronics for the Internet of Things
Val R. Marinov, Uniqarta, Inc. (Yuriy A. Atanasov)

2.5D Interposers and Advanced Organic Substrate Landscape: Technology and Market Trends
Andrej Ivankovic, Yole Developpement (Thibault Buisson, Amandine Pizzagalli, Jerome Azemar, Rozalia Beica)

Hermetic Seal Bonding at Low-Temperature with Sub-Micron Gold Particles for Wafer Level Packaging
Toshinori Ogashiwa, Tanaka Kikinzoku Kogyo K.K. (Kentaro Totsu, Mitsutomo Nishizawa, Hiroyuki Ishida, Masayuki Miyairi,Yuya Sasaki, Hiroshi Murai, YukioKanehira, Shuji Tanaka, Masayoshi Esashi)

Main Impact Factors on Internal Stress of Electroless Deposited Cu-Films
Tobias Bernhard, Atotech Germany (Sebastian Zarwell, Laurence Gregoriades, Julia Schiemann, Lutz Stamp, Frank Bruening, Ralf Bruening, Tanu Sharma)

Solder Electromigration Behavior in Cu/Electroless Ni-P plating/Sn-Cu based Joint System at Low Current Densities
Takuya Kadoguchi, Toyota Motor Corp. (Kimihiro Yamanaka, Shijyo Nagao, Katsuaki Suganuma)

Mechanical Testing and Fracture Analyses of Miniaturized ZnO-based Multilayer Components
Katerina Macurova, Montanuniversitaet Leoben (M. Gruber, M. Pletz, P. Supancic, R. Danzer, F. Aldrian, R. Bermejo)

2:15 PM - 2:40 PM

Interposers: A Central Generic Technology for IoT
Andre Rouzaud, CEA-Leti (Gabriel Pares)

High Density Interposer - Challenges and Opportunities
Mathias Boettcher, Fraunhofer IZM-ASSID

BCB-Based Dry Film Low K Permanent Polymer with Sub 4-µm Vias for Advanced WLP and FO-WLP Applications
Michael Toepper, Fraunhofer IZM (Tanja Braun, Karin Hauck, Robert Gernhardt, Stefan Raatz, Karl-Friedrich Becker, Martin Wilke, Piotr Mackowiak, Klaus-Dieter Lang, Fraunhofer IZM; Corey O'Connor, Tina Aoude, Bob Barr, The Dow Chemical Company)

Improved Properties and Reduced Metal Content Conductive Powders for High Temperature Sensor Applications
Richard Stephenson, Silicon Valley Materials Technology Corp. (Howard Imhof)

Evaluation About Solder-IMC Crack of Fine Pitch BGA Package
Taeho Kang, Samsung Electronics (Ara Lee, Jaewoo Jeong, Dongok Kwak)

I/O Printed Circuit Board Assemblies; Recent Learning in Mechanical Stress Analysis, Verification Testing, and Post-test Analysis Techniques and Results
John Torok, IBM Corporation

2:45 PM - 3:10 PM

A TXV-less Packaging Platform for the Era of IoTs
Dyi-Chung Hu, SiPlus

Design Challenges in Interposer based 3-D Memory Logic Interface
Andy Heinig, Fraunhofer EAS/IIS (Muhammad Waqas Chaudhary, Robert Fischbach, Michael Dittrich)

Challenges Facing Electrochemical Deposition in Wafer Level Packaging
Thomas Richardson, Enthone (John Commander, Stephan Braye, Michelle Houle, Emile Kuo, Wenbo Saho, Eric Gongora)

Current Developments in Precious Metal Plating for the Semi - Conductor/Micro - Electronics Markets
Steven Burling, Metalor Technologies (UK) Ltd (Gary Nicholls, Metalor Technologies, USA; Stewart Hemsley, Metalor Technologies Singapore; Kazuhiko Shiokawa, Metalor Coatings, Japan)

Finite Element Analysis of Lidded Flip-Chip Packages: A Study on the Impact of Thermal Interface Material Compressibility and Stress-free Conditions on Modeling Predictions
Tuhin Sinha, IBM

Moldflow Simulation Study of an Exposed Pad Leaded Package
Vibhash Jha, Freescale Semiconductor (Hauck Torsten)

3:15 PM - 4:15 PM: Dessert "Happy Hour" in the Exhibit Hall

IMAPS Cafés sponsored by Palomar:

Palomar Technologies:  Dessert Station Sponsor

4:15 PM - 4:40 PM

Smart PCB for Smart Appliances - Embedding as IoT Enabler
Nick Renaud-Bezot, AT&S AG (Christian Galler, Christian Vockenberger)

Towards 200mm 3D RF Interposer Technology
Philippe Soussan, IMEC (Kristof Vaesen, Bart Vereecke, Jian Zhu)

Development of the Thin Package Using the Glass Carrier Substrate
Jun Onohara, Toppan Printing Co.,Ltd (T. Fujita, Y. Akutagawa)

Formulation Development for Bosch Etch Residue Removal: Effect of Solvent on Removal Efficiency
Richard Peters, Dynaloy (Kimberly Pollard, Yuanmei Cao, Donald Pfettscher, Michael Phenis)

 

 

4:45 PM - 5:10 PM

System on Film Type Substrates: Processes, Structure and Real Modules
Chih-Kuang Yang, Princo Corp.

Tunable High-Q TSV Inductor Packaging with MEMS
Bruce Kim, CCNY (Saikat Mondal, Sang-Bock Cho)

Wafer Level 3D System Integration Using a Novel 3D-RDL Technology
Ayad GHANNAM, 3DiS Technologies (Alessandro MAGNANI, David BOURRIER, Thierry PARRA)

Optimal SMT Electronics Assembly Guidelines for Stencil Printing
Ed Briggs, Indium Corporation

 

 

 

5:15 PM - 7:30 PM: Yole Développement and IMAPS Market Briefing & Q/A Panel on:
Enabling Advanced Packaging Technologies for the Connected World

(All Attendees Invited - Appetizers & Beverages provided)
YOLE
IMAPS and Yole announce the "Enabling Advanced Packaging Technologies for the Connected World" Technology and Market Briefing. Both partners, strongly involved in this area, propose a dedicated session focused on the latest developments in Advanced Packaging. Industry leaders, experts in this market, will join Yole analysts in addressing current needs and challenges that will have to be addressed in order to enable connectivity, the latest technology advancements and market trends. This briefing will provide a great mix of technology and business perspective, market analysis combined with networking sessions. Please join Yole, IMAPS organization and their guests, for an exciting session with interactive presentations on the latest innovations and industry trends.

YOLE Seminar

 



 

WEDNESDAY, OCTOBER 28

7:00 AM - 5:30 PM: Registration Open
11:00 AM - 6:30 PM: Exhibit Hall Open

8:00 AM - 8:15 AM: Welcome/Announcements & Keynote Introductions (Plenary Session)

8:15 AM - 9:00 AM: Keynote 1
Franz Schrank, Group Manager of 3D and Wafer Level Integration, ams AG

Sensor Integration Technologies for Internet of Things
Internet of things (IoT) will influence all areas from consumer to health care to building and home automation and to observation. IoT enables direct communication between objects via internet. The main functional blocks of IoT devices are sensing, data transmitting, processing and analysis and subsequent actuation. As a result such a system will consist of sensors, actuators, wireless connection, data processing, power management, energy harvesting, memory and software. A total market volume of almost 400 Bio US$ is predicted for 2024 whereof about 12Bio US$ are expected for IoT sensors (Yole2014)). The main challenges are to reduce footprint (e.g. wearables, swarm), reduce costs of system, improve reliability and provide better performance. For example the costs of today's smart sensor systems are in the 100-1000US$ range and for 2024 an ASP in the 1US$ $ level is expected (Yole2014). To enable this, a high level of integration is needed for the next generations of IoT sensors. This will on one hand reduce costs and form factor but also enable multi sensors devices.

More than Moore integration of functions offers the potential to meet both performance and cost targets for mass-market adoption. In addition to SoC (System on Chip) and SiP (System in Package) heterogeneous 3D integrations will be key enablers. 3D integration with the main technology bricks like TSV (Through Silicon Via), RDL (Redistribution Layer), D2W (Die to Wafer) and W2W (Wafer to Wafer) stacking and embedding allows to combine different technologies - different CMOS notes, MEMS, photonics, etc. At the same time expensive single die packaging can be avoided.

The presentation will focus on reviewing 3D integration technologies and their potential for IoT from the perspective of a sensor solution provider.

Franz Schrank 'Group Manager of 3D and Wafer Level Integration' joined ams in 2001. He is responsible for process R&D comprising 3D integration with the modules TSV, RDL, W2W and D2W stacking as well as CMOS post processing and MEMS. Franz has more than 20 years of experience in the industry with previous positions held at Siemens and Philips. Franz received the Dipl.-Ing. degree in physics and the M.A.S. degree in Nanoelectronics and Nanoanalytics at the University of Technology in Graz, Styria, Austria. He currently owns 24 patents in the field of 3D technology, MEMS and opto.

 

9:00 AM - 9:45 AM: Keynote 2
Bill Bottoms, Chairman, 3MTS and Chair of ITRS Packaging Roadmap Working Group


Maintaining the Pace of Progress as we Approach the end of Moore's Law:
Heterogeneous Integration, New Materials, New Processes, New Architectures

The environment is rapidly changing as we approach the end of Moore's Law scaling. Scaling continues but benefits in performance, power and cost are reduced. At the same time drivers for the electronics industry are impacted by the emerging Internet of Things and Migration to the Cloud.  Satisfying these requirements of these emerging drivers cannot be accomplished with the current technology. It will require innovative heterogeneous integration approaches to satisfy demands for power, latency, bandwidth, reliability and cost in an environment where transistors will wear out.

Overcoming the limitations of the current technology will require heterogeneous integration using different materials, different device types (logic, memory, sensors, RF, analog, etc.) and different components incorporating multiple technologies including electronics, photonics, and MEMS in new, 3D, system-in-package (SiP) architectures. New materials, manufacturing equipment and processes will be required to accomplish this and meet the market demand for continuous reduction in cost per function. The requirements, difficult challenges and potential solutions will be discussed.

Dr. Wilmer R. Bottoms received a B.S. degree in Physics from Huntington College in Montgomery, Alabama in 1965 and a Ph.D in Solid State from Tulane University in New Orleans in 1969 and is currently Chairman of Third Millennium Test Solutions. He has worked as a faculty member in the department of electrical engineering at Princeton University, manager of Research and Development at Varian Associates, founding President of the Semiconductor Equipment Group of Varian Associates and general Partner of Patricof & Co. Ventures.

Dr. Bottoms has participated in the start up and growth of many companies through his venture capital activity and through his own work as an entrepreneur. These include companies in a wide range of industries.
He has also served on government committees including the Board on Assessment for the National Institute for Standards and Technology and the Technical Advisory Committee to the US Export Control Commission.

Dr. Bottoms currently serves as:

  • Emeritus Member of the Board of Tulane University
  • Chairman of the Technical Working Group for Assembly and Packaging for the International Technology Roadmap for Semiconductors
  • Chairman of the Technical Working Group for Packaging and Component Substrates for the International Electronics Manufacturing Institute
  • Chairman of the Semiconductor Equipment and Materials International's SEMI Awards Committee
  • Chairman of APMT
  • Chairman of Third Millennium Test Solutions

9:45 AM - 10:00 AM: Coffee Break in Foyer

 

 

MORNING SESSION SCHEDULE

PACKAGING THE INTERNET OF THINGS & OTHER ADVANCED APPLICATIONS

INTERPOSERS & 2.5/3D PACKAGING

ADVANCED PACKAGING & ENABLING TECHNOLOGIES

ADVANCED MATERIALS & PROCESSES

RELIABILITY

DESIGN, MODELING & TEST

Wednesday, October 28, 2015

10:00 AM - 11:55 AM

Additive Manufacturing & Printed Electronics
Chairs: John Bolger, Department of Defense; Mike Newton, Newton Cyberfacturing

Additive Manufacturing and Printed Electronics are rapidly emerging technologies which promise to revolutionize the marketplace with low cost, ubiquitous, and/or easily customizable electronic objects. The papers in this session cover a breadth of techniques currently being developed to realize the potential of these technologies, including the combination of the two techniques into printed structural electronics.

3D Solutions for Specific Applications
Chairs: Maria Durham, Indium; Matt Apanius, SMART Microsystems

3D packaging is an enabling technology for the IoT. This session presents several applications that require a specific packaging solution. The presented topics are individual examples of how software, architecture, performance, and process can affect the outcome. An ideal 3D solution would address all of these parameters simultaneously.

Fan-Out Wafer Level Packaging
Chairs: Ron Jensen, Honeywell; Susie Johansson, Starkey Hearing Technologies

FOWLP is an augmentation of the of the standard WLP packaging technology. Recently, FOWLP technologies are gaining market share and becoming more important than ever in WLP landscape. This is mainly due to two reasons, lower cost and better reliability compared to WLP products. Side wall crack has been a major reliability issue for WLP products and FOWLP fills that gap by providing 4 sides (4S) or 5 sides (5S) protection; 4s is called exposed FOWLP and 5S is called embedded FOWLP. This track explores current and future market trends, potential for new market segments such as IoT and ongoing developments.

Ceramic & Thick Film Technologies
Chairs: Ken Peterson, Sandia National Labs; Samson Shahbazi, Heraeus

The use of Ceramic and Thick film technology allows the manufactures to produce electronic devices such as surface mount devices, hybrid circuits and sensors for different industries which includes: Automotive, consumer, and medical application. The topics in this session address the use of ceramic and the Thick Film Technology for these applications.

Wire Bonding Reliability
Chairs: Bob Chylak, Kulicke & Soffa Industries; Lee Levine, Process Solutions Consulting

Achieving the high yields and reliability that wire bonds are noted for requires attention to detail and constant study of the process. As we transition away from gold wire to less expensive alternatives we cannot allow lower requirements. This session will focus on accelerated testing of alternative wire bonding wires.

Modeling for Signal/Power Integrity
Chair: Ivan Ndip, Fraunhofer IZM

Description Soon

10:00 AM - 10:25 AM

High Tolerance, Micron Scale, Inline Embedded Resistors using Thin Film Additive Manufacturing
Scott Lauer, Advantech US

Viewing Context Adaptive On-Chip Video Memory
Dongliang Chen, North Dakota State University (Xin Wang, Jinhui Wang, Na Gong)

Embedded Solutions: Fan-out and Embedded Die Packages Market and Technology Trends
Jerome Azemar, Yole Developpement (Andrej Ivankovic)

Sol-gel Doped-PZT Thin Films for Integrated Tunable Capacitors
Warda Benhadjala, CEA LETI (Gwenael Le Rhun, Christel Dieppedale, Florence Sonnerat, Jennifer Guillaume, Clémence Bonnard, Philippe Renaux, Henri Sibuet, Christophe Billard, Pascal Gardes, Patrick Poveda)

Corrosion Reliability of Copper Wirebond (CuWB) Packages - Impact of Voltage and Corrosive Ions from Packaging Materials
Varughese Mathew, Freescale Semiconductor (Sheila Chopin)

Enhanced Mpilog Macromodels for Signal and Power Integrity Simulations
Gianni Signorini, Intel Mobile Communications (C. Siviero, I. S. Stievano, S. Grivet-Talocia, Politecnico di Torino)

10:30 AM - 10:55 AM

Engineered Nanocomposites for Additive Manufacturing of Microwave Electronics
Juan Castro, University of South Florida (Thomas Weller, Jing Wang)

A New Package for High Speed and High Density eStorage Using the Frequency Boosting Chip
Geuk Chan Kim, Samsung

FOWLP Technology eWLB - Enabler for Packaging of IoT/IoE Modules
Steffen Kröhnert, NANIUM S.A. (José Campos, Paula Gomes, Eoin O'Toole)

Ceramic Decals - Pre-adjusted Thick Film Sensors for Variable Surfaces
Thomas Seuthe, Fraunhofer IKTS (Markus Eberstein, Fraunhofer IKTS; Rolf Petersen, Hans-Jürgen Amann, H.J. Amann GmbH)

Reliability Performance of Palladium Coated Copper Wire in High Temperature Bake at Extreme Durations
Tu Anh Tran, Freescale Semiconductor Inc. (Chu-Chung "Stephen" Lee, Varughese Mathew)

Simulation Methodology and Design Flow for Decoupling Optimization in Case of Design Reusing
Benoit Goral, Laboratoire SATIE

11:00 AM - 11:25 AM

Additive Manufacturing Design and Fabrication of Ceramic Cylindrical Ion Trap Mass Analyzer chips for Miniaturized Mass Spectrometer Smart-Devices
Patrick Roman, Florida International University (Xudong "Donny" Chen, W. Kinzy Jones, Ali Karbasi, C. Mike Newton, Shekhar Bhansali)

High Voltage Stacked Diode Package
Lauren Boteler, Army Research Laboratory (Miguel Hinojosa, Damian Urciuoli, Alexandra Rodriguez)

Chip Last Fanout as an Alternative to Chip First
Scott Chen, ASE Group (Simon Wang, Coltrane Lee, Adren Hsieh, John Hunt)

Shrinkage Controlled Pastes for Bulky Silver and Copper Thick Films in Power Electronics
Richard Schmidt, Fraunhofer IKTS (Kathrin Reinhardt, Thomas Seuthe, Olga Schwab, Claudia Feller, Markus Eberstein)

Thermal Aging Behavior of Fine Pitch Palladium Coated Silver (PCS) Ball Bonds on Al Metallization
Di Erick Xu, Microjoining Laboratory, Center for Advanced Materials Joining, University of Waterloo (Jimy Gomes, Michael Mayer, Rob Lyn, John Persic)

Line Coding Methods for High Speed Serial Links
Abdelaziz Goulahsen, STMicroelectronics (Julien Saadé, Frédéric Pétrot, Université Grenoble-Alpes)

11:30 AM - 11:55 AM

Aerosol Jet® Enabled 3D Antenna and Sensors for IoT Applications
Michael O’Reilly, Optomec, Inc. (Michael Renn, David Sessoms)

Bonding Technologies for 3D Integration
Sascha Lohse, Finetech GmbH

Advanced Manufacturing Technology for Fan-Out Wafer Level Packaging
Doug Shelton, Canon USA

A Case Study of Ultra-Leach Resistant Thick Film Conductors for Non-Magnetic Applications
John J.B. Silvia, III, International Manufacturing Services (IMS)

Copper Wire Bonding UPDATE
Lee Levine, Process Solutions Consulting

Emerging Requirements for Ultrahigh Speed Digital and mm Wave Dielectric Materials
Tarun Amla, Isola Group

12:00 PM - 12:25 PM

Digital Manufacturing For Electrically Functional Satlet Structures
Paul Deffenbaugh, Sciperio, Inc. (Kenneth Church; Mike Newton, Newton Cyberfacturing)

 

 

Characterization of a New and Complete Lead-Free Thick Film Resistor System for the Hybrid Circuit Market
Michael Skurski, DuPont Microcircuit Materials (Marc LaBranche)

   

 

12:00 PM - 1:30 PM: Networking & Lunch in Exhibit Hall
(EXHIBITS OPEN 11am)

 

Wednesday - GBC Lunch Meeting:
12:00 PM - 1:30 PM: 

GLOBAL BUSINESS COUNCIL (GBC) Keynote Luncheon & Market Forum on:
System in Package & Ultra-miniaturization

Limited Seating - 100 Seats Available
(registration tickets under SESSIONS during online registration
- email blamm@imaps.org with questions)

12:00 PM: Lunch Begins

12:15 PM: Welcome, GBC Objectives and Agenda Review - Lee Smith, (UTAC) United Test & Assembly Center

12:30 PM - 1:00 PM:
SiP: Bringing Ideas to High Volume Reality
The semiconductor industry has entered a phase of accelerating integration, on both the corporate and product fronts. Companies must provide integrated solutions to end electronic markets to maintain their business channels and revenue growth. System-in-Package (SiP) provides an avenue for product designers to increase functionality while reducing form factor, which are absolute requirements for a vast number of applications particularly in the mobile product space. This presentation will cover the industry landscape, and highlight the key packaging technologies to be deployed in coming years to enable semiconductor and electronic companies meet evolving market needs.

GBC - Rich Rice

Rich Rice, Sr. VP Sales, ASE (US) Inc.
Rich Rice currently serves as Senior Vice President of Business Development for ASE (U.S.) Inc., with responsibilities within the North America region, where he leads ASE’s technology promotion on SiP, inclusive of all key semiconductor assembly technologies. Appointed in 2003, Mr. Rice has held positions within ASE to oversee sales and applications engineering support.

In his 30 years in the semiconductor industry, he has held various engineering and business development positions at Amkor Technology and National Semiconductor Corporation. Mr. Rice actively serves in advisory roles for the iMAPS Executive Council and Global Business Council, MEPTEC, and the IC packaging advisory board for SEMI. He holds a BS degree in Agricultural Engineering from the University of Illinois.

 

1:00 PM - 1:30 PM:
SiP Drivers and Challenges: Supply Chain Outlook and Requirements
Cost pressures are driving the semiconductor industry to look for solutions that meet the challenge of expensive next generation silicon node fabrication. Simply integrating all functions in a single die may no longer be the most economical option. In addition, the need for close proximity of die and components has driven the development of packages that provide both the price and performance needs. System-in-Package (SiP) is gaining popularity as one of the most promising integration solutions. SiP is a functional system or subsystem assembled into a single package. It may contain two or more dissimilar die, typically combined with other components such as passives, filters, antennas, and/or mechanical parts. The components are mounted together on a substrate to create a customized, highly integrated product for a given application. SiPs may utilize a combination of wire bond, flip chip, wafer level packages, pre-packaged ICs such as CSPs, stacked packages, and/or stacked die. This presentation examines the role of system-in-package (SiP) discussing the formats most likely to emerge as volume packages and the supply chain requirements to produce these packages. The roles of OSATs and EMS companies are discussed with a discussion on the advantages and challenges of each.

GBC - Linda Bal Linda Bal, Senior Analyst, TechSearch International
Linda Bal is a senior analyst with TechSearch International, which has provided analysis on technology and market trends in semiconductor packaging since 1987. She has more than 25 years experience in the design, test, and manufacturing of electronic packaging for semiconductors and systems from positions with Freescale, Motorola, Microelectronics and Computer Technology Corportation (MCC) and Eastman Kodak authoring/co-authoring numerous publications. She is a member of IEEE, JEDEC, and IMAPS. A member of the IMAPS technical committee since 2007, her contributions include chairing the FC/WLP Track for the DPC in 2013 and 2014, co-chairing the FC track in 2009 & 2010, and moderating Technical Panel Discussions in 2011 and 2012. Linda received her BSEE degree from Purdue University in 1985.

1:30 PM
Closing Comments - Lee Smith, Chair

 

 

AFTERNOON SESSION SCHEDULE

PACKAGING THE INTERNET OF THINGS & OTHER ADVANCED APPLICATIONS

INTERPOSERS & 2.5/3D PACKAGING

ADVANCED PACKAGING & ENABLING TECHNOLOGIES

ADVANCED MATERIALS & PROCESSES

RELIABILITY

DESIGN, MODELING & TEST

Wednesday, October 28, 2015

1:30 PM - 5:25 PM

High Power / High Temperature
Chairs: Jeffrey Hartman, Northrop Grumman, Douglas Hopkins, PREES North Carolina State University

This session is all about Power. Presented are novel substrate enhancements such as thick printed Cu, diamond spreaders and pressure-less attachment sintering, along with application performance of packaged GaN and SiC devices. Attendees may want to also see Thursday's Session on Die Attachment.

Glass Interposers & Technologies
Chairs: Tim Mobley, Triton Micro Tech; Aric Shorey, Corning

There is continued interest and progress in utilizing glass in a variety of packaging applications. In this session we will have presentations discussing materials, via formation, metallization process capability and developments as well as device performance.

Wire Bonding
Chairs: Dan Evans, Palomar Technologies; Lee Levine, Process Solutions Consulting

Copper wire refinements and alternatives.

Solder/Pb-Free
Chairs: Ramesh Varma, Northrop Grumman ES; John Bolger, Department of Defense

The reliability characterization of solder interconnects continues to be of great interest, especially for alternatives to traditional lead based solders. This session showcases a variety of novel lead-free alternatives as the industry continues to explore this fascinating topic.

Equipment and Characterization Techniques for 3D
Chairs: Matt Nowak, Qualcomm; John Mazurowski, Penn State Electro-Optics Center

The complexity of integration that comes with 3D is leading to more creative ways to manage tolerances and to diagnose causes for defects. Presentations in this session cite optical, magnetic, and acoustic methods for measurements, processing, and diagnostics.

Thermo-Mechanical Modeling & Design
Chairs: John Torok, IBM Corporation; Woong-Sun Lee, SK Hynix

This session provides insight regarding the latest thermal and mechanical modeling techniques and assessments associated with a variety of electronic packaging applications. The applications to be discussed vary from the semiconductor packaging structure to substrate design and process include both traditional as well as multi-physics modeling techniques.

1:30 PM - 1:55 PM

A Gallium Nitride-Based Power Module for Totem-Pole Bridgeless Power Factor Correction Rectifier
Wenli Zhang, Center for Power Electronics Systems (CPES) / Virginia Tech (Zhengyang Liu, Xiucheng Huang, Fred Lee, Shuojie She, Qiang Li)

A Metal Oxide Adhesion Layer Prepared with Water Based Coating Solution for Wet Cu Metallization of Glass Interposer
Zhiming Liu, Sara Hunegnaw, Hailuo Fu, Jun Wang, Tafadzwa Magaya (Atotech USA Inc.), Michael Merschky, Tobias Bernhard (Atotech Deutschland), Aric Shorey (Corning Inc.; Hobie Yun, Qualcomm Technologies Inc.)

Critical Barriers Associated with Copper Wire
William Crockett Jr, Tanaka

High Reliability No-Clean Solder Paste for Designs where Flux Cannot be Dried
Ning-Cheng Lee, Indium Corporation (Fen Chen)

Failure Analysis Work Flow for Electrical Shorts in Triple Stacked 3D TSV Daisy Chains
Jan Gaudestad, Neocera (A. Orozco, Neocera; I. De Wolf, T. Wang, T. Webers, IMEC; R. Kelley, T. Morrison, S. Madala, FEI)

Predicting Package Level Failure Modes in Multi Layered Packages
Gil Sharon, DfR Solutions (Greg Caswell, Nathan Blattau, Craig Hillman)

2:00 PM - 2:25 PM

Thick Print Copper on Ceramic for High Reliability Electronics
Ryan Persons, Heraeus Technologies (Paul Gundel, Melanie Bawohl, Mark Challingsworth, Michael Choisi, Virginia Garcia, Matthias Gaul, Knuth Kersken, Christina Modes, Ilias Nikolaidis, Jessica Reitz; Caitlin Shahbazi)

Leveraging Glass Properties for Advanced Packaging
Aric Shorey, Corning Incorporated (Rachel Lu, Gene Smith)

Copper Wire Bonding Ready for Industrial Mass Production
Michael Brökelmann, Hesse GmbH (Dirk Siepe, Matthias Hunstig, Hesse GmbH; Mike McKeown, Kristian Oftebro, Hesse Mechatronics)

Improvement of High Power Cycling Reliability having a Sn-Cu Based Solder
Miyazaki Takaaki, Hitachi, Ltd. Research and Development Group Center for Technology Innovation-Production Engineering (Ikeda Osamu)

Multi Beam Full Cut Dicing of Thin Si Wafers
Jeroen Van Borkulo, ASM Pacific Technologies (Richard van der Stam, Paul Verburg, Won Chul Jung)

TCT Reliability of Organic Passivation Layer for WLCSP
Mitsuru Fujita, Asahi Kasei E-Materials Corp.

2:30 PM - 2:55 PM

Optimizing Diamond Heat Spreaders for Thermal Management of Hotspots for GaN Devices
Thomas Obeloer, Element Six Technologies US Corp. (Yong Han, Boon Long Lau, Gongyue Tang, Xiaowu Zhang, Bruce Bolliger)

Hermetically Sealed Glass Packages
Roupen Keusseyan, Triton Microtechnologies (Tim Mobley)

Advances in Wire Bonding Technology for Different Bonding Wire Material
Ivy Qin, Kulicke and Soffa (Aashish Shah, Hui Xu, Bob Chylak, Nelson Wong)

Microstructure of Transient Liquid Phase Sintering Joint by Sn-Coated Cu Particles for High Temperature Packaging
Xiangdong Liu, Osaka University

Control of 3D IC Process Steps by Optical Metrologies
Gilles Fresquet, FOGALE Nanotech (D. Le Cunff, STMicroelectronics; Thierry Raymond, Qualtera; JP. Piel, FOGALE Nanotech)

RF and Microwave Power Amplifiers Assembly - Interaction Between Materials, Design and Process on Reliability
Tennyson Nguty, NXP Semiconductors (Tyrone Plata, Henk Thoonen)

3:00 PM - 3:30 PM: Break in the Exhibit Hall

3:30 PM - 3:55 PM

Pressure-less AgNP Sintering for High-power MCM Assembly for Extreme Environment Applications
Zhenzhen Shen, Baker Huhges (Aleksey Reiderman, Casey Anude)

Design and Demonstration of 40 micron Bump Pitch Multi-layer RDL on Panel-based Glass Interposers
Brett Sawyer, 3D Systems Packaging Research Center Georgia Institute of Technology (Venky Sundaram, Rao Tummala)

Wedge Bond Process Optimization Method for 1.5 mil Al Wire on Al Bond Pad
Wenjuan Qi, Palomar Technologies (Daniel D. Evans, Jr.)

I. Transient Liquid Phase Sintering Pastes as Solder Alternatives in High Temperature Applications
Catherine Shearer, Ormet Circuits, Inc. (Ken Holcomb)

A New In-line Laser-based Acoustic Technique for Pillar Bump Metrology
Michael Kotelyanskii, Rudolph Technologies (Todd Murray, Andrew Bakir, David Stobbe, University of Colorado, Boulder; Robin Mair, Manjusha Mehendale, Xueping Ru, Jonathan Cohen, Priya Mukundhan, Timothy Kryman, Rudolph Technologies; Michelle Schulberg, TEL NEXX)

Thermal Management Solutions for Digital Flight Data Acquisition Unit Used in Avionics Applications
Vicentiu Grosu, Teledyne Controls (Chris Lindgren, Tamas Vejsz)

4:00 PM - 4:25 PM

High Thermal Stability of SiC Packaging with Sintered Ag Paste Die-attach Combined with Imide-based Molding
Shijo Nagao, Institute of Scientific and Industrial Research, Osaka University (Takuo Sugioka, Satoshi Ogawa, Teruhisa Fujibayashi, Zhang Hao, Katsuaki Suganuma)

Through Glass Via (TGV) Technology for RF Applications
Aric Shorey, Corning Incorporated (C.H. Yun, Qualcomm Technologies, Inc; S. Kuramochi, Dai Nippon Printing Co. Ltd.)

Real-Time Observation of Interface Relative Motion during Ultrasonic Wedge-Wedge Bonding Process
Yangyang Long, Leibniz University of Hanover (Jens Twiefel, Joscha Roth, Jörg Wallaschek)

Application of Transient Liquid Phase Sintering (TLPS) Interconnect Material for High Temperature Pb-free RoHS Compliant MLCC Lead Attachment
John McConnell, KEMET Electronics (J. Bultitude, J. Qazi, J. Magee, G. Renner, C. Shearer, K. Holcomb)

Improving Mean Time to Develop Micro-Bump/Pillar Fabrication Process for Vertical Interconnections by Combined Defectivity and Metrology Approach
Nicolas Devanciard, CEA (Franck Bana, Nicolas Bresson, Stephane Rey, Carlos Beitia, Dario Alliata, Darcy Hart, Justin Miller)

Multiphysics Modeling of Underfill Flow and Cure during Thermocompression Bonding
Mark Oliver , Veryst Engineering (Nagi Elabbasi)

4:30 PM - 4:55 PM

A High Performance Power Package for Wide Bandgap Semiconductors Using Novel Wire Bondless Power Interconnections
Jennifer Stabach, Wolfspeed, A Cree Company (Zach Cole, Chad B. O’Neal, Brice McPherson, Robert Shaw, Brandon Passmore)

The Glass Core with an Anti-crack Propagation Structure
Sukhyeon Cho, Samsung Electro-Mechanics (Yongho Baek, Yoong Oh, Chilwoo Kwon, Hyungki Lee)

Improving Stitch Bond on Hybrid Thick Film Substrate Using a SOS-Stand Off Stitch Wire Bonding
Richard Garcia, Crane Aerospace and Electronics

Large Scale Photodesmear for Via Residue Cleaning in High Density Interconnect Substrates
Tomoyuki Habu, USHIO INC.

 

Thermally Conductive Plastics for Enhanced Thermal Management
Chandrashekar Raman, Momentive Performance Materials (Peter Schmidt Sane)

5:00 PM - 5:25 PM

A Robust, Composite Packaging Approach for a High Voltage 6.5kV IGBT and Series Diode
Adam Morgan, NCSU - FREEDM (Ankan De, Subhashish Bhattacharya, Douglas Hopkins)

 

Understanding the Role of Ultrasonic Welding in Wire Bonding
Lee Levine, Process Solutions Consulting

 

 

 

 

5:00 PM - 6:30 PM: Exhibit Hall Reception

 

THURSDAY, OCTOBER 29

7:00 AM - 3:00 PM: Registration Open

 

MORNING SESSION SCHEDULE

PACKAGING THE INTERNET OF THINGS & OTHER ADVANCED APPLICATIONS

INTERPOSERS & 2.5/3D PACKAGING

ADVANCED PACKAGING & ENABLING TECHNOLOGIES

ADVANCED MATERIALS & PROCESSES

RELIABILITY

DESIGN, MODELING & TEST

Thursday, October 29, 2015

8:00 AM - 11:10 AM

Medical Applications
Chairs: Susan Bagen, Micro Systems Technologies; Andre Rouzaud, CEA-Leti

Description Soon

3D Integration Materials and Processes
Chairs: Urmi Ray, Qualcomm; Doug Shelton, Canon USA

This session covers manufacturing/process technologies related to fine-line patterning, temporary bonding and C2W/W2W bonding that are essential to enabling various 2.5D and 3D package solutions.

Photonics / Optoelectronics
Chairs: John Mazurowski, Penn State Electro-Optics Center; Gabriel Pares, CEA Leti

Packaging is and will be a key element for photonics, and will continue as integration further assembles multiple functions. Today's photonic applications are expanding very fast, particularly in the fields of lighting, optical communication, and silicon photonics. In each of these domains, specific packaging solutions need to be developed and industrialized. We rely on the most advanced processes and technologies. This session will present some of the most recent achievements in this field.

Polymers, Underfill, Encapsulants, and Adhesives
Chairs: Lyndon Larson, Dow Corning; Jeff Gotro, Innocentrix; Karl-Friedrich Becker, Fraunhofer IZM

This session introduces innovative polymeric solutions to a variety of uses such as die attach, encapsulant, phase-change, LCP, and even organic substrate applications.

Failure Analysis and Qualification
Chairs: Ben Decker, Northrop Grumman; Aicha Elshabini, University of Idaho

This session covers the failure analysis and qualification for packaging and devices. It encompasses topics from die attach, solder and solderability, leak tests, device qualification, as well as failure analysis of more complex semiconductors.

Cost and Predictive Reliability
Chairs: Rajiv Roy, Rudolph Technologies; Stephen Gurkovich, Northrop Grumman

Description Soon

8:00 AM - 8:25 AM

Isolation Resistance of Encapsulated Electrical Conductors and Terminations for Biomedical Applications
Thomas Marinis, Draper Laboratory (Joseph Soucy)

Temporary Bonding and Debonding Technologies to Enable Innovative Fan Out Embedded Interposer for High-Density Applications
Alvin Lee, Brewer Science, Inc. (Jay Su, Baron Huang, Xiao Liu, Brewer Science, Inc.; Yin-Po Hung, Unimicron Corp.; Yu-Min Lin and Tao-Chih Chang, Industrial Technology Research Institute)

Hermetic Package for Optical Devices Using Room Temperature Welding Technology and Transparent Lid, for Space Applications
Liam Murphy, Components Technology Section, ESTEC, European Space Agency (Heidi Lundén, Liam Murphy, Antti Määttänen, Tero Kumpulainen, Primoceler Oy)

Challenge to Zero CTE and Lower Shrinkage Organic Substrate Material for Thin CSP Package
Shintaro Hashimoto, Hitachi Chemical Co., Ltd.

Solder Paste Residue Corrosivity Assesment: Bono Test
Gilbert Roberge, Inventec Performance Chemicals (Emmanuelle Guene, Anne Marie Laugt, Celine Puechagut, Richard Anisko)

Technique to Predict Reliability Failures in Side-Gate Transfer Molded Packages
Nishant Lakhera, Freescale Semiconductor Inc (Tom Battle, Sheila Chopin, James Guajardo, Sandeep Shantaram, Akhilesh Singh)

8:30 AM - 8:55 AM

Embedded Passives on Low Profile Silicon Substrate Technology for Medical Implants, Wearables and Internet of Things
Sebastien Leruez, IPDiA (Catherine Bunel, Franck Murray)

Advanced Chemical Processes for Semi-additive PWB fabrication for Fine Line Formation Targeting Line and Space=5µm/5µm
Satoshi Kawashima, Meltex Inc. (Kazutaka Tajima)

Modeling, Design, Fabrication, and Characterization of Ultra-high Bandwidth 3D Glass Photonic Substrates
Bruce Chou, Packaging Research Center at Georgia Tech (William Vis, Ryuta Furuya, Venky Sundaram, Rao Tummala)

Highly Conductive MWNT/Silicone Composite with Low Density MWNT Bundles Acquired from Advanced Catalyst Design
Yoonchul Sohn, Samsung Advanced Institute of Technology

Metal Salt Solution- anoprecipitation Method for Improvement in Reliability of Sintered Ag anoparticle Bonding
Daisuke Hiratsuka, Corporate Manufacturing Engineering Center, Toshiba Corp. (Masayuki Uchida, Tomohiro Iguchi)

Cost Analysis of Flip Chip Assembly Processes: Mass Reflow with Capillary Underfill and Thermocompression Bonding with Nonconductive Paste
Amy Palesko, SavanSys Solutions LLC

9:00 AM - 9:25 AM

Packaging Architecture for an Implanted System that Monitors Brain Activity and Applies Therapeutic Stimulation
Caroline Bjune, Charles Stark Draper Laboratory (Thomas Marinis)

A Novel Back-side Via Process for Low-cost TSV
Toshiyuki Sakuishi, ULVAC,Inc. (Takahide Murayama, Yasuhiro Morikawa)

Expanded Beam Fiber Optic Connectors Help Increase Optical Link Margin
John Mazurowski, Penn State Electro-Optics Center

The Future of Solder Joint Encapsulant
Wusheng Yin, YINCAE Advanced Materials, LLC

Analysis of 16 QFN Device I/O Pads for Solderability Failures
Rama Hegde, Freescale Semiconductor, Inc (Anne Anderson, Sam Subramanian, Andrew Mawer, V. K. Leong, A. Selvakumar)

A Curvature-Based Interpretation of the Steinberg Criterion for Fatigue Life of Electronic Components
Michael Beda, Ball Aerospace

9:25 AM - 9:45 AM: Break in the Foyer

9:45 AM - 10:10 AM

Two Step Silicon Microfluidics for Capillary Valve Applicationss
Bivragh Majeed, IMEC (Ahmed Taher, Ben Jones, Deniz Sabuncuoglu)

Substrate Temporary Bonding Supporting Post-Processing Applications
John Moore, Daetec, LLC (Jared Pettit, Alman Law, Alex Brewer)

High Data Rate Silicon Photonic - CMOS Electronic modules Using Copper Microbumps
Stephane Bernabe, CEA-Leti (G. Pares, B. Blampey, O. Castany, S. Menezo, K. Rida, S. Malhouitre, C. Kopp, K. Dieng, E. Temporiti)

Phase Change Material for Thermal Management in 3D Integrated Circuits Packaging
Mingli Li, North Dakota State University

Implication of Multiple Leak Tests and Impact of Rest Time on Avionic Hybrids
Maureen Perry, Northrop Grumman (Steve Smalley, Tom Trafford)

Reliability of Manganese Dioxide and Conductive Polymer Tantalum Capacitors under Temperature Humidity Bias Testing
Anto Peter CALCE, University of Maryland (Michael Azarian, Michael Pecht)

10:15 AM - 10:40 AM

Perspective on Required Packaging Technologies for Neuromorphic Devices
Yasumitsu Orii, IBM Research Tokyo

Development and Usability Study of Pre-Applied Inter Chip Fill for 3D-IC
Kan Takeshita, Mitsubishi Chemical Corporation (Makoto Ikemoto; Masaya Sugiyama; Hidehiro Yamamoto; Hideki Kiritani; Yasuhiro Kawase)

Heterogeneous Integration of a 300mm Silicon Photonics-CMOS Wafer Stack by Direct Oxide Bonding and Via-last 3D Interconnection
Colin McDonough, SUNY Polytechnic Institute (Doug La Tulipe, Dan Pascual, Paul Tariello, Anh Nguyen, Matt Smalley, Tuan Vo, Phung Nguyen, Gerald Leake, Michele Moresco, Vladimir Stojanovic, Michael Watts, Douglas Coolbaugh, Erman Timurdogan)

Low Temperature, Fast Sintering of Micro-Scale Silver Paste for Die Attach for 300C Applications
Fang Yu, Auburn University (R. Wayne Johnson, Tennessee Technological University; Michael Hamilton, Auburn University)

Failure Analyses of Modern Power Semiconductor Switching Devices
Nathan Valentine, University of Maryland, CALCE (Bhanu Sood, Diganta Das, Michael Pecht)

 

10:45 AM - 11:10 AM


Copper Oxide Direct Bonding of 200 mm CMOS Wafers: Morphological and Electrical Characterization
C. Cavaco, IMEC (L. Peng, K. Leersnijder, S. Guerrieri, D.S. Tezcan, H. Osman)

A High Throughput, Low Cost Assembly Approach for LED IMS Packages To Heat Sink Using Advanced Thermal Interface Materials
Swapan Bhattacharya, Engent, Inc. (Han Wu, Kelley Hodge, Fei Xie, Keck Pathammavong, Paul Houston, Daniel Baldwin)

Liquid Crystal Polymer (LCP) Substrates for Advanced RF Packaging
Susan Bagen, Micro Systems Technologies, Inc. (Brian Sinclair, Eckardt Bihler, Marc Hauer, Daniel Schulze)

 

 

 

 

11:15 AM - 1:00 PM: Posters & Pizza in the Foyer
Interactive Poster Session in the Foyer starting at 11:15 AM
(Pizza served from 12:00 PM - 1:00 PM)

Chair: Erica Folk, Northrop Grumman Corporation

Posters & Pizza Sponsored by:


Cleaning in Electronics: Understanding Today's Needs
Patrick Duchi, Inventec Performance Chemicals (Anne Marie Laugt, Gerard Abidh)

Pure Chemical Reduction of Tin Oxides to Metallic Tin by Atmospheric Plasma to Improve Interconnection Reflow of Pb-free Solders
Kang-Wook Lee, IBM Research (Katsuyuki Sakuma, Thomas Lombardi, Jason Rowland, David Lewison, Eric Schulte)

Packaging Tradeoff for SIP Integration Targeting High Speed PAM-4 Applications
Benoit Haentjens, VECTRAWAVE (G. Desruelles, G. Chretien, A. Leborgne, Y. Haentjens, Vectrawave ; J. Dupuy, F. Jorge, A. Konczykowska, III-V LAB; I. Beauvisage, R. Delleme, D. Martin, Egide; S. Bila, K. Frigui, S. Ngoho, University XLIM; B. Frigui, CISTEME; H. Mardoyan, Alcatel Lucent Bell Labs)

Reliability of Silver Wedge Bonding for Power Devices
Xing Wei, Waseda University (Zhou Yu, Xi Zhang, Wanmeng Xu, Tomonori Iizuka and Kohei Tatsumi)

Dual-frequency MEMS based Oscillator using a Single ZnO-on-SOI Resonator
Di Lan, University of South Florida (Yilu Ning, Jing Wang)

A Direct Digital Manufactured RFID System Applied to Teaching Antenna Theory to Pre-College Students
Eduardo A. Rojas-Nastrucci. University of South Florida ( Thomas Weller)

Large Scale Photodesmear for Via Residue Cleaning in High Density Interconnect substrates
Tomoyuki Habu, USHIO INC.

Ensuring Suitability of Cu Wire Bonded ICs for Automotive Applications
Greg Caswell, DfR Solutions (Jim McLeish,  Randy Schueller)

LIA Plasma Source and Plasma-enhanced Dual Rotatable Magnetron Sputtering Assisted with Inductively Coupled Plasma Using Low-inductance Antenna(LIA)
Tamotsu Odajima, SCREEN Finetech Solutions Co.,Ltd (Hirofumi Yoshino, Akinori EBE)

Enhancement of EMI shield effectiveness by Magnetic EMC and Conformal Plating
Hyung Yoon, LG Innotek (Soon-Young Hyun, Jung Eun Lee)

High Speed, High Density Separable Interconnect - 1000 Plus I/O Ultra-low Profile Interfaces
James Rathburn, HSIO Technologies

Thermal Aging Behavior of Fine Pitch Palladium Coated Silver (PCS) Ball Bonds on Al Metallization
Di Erick Xu, Microjoining Laboratory, Center for Advanced Materials Joining, University of Waterloo (Jimy Gomes, Michael Mayer, Rob Lyn, John Persic)

A High Performance Power Package for Wide Bandgap Semiconductors Using Novel Wire Bondless Power Interconnections
Jennifer Stabach, Wolfspeed, A Cree Company (Zach Cole, Chad B. O’Neal, Brice McPherson, Robert Shaw, Brandon Passmore)

Substrate Temporary Bonding Supporting Post-Processing Applications
John Moore, Daetec, LLC (Jared Pettit, Alman Law, Alex Brewer)

High Tolerance, Micron Scale, Inline Embedded Resistors using Thin Film Additive Manufacturing
Scott Lauer, Advantech US

Hermetic Package for Optical Devices Using Room Temperature Welding Technology and Transparent Lid, for Space Applications
Liam Murphy, Components Technology Section, ESTEC, European Space Agency (Heidi Lundén, Liam Murphy, Antti Määttänen, Tero Kumpulainen, Primoceler Oy)

Cost Analysis of Flip Chip Assembly Processes: Mass Reflow with Capillary Underfill and Thermocompression Bonding with Nonconductive Paste
Amy Palesko, SavanSys Solutions LLC

Flex-DIMM - A New High Density Module Form Factor
James Clayton, Microelectronics Assembly Technologies, Inc.

Viewing Context Adaptive On-Chip Video Memory
Dongliang Chen, North Dakota State University (Xin Wang, Jinhui Wang, Na Gong)

 

 

AFTERNOON SESSION SCHEDULE

PACKAGING THE INTERNET OF THINGS & OTHER ADVANCED APPLICATIONS

INTERPOSERS & 2.5/3D PACKAGING

ADVANCED PACKAGING & ENABLING TECHNOLOGIES

ADVANCED MATERIALS & PROCESSES

DESIGN, MODELING & TEST

INVITED PARTNER SESSION

Thursday, October 29, 2015

1:00 PM - 3:25 PM

Systems and High Level Applications
Chairs: Jeffrey Hartman, Northrop Grumman;

This session is focused on the applications and related processes for systems. Presentations topics include HI for Radar modules, integrated QFN modules, circuit combiners for mm wave, authentication markings, and types of solder preforms.

Bumping
Chairs: Martin Schneider-Ramelow, Fraunhofer IZM; Bill Boyce, SMART Microsystems

Bumping technology is a key enabler for wafer level packing especially in terms of increasing 2.5 and 3 D electronic packaging activities. Main focus of the bumping session is on materials, processes and technologies as well as design and integration changes and reliability aspects (electromigration, thermal stress analysis) associated with Cu pillars and lead-free solders and under bump metallization structures for C4 products.

Interconnect and Packaging Processes
Chairs: Chris Kapusta, GE Global Research; Susie Johansson, Starkey Hearing Technologies

As the number of components increase and IC pad pitches decrease, the package complexity increases and it becomes more challenging to assemble. This session explores novel processes and advanced developments in microelectronic packaging and interconnections.

Die Attach
Chairs: Douglas Hopkins, PREES North Carolina State University; Aicha Elshabini, University of Idaho

This session addresses several attach issues for Ag-Sintering and solder interfaces, along with identifying the consideration for jetting One-Step attach. This session provides a good balance between power and signal applications.

2.5D/3D Enabling Technologies and Testing
Chairs: Benson Chan, Exsys Technology, Inc.; Jim Will, Honeywell FM&T

Description Soon

SPECIAL SESSION from iCAMR: Novel Packaging Materials and Processes for Harsh Environment Performing Solid State Devices
Chairs: Andrew Rudack, International Consortium for Advanced Manufacturing Research - ICAMR;

This packaging/sensor session will focus on harsh environments, including exposure of electronic components, devices and sensors to high temperature (> 350C), high pressure, radiation, high acid (< 3pH)/basic (> 8pH) materials, noise (white and other noise/vibrations) and/or biofouling. This session includes key applications and their performance requirements that drive the need for novel materials and processing.

1:00 PM - 1:25 PM

Heterogeneous Integration of a Miniaturized W-Band Radar Module
Karl-Friedrich Becker, Fraunhofer IZM (Leopold Georgi, Ruben Kahle, Steve Voges, Christian Zech, Benjamin Baumann, Axel Huelsmann, Anna Grasenack, Steffen Reinold, Bernhard Kleiner,Tanja Braun, Martin Schneider-Ramelow, Klaus-Dieter Lang)

C4 EM and CPI Reliability Benefits and Process Challenges of FBEOL Integration Changes Implemented in Lead-free C4 Products
Ekta Misra, IBM Corporation (T. Wassick, I. Melville, K. Tunga, D. Questad)

Flex-DIMM - A New High Density Module Form Factor
James Clayton, Microelectronics Assembly Technologies, Inc.

Porosity Evolution of Ag-Sintering at Die Attach
Ning-Cheng Lee, Indium Corporation (Sihai Chen, Guangyu Fan, Xue Yan, Chris LaBarbera, Lee Kresge)

2.5D Smart Objects Using Thermoplastic Stretchable Interconnects
Bart Plovie, Ghent University - IMEC (Jan Vanfleteren, Frederick Bossuyt, Sheila Dunphy, Kristof Dhaenens, Bjorn Vandecasteele, Steven Van Put)

Gallium Nitride Microsystems for Extreme Harsh Environments
Heather Chiamori, Stanford University

1:30 PM - 1:55 PM

Hi Density QFN Packages and Modules Incorporating Windings for Inductors, Chokes and Antennae
Terence Collier, CVInc

Advanced Lithography and Electroplating Approach to Form High-aspect Ratio Cu Pillars
Tom Swarbrick, Rudolph Technologies (Keith Best, Roger McCleary, Rudolph Technologies; Richard Hollman, Phillip Holmes, TEL NEXX)

A Low-Impedance Projection Welding Device for Large Package Hermetic Sealing
Thomas Salzer, Hermetric, Inc.

Impact of Metallurgical and Mechanical Properties of Sintered Silver Nanoparticles on Die-attach Reliability of High-temperature Power Modules
Hiroaki Tatsumi, Mitsubishi Electric Corporation (Sho Kumada, Atsushi Fukuda, Hiroshi Yamaguchi, Yoshihiro Kashiba)

L/S less than 5/5um Line Embedded Organic Substrate Manufacturing for 2.1D/2.5D SiP Application
Yu-Hua Chen, Unimicron Technology Corp. (Shyh-Lian Cheng, Dyi-Chung Hu)

Carbon based Temperature, Humidity, Volatiles & Force-strain Sensors within Protective Coating Layers for Highly Caustic and Corrosive Environments
Justin Furse, Brewer Science

2:00 PM - 2:25 PM

Broadband 1-to-N Circuit Combiner for mm-wave Applications
Ali Darwish, Army Research Lab (H. Alfred Hung, Joe Qiu, Amr Ibraheem, Edward Viveiros)

Study on Electromigration in Flip Chip Lead-Free Solder Connections with 30 µm or 40 µm Diameter on Thin Film Ceramic Substrates
Rainer Dohle,Micro Systems Engineering GmbH, Marek Gorywoda, University of Applied Sciences Hof (Bernd Kandler, Bernd Burger)

High Performance High Density Interconnects using Liquid Crystal Polymer-Substrates, Circuits Driven by Mobile Applications
James Rathburn, HSIO Technologies

Maintaining Low Voiding Solder Die Attach for Power Die While Minimizing Die Tilt
Randy Hamm, Honeywell Federal Manufacturing & Technologies (Ken Peterson, John Porter)

Enhanced Optical Performance for a Reduction Stepper to Meet the Challenges for Advanced Packaging Applications
James Webb, Rudolph Technologies, Inc. (Philippe Cochet)

Structural Electronics
Mike Newton, Newton Cyberfacturing

2:30 PM - 2:55 PM

Overt and Covert Authentication Marking of Hermetic Package Lids
Janice Meraglia, Applied DNA Sciences (Tom Dolan, Hi-Rel Group)

 

Ultra Fine Pitch RDL Development in Multi-layer eWLB (embedded Wafer Level BGA) Packages
Seung Wook Yoon, Statschippac Ltd. (Won Kyung Choi, Duk Ju Na, Andy Yong, Jaesik Lee, Urmi Ray, Riko Radojcic, Bernard Adam, Seung Wook Yoon)

Design of Filled One Step Chip Attach Materials (OSCA) for Conventional Mass Reflow Processing: Rheology Considerations for Jet Dispensing and Die Placement
Daniel Duffy, Kester Inc. (Hemal Bhavsar, Lin Xin, Jean Liu, Bruno Tolla)

 

Electroadhesion Pad Embedded with Actuators and Sensors for use in Low Earth Orbit Applications
Walter Saravia, Embry-Riddle Aeronautical University

3:00 PM - 3:25 PM

Types of Solder Preforms and Difficult Geometries
Herbert Ludowieg, Indium Corporation

 

The Benefits of Flux Coated Solder Preforms in a QFN Assembly Process
Brandon Judd, Indium Corporation (Maria Durham)

Barrier Properties of Electro-less Ni-B UBM for Solder Joining
Masaru Morita, Fujitsu Ltd. (Nobuhiro Imaizumi, Toshiya Akamatsu, Seiki Sakuyama)

 

Low Temperature Co-fired Ceramics For In-vivo Biosensing
Syed Khalid Pasha, Florida International University

 

 

 

Hotel Reservations(Hotel Deadline: September 30, 2015)
Reservations must be made directly with the:

Rosen Centre Hotel
9840 International Dr
Orlando, FL 32819 USA

 


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