Honeywell

IMAPS 2018 Pasadena

IMAPS 2018 - Pasadena
51st Symposium on Microelectronics
www.imaps2018.org

Conference:
October 9-11, 2018
Exhibition:
October 9-10, 2018
Professional Development Courses:
October 8, 2018
General Chair:
Mark Gerber
ASE US Inc.
General Chair-elect (2019):
Curtis Zwenger
Amkor Technology
Past General Chair (2017):
Dan Krueger
Honeywell FM&T

 
    PREMIER PROGRAM SPONSOR:
 
 
Premier Program Sponsor - Heraeus Materials Technology

 

    PREMIER TECHNOLOGY SPONSOR :

    PREMIER TECHNOLOGY SPONSOR :

   PREMIER TECHNOLOGY SPONSOR:
Bag Insert Sponsor: ASE Group
Premier Tech Sponsor - NGK NTK
Keynote Sponsor: SAMTEC

TECHNICAL PROGRAM
(Keynote Presentations, Sessions, Posters, and more!)

REGISTER ONLINE

For Exhibitors
     

 

Monday, October 8, 2018

TBD -- IMAPS Microelectronics Foundation David C. Virissimo Memorial Golf Classic | 7:00 AM - "Scramble"

Professional Development Courses (PDCs) - 8:00 AM - 5:30 PM

Monday, October 8: 2-hour formats, by theme/track
8:00 AM-10:00 AM | 10:30 AM - 12:30 PM | 1:00 PM - 3:00 PM | 3:30 PM - 5:30 PM
*Attendees can take ONE PDC during each timeslot*

  Track A:
Intro to Microelectronics Packaging
Track B:
Process and Materials
Track C:
Emerging Technologies
Track D:
Reliability
8:00 AM-10:00 AM

A1: Fundamentals of Microelectronics Packaging - PART 1 - John Pan, Cal Poly University

B1: Polymers Used in Wafer Level Packaging - Jeff Gotro, InnoCentrix

C1: Flexible Ceramics - John Olenick, ENrG Inc.

D1: Achieving High Reliability Solder Joints for Lead-Free Alloys - Dr. Ning-Cheng Lee, Indium Corporation

10:00 AM-10:30 AM
Coffee / Networking
Open to all PDC participants
10:30 AM - 12:30 PM

A2: Introduction to System in Package (SiP) - The Heterogeneous Integration Driver - Mark Gerber, ASE US, Inc.

B2: Electroplating Processes for Flip Chips - Fred Mueller Consultant, Metal Finishing Instructor

C2: Electronic Packaging for 5G Microwave and Millimeter Wave Systems - Rick Sturdivant, Ph.D., Azusa Pacific University

D2: Package/Board Level Integrity & Solder Joint Reliability - Dr. Jennie S. Hwang, Ph.D., D.Sc. H-Technologies Group

12:30 PM-1:00 PM
Lunch
Open ONLY to PDC participants taking morning AND afternoon courses
1:00 PM-3:00 PM

A3: Fan-Out Wafer/Panel-Level Packaging - John Lau, ASM

B3: Introduction to Solder Flip Chip with an Emphasis on Cu Pillar - Mark Gerber, ASE US, Inc.

C3: MEMS and nanoMEMS Packaging - Slobodan Petrovic, Oregon Institute of Technology

D3: A Methodology for Understanding the Reliability of Electronic Packaging - Greg Caswell, DfR Solutions

3:00 PM-3:30 PM
Coffee / Networking
Open to all PDC participants
3:30 PM-5:30 PM

A4: Fundamentals of Microelectronics Packaging - PART 2 - John Pan, Cal Poly University

B4: Temporary Bonding of Electronics (Wafers, Packages, Displays) - John Moore, Daetec LLC

C4: Fundamentals of 3D and 2.5D Packaging Integration - Urmi Ray, STATS ChipPAC

D4: Thermal Stress Failures in Electronic Packaging: Prediction and Prevention - Ephraim Suhir, Portland State University

5:30 PM-7:30 PM
Welcome Reception
Open to all IMAPS 2018 participants

 

Cost for Each PDC: $300 (on/before 9/12/2018); $400 (after 9/12/2018)
REGISTER ONLINE

Microelectronics/Packaging Industry Tour - 1:00 PM - 3:30 PM - ( Departure & Return TBD)
Jet Propulsion Laboratory
More Information Soon!

• All US citizens 18 years of age or older visiting JPL MUST present official, government-issued photo identification, such as a driver's license or passport, before being allowed entry.
• All non-US citizens (Foreign Nationals) 18 years of age or older MUST present either a passport or resident visa (green card) before being allowed entry. Individuals without the appropriate identification will NOT be admitted to the facility.
• The tour includes considerable walking and stair climbing. Dress comfortably and appropriately for the weather. Wheelchairs can be accommodated with prior notice. Cameras are allowed on the tour. *Note: All tours are conducted in English*

 

Welcome Reception | 5:30 PM - 7:30 PM
Pasadena Convention Center

Welcome Reception Sponsored by:

 
   Premier Program Sponsor:
 
 
Heraeus Materials Technology - Premier Sponsor, Gold
 

 

 


 

TUESDAY, OCTOBER 9, 2018

7:00 AM - 6:00 PM: Registration Open
11:00 AM - 5:00 PM: Exhibit Hall Open

IMAPS 2018 Opening & Plenary Session:
PASADENA CONVENTION CENTER

8:00 AM - 8:20 AM: Welcome, IMAPS Business Meeting, and more
Ron Huemoeller, Amkor Technology - IMAPS President

8:20 AM - 8:45 AM: Welcome to IMAPS 2018 & Intro of Keynotes
Mark Gerber, ASE Group - IMAPS 2018 General Chair

Keynote Session sponsored by:

8:45 AM - 9:30 AM: Keynote Presentation 1 - Tien Wu, ASE Group

9:30 AM - 10:15 AM: Coffee Break in Foyer

Coffee Break Sponsor:

Break Sponsor: Geib Refining

 

10:15 AM - 11:00 AM: Keynote Presentation 2 - David McCann, GlobalFoundries


11:00 AM - 11:15 AM:
This Week’s Program & Future IMAPS Activities
Urmi Ray, STATS ChipPAC - IMAPS VP of Technology

 

** IMAPS 2018 EXHIBITS OPEN: 11:00 AM - 5:00 PM **

11:15 AM - 2:00 PM: Lunch Break in Exhibit Hall

Exhibit Lunch Sponsor:

Lunch Sponsor: MRSI

 

 

TUESDAY AFTERNOON PROGRAM

 

SiP/SiM (Systems Solutions)

Track Chairs:
Urmi Ray, STATS ChipPAC; Rich Rice, ASE Group

Wafer Level/Panel Level (Advanced RDL)

Track Chairs:
John Hunt, ASE Group; Rajiv Dunne, Qualcomm

High Performance-High Reliability

Track Chairs:
Erica Folk, Northrop Grumman; Ivan Ndip, Fraunhofer IZM

Flip Chip/ 2.5D/3D/Optical (Advanced Package)

Track Chairs:
Karl Freidrich Becker, Fraunhofer-IZM; Sandeep Sane, Intel

Advanced Process & Materials (Enabling Technologies)

Track Chairs:
Habib Hichri, SUSS Microtec; Benson Chan, Binghamton Univ.

 

Session TP1
SYSTEM DESIGN & INTEGRATION

Session Chairs: Venky Sundaram, Georgia Tech; Sam Gu, Huawei

Session TP2
ADVANCED
FAN OUT

Session Chairs: Suresh Jayaraman, Amkor Technology; Kim Yess, Brewer Science

Session TP3
HIGH RELIABILITY IN EXTREME ENVIRONMENTS

Session Chairs: Zhenzhen Shen, Baker Hughes GE; Carl Edwards, Adv Materials Innovations

Session TP4
LARGE BODY / SMALL BODY FLIP CHIP

Session Chairs: Rockwell Hsu, Cisco; Jaimal Williamson, Texas Instruments

Session TP5
SUBSTRATE TECHNOLOGY

Session Chairs: Ton Schless, Sibco; Aric Shorey, Corning

2:00 pm - 2:25 pm

037
A 3D System-in-Package (SiP) for RF Application
Wayne Liu, ASE Group (Chung-Li, Jim Li, Casey Wu, Tony Yang, CK Liao, Tommy Sung, Kevin Chen)

057
Plating Process Optimization for High and Low Feature Densities in Panel based Packaging Applications
Christian Ohde, Atotech Deutschland GmbH (Dirk Ruess, Ralph Zoberbier, Ray Weinhold)

163
Novel Solder Alloy with Wide Service Temperature Capability for Automotive Applications
Ning-Cheng Lee, Indium Corporation

030
Thin Core Substrate Large Size FCBGA Stress and Thermal Challenges and Characterization
PoHsien Sung, Advanced Semiconductor Engineering, Inc. (Ian Hu, Penny Yang, Avis Feng, Shouyi Chin, MengKai Shih, David Tarng, Marwan Wang, CP Hung)

063
A Comparison of the Cu Electromigration Behavior Between Cu Lines with 5 µm L/S Realized by Conventional Semi Additive Process (SAP) and an Innovative Excimer Laser Damascene Process
Robert Gernhardt, Fraunhofer Research Institution for Reliability and Microintegration IZM

2:30 pm - 2:55 pm

072
A Cross-Domain, System Planning Methodology
Bill Acito, Cadence Design Systems

052
Unlocking the full Potential of Lithography for Advanced Packaging
Jelle van der Voort, Kulicke & Soffa Liteq B.V.

036
Power Cycle Tests of High Temperature Ag Sinter Die-attach on Metalized Ceramic Substrate by Using Micro-heater SiC Chip
Dongjin Kim, The Institute of Scientific and Industrial Research, Osaka University

127
Thermo-Mechanical and Assembly Considerations for Large Body FCBGA Using 400um Core
Jeremy Plunkett, Macom Technology Solutions

050
Performance Evaluation of Core-shell-based Novel Low-cost Pastes for LTCC Applications

Basar Bolukbas, ASELSAN

3:00 pm - 3:25 pm

093
Recess in the Motherboard Architectures for Small Form Factor Systems
Tim Swettlen, Intel Corp

090
Process Control Solutions for Advanced FOWLP Applications
Gilles Fresquet, UNITY SC

096
Perspectives of High-Temperature Pb-Free Bonding Materials
Hongwen Zhang, Indium Corporation (Ning-Cheng Lee)

136
fcLGA Package Assembly Qualification for Mobile Applications

Mumtaz Bora, PSEMI

076
Physical and Application Characteristics of Core-Shell Conductive Materials for LTCC in 5G Technology

Richard Stephenson, SVMT LLC


Coffee Break in Exhibit Hall: 3:25 PM - 4:30 PM

Break Sponsor: Pac Tech

4:30 pm - 4:55 pm

086
Universal Connection Matrix: A Breadboard in a Package
Erik Welsh, Octavo Systems

120
Advances in Temporary Bonding and Debonding Technologies for use with Wafer-Level System-in-Package (WLSiP) and Fan-Out Wafer-Level Packaging (FOWLP) Processes
Michelle Fowler, Brewer Science, Inc

121
3D Printed and Additively Manufactured RoboSiC for Space, Cryogenic, Laser and Nuclear Environments
Bill Goodman, Goodman Technologies LLC

025
Molding Recipe Study for MUF Solder Crack Improvement
Michael Shy, Advanced Semiconductor Engineering, Inc. (Scott Chen, Leander Liang, Pallas Hsu, Tim Tsai, Mason Liang)

058
Novel Low K LTCC Substrates and Materials Systems for 5G Application
Sid Sridharan, Ferro Corporation

5:00 pm - 5:25 pm

139
Future Interconnect Materials and System Integration Strategies for Data Intensive Applications
Pushkar Apte, SEMI

152
Design, Materials, Process, Fabrication, and Reliability of Fan-Out Wafer-Level Heterogeneous Integration
John H Lau, ASM Pacific Technology

138
Solder-Joint Reliability of a Radar Processor for Semi-Autonomous Driving Applications
Mollie Benson, NXP Semiconductors

077
Understanding Mold Compound Behavior on Flip Chip QFN Packages
Ruby Ann M. Camenforte, Texas Instruments

035
The Effect of Nickel Oxide Formed in the Interface of ENEPIG Structure for Flip Chip Technology
Chuan Lung Chuang, ASE Global (Min-Fong Shu, Yi-Hsiu Tseng)

5:30 pm - 5:55 pm

095
Flip Chip Reliability and Design Rules for SIP Module
Morard Adrien, Safrantech

114
Ultra Fine RDL Formation using an Alternative Pattering Solution for Advanced Packaging
Habib Hichri, SUSS MicroTec Photonic Systems Inc

SOON

022
FCCSP IMC Growth under Reliability Stress follow Automotive Criteria
Xenia Liu, ASE Group

123
Result of High Accelerated Stress Test of Organic Substrates made by Integrated Dry Process
Tomoyuki Habu, Ushio Inc.

 

 


 

WEDNESDAY, OCTOBER 10, 2018

7:00 AM - 7:00 PM: Registration Open
11:00 AM - 5:30 PM: Exhibit Hall Open

IMAPS 2018 Plenary Session:
PASADENA CONVENTION CENTER

8:00 AM - 8:15 AM: Day 2 Opening Comments & Intro of Keynote
Mark Gerber, ASE Group - IMAPS 2018 General Chair

Keynote Session sponsored by:

8:15 AM - 9:00 AM: Keynote Presentation 3 - Nan Wang, CISCO

 

WEDNESDAY MORNING PROGRAM

 

SiP/SiM (Systems Solutions)

Track Chairs:
Urmi Ray, STATS ChipPAC; Rich Rice, ASE Group

Wafer Level/Panel Level (Advanced RDL)

Track Chairs:
John Hunt, ASE Group; Rajiv Dunne, Qualcomm

High Performance-High Reliability

Track Chairs:
Erica Folk, Northrop Grumman; Ivan Ndip, Fraunhofer IZM

Flip Chip/ 2.5D/3D/Optical (Advanced Package)

Track Chairs:
Karl Freidrich Becker, Fraunhofer-IZM; Sandeep Sane, Intel

Advanced Process & Materials (Enabling Technologies)

Track Chairs:
Habib Hichri, SUSS Microtec; Benson Chan, Binghamton Univ.

 

Session WA1
CPI and MODELING

Session Chairs: Karthik Dhandapani, Qualcomm; Lei Fu, AMD

Session WA2
WAFER-LEVEL FAN OUT

Session Chairs: Eric Gongora, Enthone; Elvino Da Silveira, Rudolph Technologies

Session WA3
mm WAVE/ HIGH-SPEED PACKAGING

Session Chairs: Ken Kuang, Torrey Hills Technologies; Martin Goetz, Northrop Grumman

Session WA4
ADVANCED INTERPOSER TECHNOLOGIES

Session Chairs: Jaspreet Gandhi, Xilinx; Manish Dubey, Intel

Session WA5
POLYMER MATERIALS / PROCESSES

Session Chairs: Frank Eberle, Northrop Grumman; Xiao Liu, Brewer Science

9:10 am - 9:35 am

055
Chip Package Interaction: Understanding of Contributing Factors in Back End of Line (BEOL) Silicon / Cu Pillar Design and Applied Process Improvements
Frank Kuechenmeister, GLOBALFOUNDRIES (Dirk Breuer, Holm Geisler, Bjoern Boehme, Kashi Vishwanath Machani, Michael Hecker, Sven Kosgalwies, Jae Kyu Cho, GLOBALFOUNDRIES; Dongming He, Xuefeng Zhang, Lily Zhao, Qualcomm Technologies)

099
Enabling Robust Copper Seed Etching for Fine Line RDL by Electroplating on a Thin PVD Seed Layer
Marvin Bernt, Applied Materials

071
5G Systems and Packaging Opportunities
Rick Sturdivant, Azusa Pacific University

038
Signal Characterization of Multi laminated Substrates and 2µm RDL Process using High Resolution Photoresist with 10um Micro Via Copper Electoplating for 2.1D Packaging
Hye-jin Kim, Samsung Electro-Mechanics

040
Smart Passivation Materials with a Liquid Metal Microcapsule as Self-Healing Conductors for Sustainable Electronic Devices
Kunmo Chu, Samsung Advanced Institute of Technology

9:40 am - 10:05 am

085
System Co-Design Modeling Methodology of a High Speed (25Gbps) Multi-Rate 4-Channel Retimer: Simulation to Measurement Correlation
Tony Tang, Texas Instruments, Inc

101
Enhancements to Picosecond Acoustic Metrology for application in FO-WLP Process
Johnny Dai, Rudolph Technologies (Priya Mukundhan)

151
Systematic Design of Ka-band Transmitter Modules using the M3-Approach
Ivan Ndip, Fraunhofer IZM

159
Organic 2.1D Substrate with Glass Carrier Technology

Yasuyuki Hitsuoka, Toppan printing CO., LTD

051
Study on Epoxy Modified with Polyphenylene Ether for Functional Material for 5G Telecommunication Devices
Hyun Soon-Young, SABIC


Coffee Break in Foyer: 10:05 am - 10:30 am

Coffee Break Sponsor:


 

10:30 am - 10:55 am

094
A Systematic Approach to the Reliability Characterization of System in Package (SiP)
Karthikeyan Dhandapani, Qualcomm, Inc.

028
Active Optical Magnification Correction Technology as Method for Improved Lithography Overlay Accuracy
Habib Hichri, SUSS MicroTec Photonic Systems Inc.

131
Achieving Automotive Grade Board Level Thermal Cycling Reliability with WLCSP Package

Nishant Lakhera, NXP Semiconductors

061
Cu Diffusion into the Glass Under Bias Temperature Stress Condition for Through Glass Vias (TGV) Applications
Hoon Kim, Corning Research and Development Corp

097
Fabrication of an Advanced Epoxy based Molding Compound with High Thermal Conductivity and Exceptional Mechanical Properties

Nazila Dadvand, Texas Instrument

11:00 am - 11:25 am

084
A Novel Metal Scheme and Bump Array Design Configuration to Enhance Advanced Si Packages CPI Reliability Performance by Using Finite Element Modeling Technique
Kuo-Chin Chang, Taiwan Semiconductor Manufacturing Company, Ltd.

118
Customization of Chemistry Continues

Eric Gongora, Elie Najjar, MacDermid Enthone Advanced Electronic Solutions

158
Enabling High-Performance Heterogeneous Integration via Interface Standards, IP Reuse, and Modular Design
Jeffrey Demmin, Booz Allen Hamilton

080
Processing Through Glass Via (TGV) Interposers for Advanced Packaging

Charles G. Woychik, i3 Electronics, Inc. (John Lauffer, David Bajkowski, Michael Gaige, Robert Edwards, Gordon Benninger, William Wilson )

125
Advanced Build-up Materials for High Speed Transsmission Application
Shiro Tatsumi, AJINOMOTO CO., INC.

11:30 am - 11:55 am

017
System ElectroThermal Co-Design of a Zero-Drift Current-Shunt Monitor with Precision Integrated Shunt Resistor
Jie Chen, Texas Instruments, Inc

153
Reliability of Fan-Out Wafer-Level System-in-Package
John Lau, ASM Pacific Technology

054
Packaging and Integration Strategy for mmWave Products
Urmi Ray, STATS ChipPAC Inc

029
Bumping Process Effect on CPI Reliability
Lei Fu, AMD

129
Solderable Polymer Thick-film Conductors for Low Temperature Substrates
Gregory Berube, Heraeus Precious Metals North America

 

12:00 pm - 1:15 pm: Lunch in Exhibit Hall

Lunch Sponsor:

 


WEDNESDAY AFTERNOON PROGRAM

 

SiP/SiM (Systems Solutions)

Track Chairs:
Urmi Ray, STATS ChipPAC; Rich Rice, ASE Group

Wafer Level/Panel Level (Advanced RDL)

Track Chairs:
John Hunt, ASE Group; Rajiv Dunne, Qualcomm

High Performance-High Reliability

Track Chairs:
Erica Folk, Northrop Grumman; Ivan Ndip, Fraunhofer IZM

Flip Chip/ 2.5D/3D/Optical (Advanced Package)

Track Chairs:
Karl Freidrich Becker, Fraunhofer-IZM; Sandeep Sane, Intel

Advanced Process & Materials (Enabling Technologies)

Track Chairs:
Habib Hichri, SUSS Microtec; Benson Chan, Binghamton Univ.

 

Session WP1
EMBEDDED/
HIGH VOLTAGE

Session Chairs: Trevor Yancey, TechSearch International; Mak Kulkarni, Texas Instruments

Session WP2 PANEL-LEVEL FAN OUT

Session Chairs: Markus Wöhrmann, Fraunhofer IZM; Linda Bal, TechSearch International

Session WP3
RF/WIRELESS COMPONENTS

Session Chairs: Ivan Ndip, Fraunhofer IZM; Ege Engin, San Diego State University

Session WP4
OPTICAL and ENABLING TECHNOLOGIES

Session Chairs: Marika Immonen, TTM Technologies; Kevin Demartini, DuPont

Session WP5
NOVEL MATERIALS / PROCESSES

Session Chairs: Florian Herrault, HRL Laboratories; W. Hong Yeo, Georgia Tech

1:15 pm - 1:40 pm

031
High Voltage Wide Band Gap Embedded Packaging for Discrete GaN Transistors and GaN Power Modules
Charles Bailley, GaN Systems Inc.

089
Fine Line Panel Level Fan Out changes the SiP Landscape
David Fang, Powertech Technology Inc. (Michael Hsu, CC Chang, KW Chung, Alex Liu, Irving Lin, Daniel Fann)

141
Design of LTCC Devices for Wireless Communication

Jau-Ho Jean, National Tsing Hua University

019
Design of Solder Connections for Self-Assembly of Optoelectronic Devices
Thomas Marinis, Charles Stark Draper Laboratory (Joseph Soucy)

111
Reliability of Novel Ceramic Encapsulation Materials for Electronic Packaging
Stefan Kaessner, Robert Bosch GmbH (M. Scheibel, Heraeus Deutschland GmbH & Co. KG; S. Behrendt, Forschungs- und Entwicklungszentrum FH Kiel GmbH; B. Boettge, Fraunhofer IMWS; K. G. Nickel, University of Tuebingen)

1:45 pm - 2:10 pm

083
Packaging and Assembly Techniques to Increase power density and simplify designs using 3-D SiP modules
Steven Kummerl, Texas Instruments

164
Integrating a Low Cure Dielectric Material into Panel and Wafer Level Manufacturing Process
Markus Woehrmann, Fraunhofer IZM - Department WLSI

062
The use of Electromagnetic band Gap Structures (EBG) to Enable Placement of an Antenna System in Very Close Proximity of a High Conductivity/ Permittivity structures without Degradation
Pablo Medina, TTP

098
Reversed Pulse Plating of Nanostructured Silver-cobalt Alloys for Connector Applications

Nazila Dadvand, Texas Instrument

082
Synthesis, Characterization, and Processing of Novel Metallic Core-Shell Materials for Thick-Film Applications
Kyle Bandaccari, SVMT LLC

2:15 pm - 2:40 pm

117
Design and Demonstration of 3D Glass Panel Embedded (GPE) Packages for Heterogeneous Integration
Siddharth Ravichandran, Georgia Tech

148
A Numerical Study on Mitigation of Flying Dies in Compression Molding of Microelectronic Packages
Marc Dreissigacker, TU Berlin

116
Mixed-Mode Hybrid Parameters for High-Speed Differential Lines

A. Ege Engin, San Diego State University (Ivan Ndip, Klaus-Dieter Lang, Fraunhofer Institut IZM; Jerry Aguirre, Kyocera North America)

087
X-Ray Advances in Support of Advanced Packaging - Today and Tomorrow
David Bernard, David Bernard Consultancy

020
Copper Oxidation Effect in the EMC/Cu Interfacial Adhesion Improvement for a Novel Copper Interconnection Substrate Application
Min-Fong Shu, ASE Group (Yi-Hsiu Tseng)

2:45 pm - 3:10 pm

003
Reliability of an Electronic Product Fabricated of Mass-Produced Components
Ephraim Suhir, Portland State University

068
Lithographic Evaluation of Thin Photoimageable Dielectric Dry Film for Advanced Panel Level Packaging Applications
Jack Mach, Rudolph Technologies

142
Integration of a K-Band Receiver Front-End Using a Copper Core Printed Circuit Board
Brian Curran, Fraunhofer IZM

034
The Low Dk and Df Photosensitive Insulation Material for Low Transmission Loss Packages
Shinichiro Abe, Hitachi Chemical Japan

109
Study on High Temperature Resistant Die Bonding Formed by Al/Ni Nano-particles Composite Paste
Yasunori Tanaka, Waseda University

3:15 pm - 3:40 pm

133
Warpage Behaviors of System-in-Packages on a Substrate Strip

Eric Ouyang, STATS ChipPAC Inc (Billy Ahn, SeonMo Gu, Yonghyuk Jeong, JaeMyong Kim; STATS ChipPAC Korea; Jim Hsu, Susan Lin, Goran Liu, Anthony Yang, CoreTech System (Moldex3D))

024
High Precise and Aspect Ratio Cu Pillar Technology for Via Formation

Yukio Asami, USHIO INC.

145
**NEW TOPIC: A Reusable 3D Printed Cavity Resonator for Liquid Sample Characterization
Saranraj Karuppuswami, Michigan State University (Saikat Mondal, Mohd Ifwat Mohd Ghazali, Premjeet Chahal)

169
Ribbon Ceramic
John Olenick ENrG Incorporated

066
Zinc Oxide Nanowire Sensor Packaging

Bruce Kim, City University of New York


3:45 pm - 5:30 pm: Happy Hour in Exhibits




PASADENA CONVENTION CENTER
5:30 pm - 7:30 pm: 

Panel Session & Reception on:
ELIMINATING THE AI CONFUSION -
IMPACT ON COMPUTING, COMMUNICATIONS, AND AUTOMOTIVE

Artificial Intelligence (AI) makes it possible for machines to learn from experience, adjust to new inputs and perform human-like tasks. The term “deep learning” or a type of “machine learning” refers to training a computer to perform human-like tasks, such as recognizing speech, identifying images or making predictions. Instead of organizing data to run through predefined equations, deep learning establishes basic parameters about the data and trains the computer to learn on its own by recognizing patterns using many layers of processing. AI or deep learning is expected to be applied to a wide range of applications, including connectivity or Internet of Things (IoT), big data processing and servers, cloud services, autonomous driving, 5G communications, smart factory or Industry 4.0, robotics, AR/VR, cryptocurrency mining, and blockchain.

This panel discussion focuses on the impact of AI on computing, communications, and automotive. The experts on the panel will comment on their understanding of the application of AI and the impact on packaging and assembly. Package choice, design, and materials impact and the importance of co-design will be discussed. A set of experts will address these issues and others in a dynamic discussion setting.

MODERATOR:
Jan Vardaman, President and Founder of TechSearch International, Inc.

Includes Beer, Wine and Appetizers - Full Details Soon

PANELISTS:
David McCann - GlobalFoundries
Ron Huemoeller - Amkor Technology
Rama Divakaruni - IBM
TBD - ASE
TBD - JCET
MORE SOON

 



 


 

THURSDAY, OCTOBER 11, 2018

7:00 AM - 3:00 PM: Registration Open
NO EXHIBITS - Exhibitor Move-Out

 

IMAPS 2018 Plenary Session:
PASADENA CONVENTION CENTER

8:00 AM - 8:15 AM: Day 3 Opening Comments & Intro of Keynote
Mark Gerber, 2018 General Chair; Curtis Zwenger, General Chair-Elect (2019)

Keynote Session sponsored by:

8:15 AM - 9:00 AM: Keynote Presentation 4 - Rama Divakaruni, IBM
AI Hardware: Packaging to the Core!

 

THURSDAY MORNING PROGRAM

 

SiP/SiM (Systems Solutions)

Track Chairs:
Urmi Ray, STATS ChipPAC; Rich Rice, ASE Group

Wafer Level/Panel Level (Advanced RDL)

Track Chairs:
John Hunt, ASE Group; Rajiv Dunne, Qualcomm

High Performance-High Reliability

Track Chairs:
Erica Folk, Northrop Grumman; Ivan Ndip, Fraunhofer IZM

Flip Chip/ 2.5D/3D/Optical (Advanced Package)

Track Chairs:
Karl Freidrich Becker, Fraunhofer-IZM; Sandeep Sane, Intel

Advanced Process & Materials (Enabling Technologies)

Track Chairs:
Habib Hichri, SUSS Microtec; Benson Chan, Binghamton Univ.

 

Session THA1
OPTICAL /
AUTOMOTIVE

Session Chairs: Mark Hoffmeyer, IBM; Rich Rice, ASE Group

Session THA2
WLCSP / WAFER-LEVEL FAN OUT

Session Chairs: Farhad Kiaei, Dupont; Paul Tiner, Texas Instruments

Session THA3
HIGH RELIABILITY IN BIOMEDICAL

Session Chairs: Tim LeClair; Cerapax; Julia Brueckner, Quantum Analytics

Session THA4
BUMP/
INTERCONNECT

Session Chairs: Morgan Tribolet, Intel; Adeel Bajwa, UCLA

Session THA5
ADVANCED WIREBOND

Session Chairs: Martin Schneider-Ramelow, Fraunhofer IZM; Michael McKeown, Hesse Mechatronics

9:10 am - 9:35 am

060
Advanced Packaging for Automotive Dashboard Application
Nokibul Islam, STATS ChipPAC, Inc. (HC Choi)

119
Effect of Underfill on Thermomechanical Reliability of Large Wafer Level Chip Scale Packages (LWLCSP) with Various Die Thickness Subjected to Board Level reliability Thermal Cyclic Qualification Test

Balaji Nandhivaram Muthuraman, Dialog Semiconductor GmbH

112
When Failure is Not an Option - Packaging Materials and Technologies for the Reliable Protection of Medical Electronics
Thomas Zetterer, SCHOTT AG (J. Herzberg, J. Baehr, K. Waxman, Jochen Herzberg)

005
Investigation of the Growth of Phases in the Cu(Ni)–Sn System

Varun Baheti, Indian Institute of Science,

105
Ultra-Fine Pitch Wedge bonding for Device Reliability Characterization

Lacey Badger, Intel Corporation

9:40 am - 10:05 am

023
Batch Microwave Plasma Cleaning for Robustification of Automotive Devices: an Alternative to Strip-type Radiofrequency Plasma
Ghizelle Jane E. Abarro, ON Semiconductor Philippines Inc. (Rod Delos Santos Jr., Alvin Denoyo, Manny Ramos)

039
Photosensitive Polyimide having Low Loss Tangent for RF Application

Masao Tomikawa, Toray Industries

162
Sequence-Specific Nucleic Acid Detection at 1 aM; Microfluidics Device
Harold G. Monbouquette, University of California, Los Angeles

107
Fine Pitch Paste for System-in-Package Applications
Zhang Ruifen, Heraeus Materials Singapore Pte Ltd

108
Process Development of Al-alloy Wire Bonding for High-Temperature Power Electronics

Tao Xu, Kulicke and Soffa

Coffee Break in Foyer: 10:05 am - 10:20 am

10:20 am - 10:45 am

033
A New Photosensitive Dielectric Material for High-Density RDL with Ultra-Small Photo-Vias and High Reliability
Daichi Okamoto, TAIYO INK MFG. CO.

137
Low Temperature Cure Polyamide Dielectric for RDL

Daniel Nawrocki, MicroChem Corp

170
Glass Encapsulation for Wireless Highly Miniaturized Implantable Devices
Jim Ohneck, GlencaTec AG

012
Elevated Stand-Off Heights in Solder Joint Interconnections of Surface Mounted IC Packages Result in Appreciable Stress and Warpage Relief
Ephraim Suhir, Portland State University (Sung Yi, Portland State University; Jennie Hwang, H-Technologies Group, R. Ghaffarian, Jet Propulsion Lab., NASA)

113
Intelligent Production of Wire Bonds using Multi-Objective Optimization – Insights, Opportunities and Challenges
Andreas Unger, Hesse GmbH (Matthias Hunstig, Michael Brökelmann, Hesse GmbH; Tobias Meyer, Fraunhofer IWES; Walter Sextro, Paderborn University)

10:50 am - 11:15 am

079
Modern Electronics Production and its Requirement Towards Automatic Inspection and Automation
Sebastian Stenger, EPP Germany

103
Study of Sub-micron Fan-out Wafer Level Packaging Solutions

Yoshio Goto, Canon (Kosuke Urushihara, Bunsuke Takeshita, Ken-Ichiro Mori)

122
Applicability of Selective Laser Reflow for Thin Die Stacking
Luke Arthur Wentlent, Universal Instruments Corp

070
Reliability Analysis of Dispensed Electrical Interconnects on Flexible Substrate

Mohammed Alhendi, Binghamton University

106
Growth of Intermetallics at Coated Silver Wire Bond Interfaces

Sarangapani Murali, Heraeus Materials Singapore Pte Ltd

11:20 am - 11:45 am

154
Highly Reliable Solderless Contact with Press-fit Technology for Power Modules
Minoru Egusa, Mitsubishi Electric Corporation (Hidetoshi Ishibashi, Yoshitaka Otsubo, Masao Kikuchi, Mitsubishi Electric Corporation; Yoshihiro Kashiba, Osaka University)

134
Trends in Fan-Out Process Technology
Tom Strothmann, Kulicke & Soffa

100
Flexible PET Substrate for Higher Definition Printing of Polymer Thick Film Conductive Pastes
Art Dobie, Ikonics/Chromaline

165
Analysis of Ultrasonic Welding of Mechanically Coupled Small Area Contacts for a Silicon Carbide Power Module
Kuldeep Saxena, CREE

168
Wire Bonding Advances for Multi-Chip and System in Package Devices
Hui Xu , Kulicke and Soffa Industries, Inc.

 

11:45 am - 1:15 pm: 
POSTERS & PIZZA
(in Foyer)
Session Chairs: Erica Folk, Northrop Grumman; Andre Rouzaud, CEA Leti; Gabriel Pares, CEA Leti

(POSTER SETUP FROM 10:30 AM UNTIL 11:40 AM)

Posters & Pizza Sponsored by:

104
Design Of Experiment Analysis Of The Lid Of An Electronics Package Using Finite Element Analysis
Nupur Bajad, SUNY Binghamton

021
Comparisons of Soldering Alloys in Large Ceramic Substrate to Metal Heatsink Attachment Application
Frank Fan Wang, Crane Aerospace & Electronics

026
Reliability Studies on Copper-ceramic-joints Fabricated by Means of Selective Laser Melting
Thomas Stoll, Institute for Factory Automation and Production Systems

049
Performance Evaluation of Core-shell-based Novel Low-cost Pastes for LTCC Applications
Basar Bolukbas, ASELSAN

006
Fluxes Effective in Suppressing Non-Wet-Open at BGA Assembly
Ning-Cheng Lee, Indium Corporation

007
Sn3.2Ag0.7Cu5.5Sb Solder Alloy with High Reliability Performance up to 175C
Ning-Cheng Lee, Indium Corporation

009
Shear Strength and Thermo-mechanical Reliability of Sintered Ag Joints Containing low CTE Non-metal Additives for Die Attach
Guangyu Fan, Indium Corporation (Christine Labarbera, Ning-Cheng Lee, Indium Corporation; Colin Clark, Rochester Institute of Technology)

011
A New Method for Non-Destructive Characterization of Through Holes in Printed Circuit Boards
Sarah Czaplewski, IBM (Joe Doman, Joe Kuczynski)

056
Microstrucuture and Mechanical Properties of Pressureless Sintered Silver Die-attach Materials
Masafumi Takesue, Bando Chemical Industries

069
Investigation Towards the Optimum of Power Capability, Ageing Stability and Costs Effectiveness on Thick Film Resistor Pastes for AlN Ceramics
Richard Schmidt, Fraunhofer Institute for Ceramic Technologies and Systems

081
Thermal Shrinkage Management of Silver Core-shell Conductive Layers with A6 and L8 LTCC Architectures
Richard Stephenson, SVMT LLC

092
Implementation of a Temperature Ramp Rate Requirement and Impact on the Packaging Processes
Randy Hamm, Honeywell KCP

124
Research of Cleaning-Free AuSn Paste for Reflow under Formic Acid
Tsukasa Yasoshima, Mitsubishi Materials Corporation

128
Aqueous Washable Thermal Resistant Coatings and Adhesives
John Moore, Daetec LLC

130
High Performance Etchable RoHS Compliant Thick Film Gold Conductor
Gregory Berube, Heraeus Precious Metals (Samson Shahbazi, Stephanie Edwards, Ryan Persons, Caitlin Shahbazi)

140
Novel Formaldehyde-free Electroless Copper for Plating on Next Generation Substrates
Christian Wendeln, Atotech Deutschland GmbH

102
Mechanical and Electrical Properties of Cu-X Alloy Electrodeposits for Fine Pitch Vertical MEMS Probe Cards
Kyu Hwan Lee, Korea Institute of Materials Science Advanced Substrate

167
Spin Vs Spray Coating Techniques for Advanced Packaging
Kamana Sai Sarath Reddy, Rochester Institute of Technology

110
Study of Pb-free Electroplating for Panel Level Package
Koji Tatsumi, Mitsubishi Materials Corporation

161
Low-temperature Sintering IMC-nano-solder for High Temperature Interconnect
Ying Zhong, University of California at San Diego

146
Investigation of a Proactive Glass Filler Removal in IC Substrate Build up Films and its Effect on Topography and Copper Adhesion Reliability
Stefan Kempa, Atotech Deutschland GmbH

078
Development of a Mechanical Cycling Reliability Test Program for Evaluating Thermal Interface Materials for Semiconductor Test and Burn-in Requirements
David Saums, DS&A LLC

172
High Frequency Base Materials: Laser-Material Interaction for HDI/ICP Applications
Christopher Ryder, ESI

173
Optimization of Cupric Chloride Subtractive Etching for Cu High Density Interconnects
Oliver Chyan, University of North Texas (Alexander Lambert, Goutham Issac, Ashish Salunke, Luwen Lu, University of North Texas; Oscar Ojeda, Jeremy Ecton, Arnab Roy, Hsin-Wei Wang, Leonel Arana, Intel)

###
Explore High Bonding Reliability of Cu Wire Bonded Devices under Extreme Halide Contaminated Environments
Oliver Chyan, University of North Texas (M. Asokan, J. Caperton, A. Salunke, University of North Texas, Interfacial Electrochemistry and Materials Research Lab; Fei Xu, Changzhou Ruize Microelectronics Co., Ltd.)

176
Development of High Temperature Tantalum Polymer Capacitors
Antony P. Chacko, KEMET Electronics Corporation (James Chen, Chris Stolarski, Cristina MotaCaetano, Philip Lessner)

177
Maximum Lateral Resolution and Multi Scale Wafer Topography using Full-field Optical Interferometry and Different Approaches
Mohamad Abdel Sater, CEA LETI (C.Beitia, S.Godny, S.Petitgrand)

178
Evaluation of Low Cost, High Temperature Die and Substrate Attach Materials for Silicon Carbide (SiC) Power Modules
Sayan Seal, WolfSpeed, a CREE Company (Brice McPherson, Brandon Passmore)

180
Enhancing Productivity for IC-substrate Manufacturing by Using a Novel Copper Electrolyte for Semi Additive Plating
Mustafa Oezkoek, Atotech Deutschland GmbH (Olivier Mann, Christian Ohde, Dolly Akingbohungbe)

181
Development of skills and tools for micro opto-electrical integration on wafer level
Saskia Schröder, Fraunhofer Institute for Silicon Technology (Vanessa Stenchly, Hans-Joachim Quenzer, Wolfgang Reinert )

182
Converter-Level Integration for Wide Band-Gap Automotive Power Electronics
C Mark Johnson, University of Nottingham ( Lee Empringham, Liliana De Lillo, Christina Dimarino, Jordi Espina, Behzad Ahmadi )


 

THURSDAY AFTERNOON PROGRAM

 

SiP/SiM (Systems Solutions)

Track Chairs:
Urmi Ray, STATS ChipPAC; Rich Rice, ASE Group

Wafer Level/Panel Level (Advanced RDL)

Track Chairs:
John Hunt, ASE Group; Rajiv Dunne, Qualcomm

High Performance-High Reliability

Track Chairs:
Erica Folk, Northrop Grumman; Ivan Ndip, Fraunhofer IZM

Flip Chip/ 2.5D/3D/Optical (Advanced Package)

Track Chairs:
Karl Freidrich Becker, Fraunhofer-IZM; Sandeep Sane, Intel

Advanced Process & Materials (Enabling Technologies)

Track Chairs:
Habib Hichri, SUSS Microtec; Benson Chan, Binghamton Univ.

 

Session THP1
WEARABLE /
TEST

Session Chairs: Mike Tong, Fitbit;

Session THP2
MEMS & SENSORS

Session Chairs: Gabriel Pares, CEA-LETI; Marco Del Sarto, ST Microelectronics

Session THP3
HIGH RELIABILITY IN DEFENSE and AEROSPACE

Session Chairs: Erica Folk, Northrop Grumman; Daniel Fisher, GLOBAL FOUNDRIES

Session THP4
3D & ENABLING TECHNOLOGIES

Session Chairs: Nokibul Islam, STATS ChipPAC; Abram Castro, Texas Instruments

Session THP5
ADVANCED EQUIPMENT /ADDITIVE MANUFACTURING

Session Chairs: Doug Shelton, Canon USA; Douglas Hopkins, NC State University

1:15 pm - 1:40 pm

008
Smart and Connected Bioelectronics for Persistent Human-Machine Interfaces
Woon-Hong Yeo, Georgia Tech

160
Scalable Hybrid Microelectronic-Microfluidic Integration of Highly Sensitive Biosensors

Patrick Reinecke, Technical University of Berlin

018
The Impact of PWB Glass Style and Orientation on the Reliability of SMT Components
Greg Caswell, DfR Solutions

053
3D Integration: 300mm MOCVD Copper Seed Layer Deposition for High Aspect Ratios TSV
Sabrina Fadloun, SPTS Technologies

047
Productivity Comparison of Wafer Transport Architectures in PVD Tools Used for Fan-Out Packaging RDL Barrier/Seed Formation
Paul Werbaneth, Intevac, Inc. (Terry Bluck, Chris Smith)

1:45 pm - 2:10 pm

064
Textile Antennas and Radio Systems

Martin Orrell, TTP

132
Glass Solutions for Packaging and RF MEMs
Raj Parmar, Corning Inc.

065
Reliability & Characterization of Wide Band Gap Power Modules using POL-kW Packaging Technology
Christopher Kapusta, General Electric

149
Electrical Characterization of Low Temperature PECVD Oxides for TSV Applications
Piotr Mackowiak, Fraunhofer IZM

075
**NEW TOPIC:
Ultra-Wideband High Gain Vivaldi Antennas Using Additive Manufacturing

Mohd Ifwat Mohd Ghazali, Michigan State University (Premjeet Chahal)

2:15 pm - 2:40 pm

115
The Evolution of a Clinical Grade Wearable Vital Signs Monitor and the Role of Advanced Microelectronic Packaging Techniques to Increase Functionality

James Ohneck, AEMtec

091
Electrochemical Capacitance based Method Applied to Epoxy Molded Devices
Paolo Rolandi, STMicroelectronics

171
SHERLOC Laser Power Supply Electronics Module Design for Reliability for Mars 2020 Rover
Juan Cepeda-Rizo, Jet Propulsion Laboratory/ Caltech/NASA

032
High Performance Package-Level EMI Shielding of Ag Epoxy Composites with Spray Method for High Frequency FCBGA Package Application

Kisu Joo, Ntrium Incorporation

059
Laserbonding Instead of Ultrasonic Wire Bonding - an Alternative Joining Technology for Power Applications

Benjamin Mehlmann, F&K DELVOTEC GmbH

2:45 pm - 3:10 pm

015
Screen Printing Fine Pitch Stretchable Silver Inks onto a Flexible Substrate for Wearable Application
Jianbiao Pan, CalPoly

067
Assessment of Wave-Guided Ultrasonic Transducer System for Erosion-Corrosion Detection in Nuclear Applications
Aparna Aravelli, Florida International University

174
RF Test Article Experiment on the Impact of Non-Hexavalent Chromium-Based Conversion Coatings on Electrical Assemblies
Josh Petko, Northrop Grumman Corporation

SOON

179
Additive Manufacturing for Multi-chip Modules

Zhenzhen Shen, Baker Hughes GE (Aleksey Reiderman)

 


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Exhibit Lunch Sponsor:

Lunch Sponsor: MRSI

Posters & Pizza Sponsor:

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Break Sponsor: Geib Refining

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