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May 16, 2007

   IMAPS EVENTS
Button Advanced Technology Workshop on Thermal Management - Call For Abstracts (read more...)

Button IMAPS to Present Technical Session at SEMICON West 2007 (read more...)

   CHAPTER ACTIVITIES (events listed in chronological order)
Bullet Metro Chapter to Offer Two Courses This May - Hybrid Pre Cap Visual Inspection; and Process Certification and Defect Recognition: Hybrids, Microcircuits and RF/MMIC Modules (read more...)

Bullet Arizona Chapter Meeting May 24 Featuring Rajen Chanchani's Presentation on 3D Integration Technologies: An Overview (read more...)

Bullet French Chapter Announces the Postponement of the SIP-SOC Meeting (read more...)

Bullet Metro Chapter May 31 Dinner Meeting (read more...)

Bullet IMAPS Capital Chapter Joint Meeting June 5 with SMTA (read more...)

Bullet Chicago/Milwaukee/SMTA Joint Chapter Meeting – Thursday, June 7th (read more...)

Bullet EMPC 2007 - 16th European Microelectronics and Packaging Conference & Exhibition (read more...)

Bullet 8th International Conference on Electronics Packaging Technology (ICEPT 2007) - August 14th – 17th, 2007, Shanghai, China  (read more...)

   PRODUCTS AND PUBLICATIONS
The Journal of Microelectronics and Electronic Packaging 1st Quarter 2007 Edition is Now Available On-line (read more...)

   MEMBERSHIP
Bullet Society Awards 2007 Deadline Extended Until May 31 (read more...)


IMAPS Events (view full Web Calendar)

Advanced Technology Workshop on Thermal Management - Call For Abstracts    ^ Top
Thermal Management 2007 is being held September 24-27, at the Holiday Inn San Jose in San Jose, California. The call for abstracts is now available on-line at www.imaps.org/thermal. Abstracts must be submitted before June 25, 2007.

This workshop is organized each year by IMAPS to promote discussion of leading-edge developments in thermal management components, materials, and systems solutions for removing, spreading, and dissipating heat from microelectronic devices and systems. The Workshop emphasis is for practical, high-performance solutions to meet current and evolving requirements in computing and wireless/telecom systems. Single-company product development concepts are acceptable subjects; however, all abstracts will be judged on novel and innovative contributions to the industry knowledge.

This Advanced Technology Workshop (ATW) on Thermal Management has been held since 1992 and is considered to be one of the most successful of the IMAPS ATWs that are held each year. The 2006 Workshop featured 41 presentations, five of which were competition-selected graduate student papers.

IMAPS to Present Technical Session at SEMICON West 2007    ^ Top
Steve Adamson of Asymtek and IMAPS President-Elect has been asked to Chair an IMAPS Technical Session at SEMICON West. The IMAPS Session will take place on July 18, 2007, from 3:00 – 5:00 in the afternoon and will feature the cutting edge technology that IMAPS delivers worldwide.  The IMAPS Session will take place in the Mosconi Center – West Hall.

“Semi and IMAPS are exploring ways in which the two organizations can work cooperatively. We have started this process by putting together a group of five well regarded experts in the field of microelectronics and electronic packaging for this special session at Semicon West in San Francisco. The abstracts we’ve received indicate that the IMAPS session at SEMICON West will be of the highest caliber”, Adamson said.

The following speakers have already committed papers to the IMAPS session:

Novel Method of BGA Coplanarity Reduction at the Ball Attach Process
Rick Lathrop, Heraeus;

Lithography-Grade Controlled Expansion Substrates for Wafer Level Packaging
Greg Rudd, SpectraMat

IC packaging technologies - What's New?  What's Next?
Joe Fjelstad, Siliconpipe

Title -- TBD
Michael Todd, Henkel.

This session at Semicon West will reflect the quality of papers that will be presented at the 40th IMAPS International Symposium on Microelectronics in San Jose, from November 11th – 15th. 

Please show your support for this select group of speakers and IMAPS by attending this special session at Semicon West.

Chapter Activities (events listed in chronological order)

Metro Chapter to Offer Two Courses This May - Hybrid Pre Cap Visual Inspection; and Process Certification and Defect Recognition: Hybrids, Microcircuits and RF/MMIC Modules    ^ Top
The Metro Chapter of IMAPS is pleased to offer the following courses.

Hybrid Pre Cap Visual Inspection (1 Day)

Date:

May 21, 2007

Time: 8:00 AM-4:30 PM
Location:

Holiday Inn Ronkonkoma
3845 Veterans Highway
Ronkonkoma, NY 11779
Ph: 631-585-9500

Cost:

$350.00 - 1-5 attendees
$300.00 - 5+ attendees

Includes Continental Breakfast and Lunch. Space is limited so reserve early

Reservations:

For reservations or additional information, Contact:
Steve Lehnert
(631) 345-3100
slehnert@mdipower.com

Please make checks payable to Metro IMAPS

Mail To:
Steve Lehnert
C/O Modular Devices
One Roned Road
Shirley, NY 11967

Hybrids/MCMs/RF Modules all require a visual inspection step just prior to encapsulation or hermetic seal. This is a critical process step that requires a high degree of operator skill and understanding of what to look for and reject as part of the inspection process. This course defines the inspection criteria based on traditional Mil Spec documents in conjunction with industry accepted best commercial practices.  Over 200 color photographs of actual production defects are reviewed and discussed in detail.  The students are exposed to a variety of defects and how the defects relate to the materials and process flow.  Inspection checklists are used to simply the criteria and focus on the major problem areas. 

  • Understand what to look for as part of a pre cap visual inspection
  • Learn how to interpret and apply traditional Mil Spec visual inspection guidelines

The course is intended for quality assurance personnel, inspectors, lead operators and others responsible for inspection of the hardware prior to the final package sealing process.

Course Outline:

Hybrid  Materials and Processing Overview
  • Review of Terminology

General Inspection Guidelines and Procedures

Visual Inspection Requirements Flowdown

  • MIL-PRF-38534
  • MIL-STD-883    

Pre Cap Visual Inspection Criteria

  • Defects related to wafer fab, saw and break, probe test etc.
  • Thick Film/Thin film substrate defects e.g cracks, chipouts
  • Laser Trim defects
  • Epoxy die attach, fillet criteria, typical problems encountered
  • Eutectic solder attach
  • Epoxy attach of chip capacitors and chip resistors                    
  • Wirebond defects (e.g.  Excessive squash out, heel cracks, misplaced bonds etc.)

Foreign Material Identification and Contamination Control

Rework and Repair Limitations

External Visual Inspection

Summary and Course Critique

Process Certification and Defect Recognition - Hybrids, Microcircuits and RF/MMIC Modules

Date:

May 22-25, 2007

Time: 8:00 AM-4:30 PM - May 22-24
8:00 AM-1:00 PM - May 25
Location:

Holiday Inn Ronkonkoma
3845 Veterans Highway
Ronkonkoma, NY 11779
Ph: 631-585-9500

Cost:

$1750.00 - 1-5 attendees
$1500.00 - 5+ attendees

Includes Continental Breakfast, Lunch and Comprehensive Student Workbook (250 pages). Space is limited so reserve early

Reservations:

For reservations or additional information, Contact:
Steve Lehnert
(631) 345-3100
slehnert@mdipower.com

Please make checks payable to Metro IMAPS

Mail To:
Steve Lehnert
C/O Modular Devices
One Roned Road
Shirley, NY 11967

How You Will Benefit:

After completing this course you will:

  • Advance your understanding of the basic materials and processing steps used in the assembly of Hybrids, Microcircuits and RF/MMIC Modules.
  • Know what you’re looking at and what constitutes a “reject” in the production flow along with the technical rationale to support the decision.
  • Be able to explain to others visual defects that result from the basic manufacturing processes: i.e. wirebond, component attach, thick and thin film processing etc.
  • Learn how to interpret and apply the visual inspection criteria contained in the "Workmanship Standards for Hybrids, Microcircuits and RF/MMIC Modules” 2002 Edition*

Who Should Attend:

This course is a must for process engineers, design engineers, manufacturing engineers and senior technicians. Inspectors and experienced operators looking to broaden their knowledge base and understanding of visual inspection criteria would also benefit.  The course is also suited for newly assigned engineers and QA personnel looking to learn the basic terminology and key concepts vital to the manufacturing floor. Trained instructors with years of industry experience deliver the material in a straightforward and easy to understand format.

About this Course:

Most companies struggle to introduce new lines and waste countless manhours and resources resolving old problems on the manufacturing floor. Much of this waste is directly tied to the knowledge and training level of the responsible individuals.  This course is designed teach the fundamental materials and processes used in microelectronics manufacturing and develop an understanding of the relevant visual inspection criteria.  “Knowing what to do” is the first step towards lower costs, improved quality and faster throughput. Multimedia powerpoint presentations and video clips introduce the basics in a classroom setting.

Seminar Instructor:

Thomas J Green has over twenty five years of experience in the microelectronics industry at Lockheed Martin Astro Space and USAF Rome Laboratories and as an Adjunct Professor at the National Training Center for Microelectronics.  During that time period he was a Staff engineer responsible for the materials and manufacturing processes used in building custom high reliability space qualified microcircuits (Hybrids, MCMs and RF modules) for military and commercial communication satellites. Tom has demonstrated expertise in wirebonding, component attach, and seam sealing processes. He has conducted and analyzed numerous statistically designed experiments, which increased first past yield, reduced costs and improved product quality. At Rome Labs he worked as a senior reliability engineer and analyzed component failures from AF avionic equipment along with providing technical support for a variety of Mil specs and standards (e.g. MIL-PRF-38534 and MIL-STD-883). Tom is an active member of the IMAPS (International Microelectronics and Packaging Society) at both the regional and national levels and serves on the IMAPS National Technical Program Committee. Tom has a Masters degree in Industrial Engineering and a B.S. in Metallurgy and Material Science from Lehigh University.  He's published numerous technical papers and in recent years has completed many successful in plant consulting projects.

Course Outline:

DAY 1

Introduction to Manufacturing Processes

  • Terminology and product definitions
  • Hybrids…MCMs…RF/MMIC Modules

Manufacturing Assembly Process Overview

  • Basic manufacturing process flows

Visual Inspection Source Requirements

Semiconductor Processing Overview

GaAs MMIC wafer Fab overview

  • Wafer saw and probing

Foreign material identification and control

  • What is acceptable?

Cleanroom Requirements and Industry Protocols

Commercial vs Military Visual Inspection Requirements

Incoming High Power wafer/chip inspection

Workmanship Standards* Semiconductor Fab related defects (Incoming Visual Inspection)

High Powered Inspection

  • Monolithic silicon die
  • Air bridges, mask defects, voids, metal defects
  • Probe defects, scribing defects,  edge cracks and chipouts
DAY 2

Thick Film Processes  

  • Substrate fabrication and materials overview
  • Screen printing machine variables and controls

The drying and firing process

  • Thickness measuring techniques
  • Cofired ceramics LTCC

Thin Film Processes

  • Sputtering vs vapor deposition
  • Photolithography, coat and etch

Plating operations

  • Electrolytic vs   electroless plating

Laser trimming processes

  • Thick and thin film resistors

Review of Workmanship Standards*Substrate Related Defects

  • Cracks and Chip outs
  • Scratches, voids and other defects
  • Defects related to laser trimming
  • Plating defects and metal lift

Processing fundamentals for Component Attach           

  • Automated handling and assembly of bare die

Material properties overview

Fluid Dispensing

  • Critical processing parameters

DAY 3

Die and substrate attach

Solder attach of GaAs chips

Overview of Common Cleaning Processes

  • Wet chemicals, Plasma cleaning

Review of Workmanship Standards* related to component attach

  • Looking for the proper fillet
  • Component to pad alignment issues
  • Epoxy bleed and runout
  • Flux contamination
  • Excessive solder
  • F/M resulting from the cure process and their effect on wirebonding

Wirebonding Process Overview

  • Ultrasonic/thermosonic bonding
  • Thermocompression bonding
  • Ribbon bonding

Material properties of bonding wire

Wire bonding tools

Factor that affect the wirebond process

Wire bonding reliability and yield problems

Review of Workmanship Standards* Interconnects (Pre Cap Visual Inspection)

  • Overdeformed bonds
  • Underdeformed bonds
  • Bond placement issues

Intermetallic growth and what to look for

  • Defective bond pad metal and platings
  • Misplaced bonds
  • Lifted bonds
DAY 4

Hermetic Packaging Process Overview

  • Seam sealing, Laser welding, Solder sealing
  • Gross and fine leak testing
  • Optical Leak testing techniques

Review of Workmanship Standards* (External Visual Inspection)

  • Cracked seals
  • Poor  welds    
  • Plastic delamination
  • Marking Defects

Course Summary

Student Examination, Test and Review

Arizona Chapter Meeting May 24 Featuring Rajen Chanchani's Presentation on 3D Integration Technologies: An Overview    ^ Top
Rajen Chanchani of Sandia National Labs will be presenting 3D Integration Technologies: An Overview. The presentation will focus on three key technologies: the motivation, description, status, issues and examples of their applications and the enabling technologies required to process them:

  1. On-chip 3D integration - a ‘bottom-up’ approach where active layers are built-up over an IC wafer
  2. 3D stacking of ICs/wafers - a ‘top-down’ approach where ICs are fabricated independently and then stacked (‘wafer on wafer’ and ‘die on wafer’)
  3. 3D Packaging - the ICs are packaged in 3D Date: Thursday, May 24, 2007

Date: Thursday, May 24, 2007
Schedule: Registration and Lunch at 11:30 – 12:00
Presentation at 12:00
Location: Mesa City Library
Dobson Ranch Branch
2425 S. Dobson Road
Mesa, AZ 85202
Cost:
Luncheon and presentation - $10.00
!!! Special - No Charge for pre-registered attendees !!! 

Vendor display tables available for $15.00

RSVP: RSVP by May 18th to: greg.clemons@intel.com  or
Register as pre-registered attendee on-line: http://www.imaps.org/chapters/freepass.asp

French Chapter Announces the Postponement of the SIP-SOC Meeting    ^ Top
Due to circumstances out of the control of IMAPS France, the SIP-SOC meeting which was planned May 24 in Caen, will be postponed to a later date. The new date, probably in next October, will be disclosed as soon as possible.

For information: please contact Florence Vireton at the IMAPS France office, imaps.france@imapsfrance.org or
Phone: 33-(0)1-39 67 17 73    Fax: 33-(0)1-39 02 71 93.

Or visit the chapter web site,    www.imapsfrance.org

Metro Chapter May 31 Dinner Meeting   ^ Top

When:

May 31, 2007
Registration/Networking 5-6:30 PM
Dinner Buffet: 6:30-7:15 PM
Technical Presentation: 7:15-8:00 PM

Where:

Holiday Inn Ronkonkoma
3845 Veterans Highway
Ronkonkoma, NY 11779
Ph: 631-585-9500

Price:

Members:
$30.00 if Pre-Registered May 29, 2007
$35.00 After May 29, 2007

Non-Members:
$35.00 if Pre-Registered by May 29, 2007
$40.00 After May 29, 2007

Pre Registration:

Email: slehnert@mdipower.com
Phone: Steve Lehnert  (631) 345-3100
Web: www.imaps.org/chapters/metro

AlSiC Part II, An Exotic Material Makes a Comeback and Then Some

More info to follow

Dr. Dan White
President and CEO
Thermal Transfer Composites LLC

This will be our last meeting until September. Come out and show your support.

There are a limited number of vendor tables available for this meeting at a cost of $200.00. Please contact Steve Lehnert if you are interested.

IMAPS Capital Chapter Joint Meeting June 5 with SMTA   ^ Top
Date: June 5, 2007
Location:
Howard County Room (located in the back of the cafeteria)
The Johns Hopkins University Applied Physics Laboratory (JHUAPL)
11100 Johns Hopkins Road
Laurel, MD 20723-6099
Schedule:
5:30 Registration
6:00 Dinner
6:30 1st speaker
7:15 2nd speaker
8:00 Discussion
Registration:
IMAPS/SMTA members - $20.00
Non-Member - $25.00

Featuring Two Technical Presentations:
Applications of Osprey Lightweight Controlled Expansion (CE) Alloys
Stu Weinshanker, Director of CE Alloys Business Development.

BGA Coplanarity Reduction during the Ball Attach Process
Rick Lathrop, Heraeus CMD

RSVP: Please register no later than the Friday June 1.

Lou Razzetti, lou@avidassociates.com (preferred) or 301-588-0637
Cancel if unable to attend, otherwise you may be billed.

Chicago/Milwaukee/SMTA Joint Chapter Meeting – Thursday, June 7th   ^ Top

Date:  Thursday, June 7, 2007
Location:     Panasonic Factory Solutions America
909 Asbury Drive
Buffalo Grove, IL   60089
Time:   12:00 PM until 5:00PM
Investment: $20.00 Members, $25.00 Non-members,
Free admission for Students, Retirees and Displaced members
Reservations:  Mark Naretto at (815) 235-6935 or e-mail to: mark.naretto@honeywell.com.

The annual joint meeting of the IMAPS Chicago/Milwaukee Chapter and SMTA Great Lakes area chapters will be held at Panasonic Factory Solutions America, Buffalo Grove, IL on June 7th, 2007.

For this year’s meeting, an afternoon technical paper session is planned concurrently with an open house tour of Panasonic’s new Advanced Packaging Lab for Microelectronics. 

This meeting will provide an opportunity for attendees to hear about new trends in microelectronics packaging and materials as well as a chance to see and talk with experts about the latest assembly and failure analysis equipment.  In the past, this event has drawn 50-100 attendees.

The joint IMAPS/SMTA meeting will provide a stimulating program that will achieve the following objectives:

  • Technical presentations on topics germane to advanced packaging such as 3D-packaging, dispensing, materials, failure analysis, and industry trends
  • Demonstrations of flip chip assembly, plasma cleaning, stud bump bonding, and SMT assembly
  • Demonstrations of inspection/failure analysis equipment such as SEM, EDS, X-RAY, C-SAM, and contact angle measurement
  • One-on-one discussion opportunities with vendor experts of above listed equipment
  • Ability to network with industry peers and experts in the converging field of SMT & advanced microelectronics packaging

Event Plan:

12:00-1:15

Registration, badge pickup, & lunch

1:15-1:30

Welcome remarks from Panasonic, IMAPS & SMTA Officers

1:30-2:45

Technical Papers & Lab Open House

1:30-1:55

New Developments and Trends in SiPs
Jan Vardaman, TechSearch

Lab Open for Self-Tour
Au/Au Ultrasonic Bonding Demo-FCX501
C4 Local Reflow Demo- FCB3
Plasma Cleaning Demo-PSX303
Chip Placement Demo – IPAC-CS
Underfill Demo – Asymtek S820
X-Ray Demo – Dage 7600
C-SAM Demo – Sonoscan D9000
SEM Demo – JEOL 6390
and more

1:55-2:20

Advances in X-Ray Technology for Microelectronics
John Travis, Dage

2:20-245

Sonoscan C-SAM Presentation

2:45-3:00

Coffee Break

3:00-5:00

Technical Papers & Lab Open House

3:00-3:25

Package Stacking: The Next Dimension in System Board Design
Moody Dreiza, Amkor

Lab Open for Self-Tour
Au/Au Ultrasonic Bonding Demo-FCX501
C4 Local Reflow Demo- FCB3
Plasma Cleaning Demo-PSX303
Chip Placement Demo – IPAC-CS
Underfill Demo – Asymtek S820
X-Ray Demo – Dage 7600
C-SAM Demo – Sonoscan D9000
SEM Demo – JEOL 6390
and more

3:25-3:50

An Overview of Non-Contact Jet Dispensing and Its' Role in Microelectronics Packaging and CSP Underfill
Brad Perkins, Asymtek

3:50-4:15

Advanced Anisotropic Conductive Paste for Flip Chip Assembly
Osamu Suzuki, Namics

4:15-4:40

Case Studies in Electronics Assembly Solutions
Tom Baggio, Panasonic

4:40-5:00

Q&A & Networking

For additional program details and abstracts for technical presentations, visit the Chicago/Milwaukee Chapter website.

EMPC 2007 - 16th European Microelectronics and Packaging Conference & Exhibition    ^ Top
We warmly invite you to the 16th European Microelectronics and Packaging Conference and Exhibition: EMPC2007. EMPC2007 takes place in the high-tech city of Oulu, Finland, June 17 - 20.

EMPC2007 is the bi-annual IMAPS EUROPE conference, this time organized by IMAPS-NORDIC, the Nordic Chapter of IMAPS. EMPC2007 is co-sponsored by IEEE-CPMT Europe, SMTA and NOKIA.

The EMPC conference addresses "everything in electronics between the chip and the system” welcoming everyone working with or designing products that need to be small, compact, cost effective, reliable and still having complex functionality.

  • More than 150 presentations on opto, nano, micro, MEMS, 3D packaging, SIP, embedded components, applications, medical, RF, thermal management, ceramics, laminates & flex, etc.
  • EU, NAMIS, GBC special sessions
  • 6 short courses
  • A very focused busy exhibition

Please find more details at the conference website: www.empc2007.org. We look forward to meeting you all in Oulu.

8th International Conference on Electronics Packaging Technology (ICEPT 2007) - August 14th – 17th, 2007, Shanghai, China   ^ Top
Since 1994, ICEPT has been held for seven times in Beijing, Shanghai and Shenzhen of China, respectively. Since 2005 ICEPT has been held once a year due to rapid development of electronics packaging. As the only international electronics packaging technology conference organized and supported by authoritative academic organizations and leading industries, each ICEPT has attracted hundreds of participants from colleges, research institutes, packaging testing manufacturers, packaging testing equipment factories, packaging materials factories including distinguished experts, scholars and enterprises. The conference highly focuses on semiconductor packaging design, semiconductor packaging manufacturing, semiconductor packaging testing, LED packaging, MEMS packaging, system packaging and assembly, etc. The conference, which is domestically the highest-level and the most large-scale event for electronics packaging and testing technology, has become an important communication platform for advanced packaging technology. The 8th ICEPT will be held from August 14th to August 17th of 2007 in Shanghai, which is the biggest base of microelectronics industry and financial hub. We sincerely invite your participation.

1. Conference Information
Time:
Training course:
1)Registration time for training course: In the afternoon of August 13th, 2007 (Monday)
2)Training course-attending time: August 14th, 2007 (Tuesday)

Conference:   
1)Conference-attending registration: August 14th, 2007 (Tuesday)
2)Conference time: August 15th-17th, 2007 (Wednesday to Friday)

Venue

Sofitel Jin Jiang Oriental Hotel, 889 South Yang Gao Road, Pudong New Area, Shanghai, China

Conference Website  http://www.icept.org

Conference Scale   400-500 participants

Conference Content

  1. Advanced Packaging & System Packaging: BGA, CSP, flip chip, WLP, nano-packaging, Cu/low-K packaging, 3D packaging, SiP and other advanced packaging and integration technologies.  
  2. High Density Substrate & SMT: HDI, PCB, high performance multi-layer substrate, embedded substrate, micro via, microjoin, stencil print, reflow, and other novel assembly technologies that improve substrate density and performance.
  3. Packaging Design & Modeling: novel designs for various packaging/assembly, modeling, simulation and characterization solutions for electrical, thermal, optical & mechanical properties, multi-function & multi-scale modeling, simulation, validation methods and software technologies.
  4. Packaging Materials & Processes: interconnection and encapsulation materials including bonding wires, solder balls, solder pastes, conductive pastes, underfillings, plastic packaging materials, adhesives, thin-films, dielectric materials, substrate materials, frame materials, green electronic materials and other novel materials that enhance the packaging properties and reduce the cost,and various packaging and assembly processes.
  5. Advanced Manufacturing Technology: photolithography, laser processing, novel packaging/assembly technologies, advanced methods/softwares for modeling and monitoring of process effectiveness and cost analysis, and related manufacturing equipments.
  6. Emerging Technologies: sensors, actuators, MEMS, NEMS and MOEMS, optoelectronics & LED packaging, LCD, solid state lighting, passive and RF devices, power & HV devices, nanodevices based on nanowire, nanotubes and polymers, etc.
  7. Quality & Reliability: Quality monitoring and evaluation for packaging/assembly, advanced methods/technologies/tools for rapid reliability data collection and analysis system, reliability modeling & prediction, reliability issues in emerging technologies, testing equipments for quality control and reliability.

Conference Sections
Symposium, short course, academic communication, exhibition of new product & technology

Who Should Attend
Attendees of this conference in the past have been engineers, research scientists, equipment and material vendors, representatives from various packaging companies of packaging technology for IC, MEMS, Optoelectronics, LEDs, LCD, Magnetic Head, Sensors and PCB packaging and assembly. Due to the booming growth of the electronic/optoelectronic and emerging MEMS packaging industry in mainland China (including more than 300 IC packaging companies and several hundred LED packaging companies), this conference will provide a perfect platform for the exchange of information, research and industry development, and recruitment of young engineers.

2. Submission of Your Papers
If you want to submit a paper to this conference, please first send an abstract (500-1000 words) to our e-mail box technical.chair@icept.org or icept2007@sjtu.edu.cn (before May 31, 2007). Reported works in the abstract should be original and have not been published in other media or journals. The abstract should contain a clear statement of the purpose of the experiment, experimental results (including data, charts and pictures), conclusions and important references. All of the abstracts should be written in English based on the electronic template we send to you. We only accept electronic submission, which should include a word file and a PDF file simultaneously. Please put your detailed address (electronic mailbox, postal address, telephone and fax numbers) in the submitted abstract. All of the papers accepted by the ICEPT 2007 will be published in an IEEE conference proceeding. Research articles will be accepted and published in “Journal of Shanghai Jiao Tong University (English Edition)”, which is a source journal of Engineering Index (Ei). Corresponding author will be charged for publication in the above journal. In addition, IEEE-CPMT will publish a special section for selected papers based on a peer review process. For more information, please go to our website of http://www.icept.org.

 

Products and Publications

The Journal of Microelectronics and Electronic Packaging 1st Quarter 2007 Edition is Now Available On-line   ^ Top
The First Quarter 2007 issue of the Journal of Microelectronics and Electronic Packaging is now available on-line.
Log-on to access the Journal.

Journal of Microelectronics and Electronic Packaging is published quarterly and offered to all members electronically via the IMAPS Website. Print subscriptions are available for an addtional rate.

Membership Tips

Society Awards 2007 Deadline Extended Until May 31    ^ Top
Every year IMAPS members are asked to point out the Society’s members who have done such notable work that they deserve the distinction of one of our awards to publicly acknowledge their accomplishments.  We have many deserving members, who have given their time, energy, and expertise to ensure our industry has a robust future; you can make sure they are recognized by nominating them for one of our prestigious awards – but it must start with YOU!  The opportunity is here to let that special member know that you value their dedication and that his/her hard work has not gone unnoticed.  The Society Award nominations are now open.

The 2007 Awards Nominating Committee is actively seeking nominations for these awards: the Daniel D. Hughes, Jr. Memorial Award; the William D. Ashman Achievement Award; the John A. Wagnon Technical Achievement Award; the Outstanding Educator Award; the Sidney J. Stein International Award; the Corporate Recognition Award; and the Fellow of the Society Award.  The Lifetime Achievement Award is also an individual award, but will be awarded only occasionally when a deserving individual is identified and nominated.

Visit http://www.imaps.org/awards/index.htm for details and to nominate that special member. Nominations will be accepted until May 31, 2007.

Oneida Research Services

IMAPS Session at SEMICON WEST 2007
July 18, 2007
San Francisco, CA

Thermal Management
September 24-27, 2007
San Jose, CA

IMAPS 2007 - 40th International Symposium on Microelectronics
November 11-15, 2007
San Jose, CA

*Exhibitors contact abell@imaps.org

Integrated/Embedded Passives
November 15-17, 2007
San Jose, CA

CICMT 2008 -- IMAPS/ACerS 4th International Conference and Exhibition on Ceramic Interconnect and Ceramic Microsystems Technologies
April 21-24, 2008
Munich, Germany

*Exhibitors contact abell@imaps.org

^ Top

National Training Center For Microelectronics

 
 
 
 
 
 
 
 
 
 
 
 
 
 

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