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May 30, 2007

   IMAPS EVENTS
Button IMAPS to Present Technical Session at SEMICON West 2007 (read more...)

Button Advanced Technology Workshop on Thermal Management - Call For Abstracts (read more...)

   CHAPTER ACTIVITIES (events listed in chronological order)
Bullet Metro Chapter Dinner Meeting Thursday, May 31 (read more...)

Bullet Final Notice: IMAPS Capital Chapter Joint Meeting Next Tuesday, June 5 with SMTA (read more...)

Bullet Chicago/Milwaukee/SMTA Joint Chapter Meeting – Next Thursday, June 7th (read more...)

Bullet EMPC 2007 - 16th European Microelectronics and Packaging Conference & Exhibition (read more...)

Bullet New England Chapter Annual Business Meeting on Tuesday, June 26 (read more...)

Bullet 8th International Conference on Electronics Packaging Technology (ICEPT 2007) - August 14th – 17th, 2007, Shanghai, China  (read more...)

Bullet French Chapter Annual Conference/Exhibition, Toulouse, September 25-26, 2007  (read more...)

   MEMBERSHIP
Bullet Society Awards 2007 Deadline May 31 (read more...)

IMAPS Events (view full Web Calendar)

IMAPS to Present Technical Session at SEMICON West 2007    ^ Top
Steve Adamson of Asymtek and IMAPS President-Elect has been asked to Chair an IMAPS Technical Session at SEMICON West. The IMAPS Session will take place on July 18, 2007, from 3:00 – 5:00 in the afternoon and will feature the cutting edge technology that IMAPS delivers worldwide.  The IMAPS Session will take place in the Mosconi Center – West Hall.

“Semi and IMAPS are exploring ways in which the two organizations can work cooperatively. We have started this process by putting together a group of five well regarded experts in the field of microelectronics and electronic packaging for this special session at Semicon West in San Francisco. The abstracts we’ve received indicate that the IMAPS session at SEMICON West will be of the highest caliber”, Adamson said.

The following speakers have already committed papers to the IMAPS session:

Novel Method of BGA Coplanarity Reduction at the Ball Attach Process
Rick Lathrop, Heraeus;

Lithography-Grade Controlled Expansion Substrates for Wafer Level Packaging
Greg Rudd, SpectraMat

IC packaging technologies - What's New?  What's Next?
Joe Fjelstad, Siliconpipe

Title -- TBD
Michael Todd, Henkel.

This session at Semicon West will reflect the quality of papers that will be presented at the 40th IMAPS International Symposium on Microelectronics in San Jose, from November 11th – 15th. 

Please show your support for this select group of speakers and IMAPS by attending this special session at Semicon West.

Advanced Technology Workshop on Thermal Management - Call For Abstracts    ^ Top
Thermal Management 2007 is being held September 24-27, at the Holiday Inn San Jose in San Jose, California. The call for abstracts is now available on-line at www.imaps.org/thermal. Abstracts must be submitted before June 25, 2007.

This workshop is organized each year by IMAPS to promote discussion of leading-edge developments in thermal management components, materials, and systems solutions for removing, spreading, and dissipating heat from microelectronic devices and systems. The Workshop emphasis is for practical, high-performance solutions to meet current and evolving requirements in computing and wireless/telecom systems. Single-company product development concepts are acceptable subjects; however, all abstracts will be judged on novel and innovative contributions to the industry knowledge.

This Advanced Technology Workshop (ATW) on Thermal Management has been held since 1992 and is considered to be one of the most successful of the IMAPS ATWs that are held each year. The 2006 Workshop featured 41 presentations, five of which were competition-selected graduate student papers.

Chapter Activities (events listed in chronological order)

Metro Chapter Dinner Meeting Thursday, May 31    ^ Top

When:

May 31, 2007
Registration/Networking 5-6:30 PM
Dinner Buffet: 6:30-7:15 PM
Technical Presentation: 7:15-8:00 PM

Where:

Holiday Inn Ronkonkoma
3845 Veterans Highway
Ronkonkoma, NY 11779
Ph: 631-585-9500

Price:

Members:
$30.00 if Pre-Registered May 29, 2007
$35.00 After May 29, 2007

Non-Members:
$35.00 if Pre-Registered by May 29, 2007
$40.00 After May 29, 2007

Pre Registration:

Email: slehnert@mdipower.com
Phone: Steve Lehnert  (631) 345-3100
Web: www.imaps.org/chapters/metro

AlSiC Part II, An Exotic Material Makes a Comeback and Then Some

More info to follow

Dr. Dan White
President and CEO
Thermal Transfer Composites LLC

This will be our last meeting until September. Come out and show your support.

There are a limited number of vendor tables available for this meeting at a cost of $200.00. Please contact Steve Lehnert if you are interested.

Final Notice: IMAPS Capital Chapter Joint Meeting Next Tuesday, June 5 with SMTA   ^ Top
Date: June 5, 2007
Location:
Howard County Room (located in the back of the cafeteria)
The Johns Hopkins University Applied Physics Laboratory (JHUAPL)
11100 Johns Hopkins Road
Laurel, MD 20723-6099
Schedule:
5:30 Registration
6:00 Dinner
6:30 1st speaker
7:15 2nd speaker
8:00 Discussion
Registration:
IMAPS/SMTA members - $20.00
Non-Member - $25.00

Featuring Two Technical Presentations:

Applications of Osprey Lightweight Controlled Expansion (CE) Alloys
Presented by Stu Weinshanker, Director of CE Alloys Business Development.

Osprey CE Alloys are finding increasing use in the electronics and allied industries for a variety of applications. These light-weight alloys are composed of silicon-aluminum and their coefficient of thermal expansion (CTE) can be controlled to a chosen value between 7.5 and 20 ppm/°C, simply by adjusting the proportions of these two constituents. CE Alloys can be machined to tight tolerances using standard machine tools and plated with nickel, gold or silver finishes using standard processes. The advantageous physical properties and manufacturing characteristics of these alloys are being exploited in a variety of electronic applications. The ability to tailor the CTE values of the CE Alloys to ceramic circuit boards and components operating at high frequencies, combined with their lightness, high thermal conductivity, dimensional stability and manufacturability, have made them a favored choice for RF/microwave packages and carriers and for heat sinks, where these materials have a distinct cost advantage over copper-molybdenum and copper-tungsten. The additional benefit of high stiffness has made CE Alloys with the lower CTEs eminently suitable for optical and opto-electronic housings. On the other hand, the higher thermal expansion CE Alloys are being increasingly used in carrier plates for laminate PCBs, guide bars for circuit boards, and jigs and fixtures in semiconductor processing equipment and soldering ovens. The unique combinations of properties of CE alloys that make them the preferred choice for a growing range of applications are described and illustrated in this paper.

BGA Coplanarity Reduction during the Ball Attach Process
Rick Lathrop, Heraeus CMD

Since the implementation of BGA packages, coplanarity of the solder sphere array due to package warpage has been greater than the leaded devices they have replaced. In very large area BGAs coplanarity is 8 mils as opposed to the 4-mil QFP standard. In level 2 assembly this coplanarity can translate into open or intermittent solder connections known as ball-in-socket or ball in cup defects named after their cross sectional shape. These defects can escape test, X-ray and visual inspection making them difficult to prevent from the field.

After post assembly test, assemblies with these ball-in-socket defects often fail with handling, thermal cycling or during shipment. At placement, a BGA with some (>0) coplanarity is placed on top of the solder deposit during level 2 assembly. This deposit is typically 6 mils thick. The apex of the BGA ball rarely penetrates more than 2 mils. The larger the pin count of the device, the less paste penetration due to the distribution of placement forces. Aggravating this condition with larger pin count devices is that they usually have greater coplanarity. The ball-in-socket defects begin with the high ball in the array not touching the solder paste or barely touching the solder paste. This is typically the outer balls in a convex warpage scenario. During the preheat portion of the reflow profile the solder paste goes from a firm paste consistency to a hard deposit. There is a slight shrinkage due to the loss of solvents and other volatiles, but the printed pads of solder paste hold their shape rigidly. At this point in the reflow process there is still an air gap between the apex of the high ball and the top of the solder paste. If there were just slight contact at placement then there most likely is now an air gap going into the reflow portion of the profile. Without a physical bond of the ball’s apex surface and the top of the solder paste there is no or an inadequate thermal link between the surfaces to be soldered (ball, solder & PCB pad). This thermal link is a basic requirement for the formation of a solder joint that includes the ball of the component. Very shortly into the reflow portion the solder paste deposit under the high ball, without the thermal burden of the ball, will reach liquidus and collapse abruptly, soldering only to the pad. Shortly after that event the rest of the balls will reflow and the BGA will collapse towards the board at a rate, which is directly proportional to its solderability. With the implementation of lead free alloys solderability is reduced, aggravating the ball-in-socket phenomenon due to coplanarity. At the moment of this collapse the high ball which was originally deprived of flux at placement will push into the molten solder beneath it and solidify unsoldered as the reflow process ends. These balls typically have a layer of flux residue under them but this brief thermal link came too late in the reflow process to initiate or complete the soldering process to the ball.

Most of the BGA’s coplanarity is due to the underfill and over molding operations on the die side of the package. This paper investigates a novel technique of reducing the final package coplanarity during the ball attach process by varying the final ball diameter selectively to local package warp. The assumption is that the unique package topology on the ball side of the package is well understood. Two applications are explored that would be compatible with both solder paste and dippable ball attach methods. Quantitative measurements, using high-resolution confocal measurements, are presented for packages in the 1.27 to 0.5mm pitch range. The methods described will not require new capital equipment or major retooling to implement. The majority of the value added from this concept is in a unique stencil design, implemented directly into the ball attach process if printed solder paste is used or proactively by the Solder On Pad (SOP) supplier. Design guidelines and predictions of coplanarity reductions possible at various ball diameters are discussed in detail. Although the root cause of BGA coplanarity is not addressed in this paper, detailed methods for the level 1 assembler to reduce the effective coplanarity to the level 2 assembler are presented.

References: This is a first time disclosure of this concept. All design, invention, experimentation and verification has been done within Heraeus by the Applications and Customer Support group for SMT & Semiconductor Products.

RSVP: Please register no later than the Friday June 1.

Lou Razzetti, lou@avidassociates.com (preferred) or 301-588-0637
Cancel if unable to attend, otherwise you may be billed.

Chicago/Milwaukee/SMTA Joint Chapter Meeting – Next Thursday, June 7th   ^ Top

Date:  Thursday, June 7, 2007
Location:     Panasonic Factory Solutions America
909 Asbury Drive
Buffalo Grove, IL   60089
Time:   12:00 PM until 5:00PM
Investment: $20.00 Members, $25.00 Non-members,
Free admission for Students, Retirees and Displaced members
Reservations:  Mark Naretto at (815) 235-6935 or e-mail to: mark.naretto@honeywell.com.

The annual joint meeting of the IMAPS Chicago/Milwaukee Chapter and SMTA Great Lakes area chapters will be held at Panasonic Factory Solutions America, Buffalo Grove, IL on June 7th, 2007.

For this year’s meeting, an afternoon technical paper session is planned concurrently with an open house tour of Panasonic’s new Advanced Packaging Lab for Microelectronics. 

This meeting will provide an opportunity for attendees to hear about new trends in microelectronics packaging and materials as well as a chance to see and talk with experts about the latest assembly and failure analysis equipment.  In the past, this event has drawn 50-100 attendees.

The joint IMAPS/SMTA meeting will provide a stimulating program that will achieve the following objectives:

  • Technical presentations on topics germane to advanced packaging such as 3D-packaging, dispensing, materials, failure analysis, and industry trends
  • Demonstrations of flip chip assembly, plasma cleaning, stud bump bonding, and SMT assembly
  • Demonstrations of inspection/failure analysis equipment such as SEM, EDS, X-RAY, C-SAM, and contact angle measurement
  • One-on-one discussion opportunities with vendor experts of above listed equipment
  • Ability to network with industry peers and experts in the converging field of SMT & advanced microelectronics packaging

Event Plan:

12:00-1:15

Registration, badge pickup, & lunch

1:15-1:30

Welcome remarks from Panasonic, IMAPS & SMTA Officers

1:30-2:45

Technical Papers & Lab Open House

1:30-1:55

New Developments and Trends in SiPs
Jan Vardaman, TechSearch

Lab Open for Self-Tour
Au/Au Ultrasonic Bonding Demo-FCX501
C4 Local Reflow Demo- FCB3
Plasma Cleaning Demo-PSX303
Chip Placement Demo – IPAC-CS
Underfill Demo – Asymtek S820
X-Ray Demo – Dage 7600
C-SAM Demo – Sonoscan D9000
SEM Demo – JEOL 6390
and more

1:55-2:20

Advances in X-Ray Technology for Microelectronics
John Travis, Dage

2:20-245

Sonoscan C-SAM Presentation

2:45-3:00

Coffee Break

3:00-5:00

Technical Papers & Lab Open House

3:00-3:25

Package Stacking: The Next Dimension in System Board Design
Moody Dreiza, Amkor

Lab Open for Self-Tour
Au/Au Ultrasonic Bonding Demo-FCX501
C4 Local Reflow Demo- FCB3
Plasma Cleaning Demo-PSX303
Chip Placement Demo – IPAC-CS
Underfill Demo – Asymtek S820
X-Ray Demo – Dage 7600
C-SAM Demo – Sonoscan D9000
SEM Demo – JEOL 6390
and more

3:25-3:50

An Overview of Non-Contact Jet Dispensing and Its' Role in Microelectronics Packaging and CSP Underfill
Brad Perkins, Asymtek

3:50-4:15

Advanced Anisotropic Conductive Paste for Flip Chip Assembly
Osamu Suzuki, Namics

4:15-4:40

Case Studies in Electronics Assembly Solutions
Tom Baggio, Panasonic

4:40-5:00

Q&A & Networking

For additional program details and abstracts for technical presentations, visit the Chicago/Milwaukee Chapter website.

EMPC 2007 - 16th European Microelectronics and Packaging Conference & Exhibition    ^ Top
We warmly invite you to the 16th European Microelectronics and Packaging Conference and Exhibition: EMPC2007. EMPC2007 takes place in the high-tech city of Oulu, Finland, June 17 - 20.

EMPC2007 is the bi-annual IMAPS EUROPE conference, this time organized by IMAPS-NORDIC, the Nordic Chapter of IMAPS. EMPC2007 is co-sponsored by IEEE-CPMT Europe, SMTA and NOKIA.

The EMPC conference addresses "everything in electronics between the chip and the system” welcoming everyone working with or designing products that need to be small, compact, cost effective, reliable and still having complex functionality.

  • More than 150 presentations on opto, nano, micro, MEMS, 3D packaging, SIP, embedded components, applications, medical, RF, thermal management, ceramics, laminates & flex, etc.
  • EU, NAMIS, GBC special sessions
  • 6 short courses
  • A very focused busy exhibition

Please find more details at the conference website: www.empc2007.org. We look forward to meeting you all in Oulu.

New England Chapter Annual Business Meeting on Tuesday, June 26    ^ Top

Date: Tuesday June 26, 2007
Location: Marlborough Marriott (Formerly the Radisson) Route 495 to Exit 24B.  Take first right off exit.  75 Felton Street (just before Shell station), Marlborough, MA 508-480-0015
Schedule:

5:30 p.m. Registration, Socializing, Networking & Cash Bar

6:30 p.m. Dinner

7:30 p.m. Chapter Annual Business Meeting & Election of Officers Nominees for Elected Chapter Office:
President - Dr. Mark Occhionero – CPS Technologies
Vice-President - Ms. Rita Mohanty, Speedline Technologies
Treasurer - Robert Slack, Geib Refining
Secretary - Dr. Wei Han, Worcester Polytechnic Institute

7:45p.m. "Year 2057 - Don’t Miss it!" – Futurist: Dr Ken Gilleo, ET-Trends, LLC – A fast paced Exploration of Technology in the Next 50 Years

Registration:

Pre-registration must be received by Friday June 22nd!!
Send Registrations to: Susan Munyon
96 Grant Way, Lancaster, MA 01523-3112
SusanMunyon@comcast.net

978-466-1877 phone/fax

Cost: Meeting Only - No Cost

Dinner:
Non-members - $30; Members - $25; Retired Members - $20; Students - $5

There's no charge for the Technical Meeting, only for dinner. You may attend without eating dinner.

Dinner Choices: 1) Roasted Chicken Vesuvio [Marinated in Olive Oil, Rosemary, Lemon & Thyme, 2) Vegetarian Entrée (PLEASE INDICATE CHOICE)

"Year 2057 - Don’t Miss it!"
ABSTRACT: We can predict the future. Even better, we can influence the future. Futurists are convinced that we can, and should, play a key role in selecting and forging the best possible future using science and technology that continue to advance beyond most predictions. But there is a caveat; technology is always the double-edged sword that cuts both ways, to deliver good and bad that are not always discernible. We’ll attempt to gaze ahead, spanning the next 50 years, with a global perspective. We can start with obvious methods, like data extrapolation and trend tracing, to predict possible and even likely future activities. But, we can also speculate about disruptive events and the profound affects they might bring upon us. Our topics will include large and small technologies, life styles, abodes, energy, transportation, war, security, crime, law, justice, biomedical breakthroughs, offspring modification, external birthing, family of one, longevity, the environment, the decline of nationalism, and much more. We’ll add a splash of science fiction to help open our minds to absurd possibilities. Forget about political correctness, too. In less than an hour, we’ll solve the energy crisis, use micro-bots and implants to stay healthy, travel in driverless vehicles, and run remote factories from “home” with advanced telecommuting and secure control. Technology will greatly reduce crime making theft nearly impossible except for a demented genius. War as we know it, will be obsolete because of mutually agreed upon implemented technologies and dispute resolution rendered by the world’s most powerful computer - Justice II. And what computing method will dominate in the post-silicon future of 2057; nanoelectronics, photonics, biosystems, or something else? Will we still have circuit boards and solder? Security will be extreme and effective, but at the loss of privacy. Right - forget privacy! Your unique personal ID will be your own DNA code. But critical problems will remain - mostly self-inflicted. So, join the expedition to the year 2057 – and don’t be left behind.

For more information, visit: www.imapsne.org/meeting.html or download the
Printable PDF Meeting Notice.

But BRING checks payable to “IMAPS New England” At-door registration is an additional $5.00. If you make a reservation and can’t make the meeting, please cancel by Monday, June 25th or the Chapter is billed for your meal.

8th International Conference on Electronics Packaging Technology (ICEPT 2007) - August 14th – 17th, 2007, Shanghai, China   ^ Top
Since 1994, ICEPT has been held for seven times in Beijing, Shanghai and Shenzhen of China, respectively. Since 2005 ICEPT has been held once a year due to rapid development of electronics packaging. As the only international electronics packaging technology conference organized and supported by authoritative academic organizations and leading industries, each ICEPT has attracted hundreds of participants from colleges, research institutes, packaging testing manufacturers, packaging testing equipment factories, packaging materials factories including distinguished experts, scholars and enterprises. The conference highly focuses on semiconductor packaging design, semiconductor packaging manufacturing, semiconductor packaging testing, LED packaging, MEMS packaging, system packaging and assembly, etc. The conference, which is domestically the highest-level and the most large-scale event for electronics packaging and testing technology, has become an important communication platform for advanced packaging technology. The 8th ICEPT will be held from August 14th to August 17th of 2007 in Shanghai, which is the biggest base of microelectronics industry and financial hub. We sincerely invite your participation.

1. Conference Information
Time:
Training course:
1)Registration time for training course: In the afternoon of August 13th, 2007 (Monday)
2)Training course-attending time: August 14th, 2007 (Tuesday)

Conference:   
1)Conference-attending registration: August 14th, 2007 (Tuesday)
2)Conference time: August 15th-17th, 2007 (Wednesday to Friday)

Venue

Sofitel Jin Jiang Oriental Hotel, 889 South Yang Gao Road, Pudong New Area, Shanghai, China

Conference Website  http://www.icept.org

Conference Scale   400-500 participants

Conference Content

  1. Advanced Packaging & System Packaging: BGA, CSP, flip chip, WLP, nano-packaging, Cu/low-K packaging, 3D packaging, SiP and other advanced packaging and integration technologies.  
  2. High Density Substrate & SMT: HDI, PCB, high performance multi-layer substrate, embedded substrate, micro via, microjoin, stencil print, reflow, and other novel assembly technologies that improve substrate density and performance.
  3. Packaging Design & Modeling: novel designs for various packaging/assembly, modeling, simulation and characterization solutions for electrical, thermal, optical & mechanical properties, multi-function & multi-scale modeling, simulation, validation methods and software technologies.
  4. Packaging Materials & Processes: interconnection and encapsulation materials including bonding wires, solder balls, solder pastes, conductive pastes, underfillings, plastic packaging materials, adhesives, thin-films, dielectric materials, substrate materials, frame materials, green electronic materials and other novel materials that enhance the packaging properties and reduce the cost,and various packaging and assembly processes.
  5. Advanced Manufacturing Technology: photolithography, laser processing, novel packaging/assembly technologies, advanced methods/softwares for modeling and monitoring of process effectiveness and cost analysis, and related manufacturing equipments.
  6. Emerging Technologies: sensors, actuators, MEMS, NEMS and MOEMS, optoelectronics & LED packaging, LCD, solid state lighting, passive and RF devices, power & HV devices, nanodevices based on nanowire, nanotubes and polymers, etc.
  7. Quality & Reliability: Quality monitoring and evaluation for packaging/assembly, advanced methods/technologies/tools for rapid reliability data collection and analysis system, reliability modeling & prediction, reliability issues in emerging technologies, testing equipments for quality control and reliability.

Conference Sections
Symposium, short course, academic communication, exhibition of new product & technology

Who Should Attend
Attendees of this conference in the past have been engineers, research scientists, equipment and material vendors, representatives from various packaging companies of packaging technology for IC, MEMS, Optoelectronics, LEDs, LCD, Magnetic Head, Sensors and PCB packaging and assembly. Due to the booming growth of the electronic/optoelectronic and emerging MEMS packaging industry in mainland China (including more than 300 IC packaging companies and several hundred LED packaging companies), this conference will provide a perfect platform for the exchange of information, research and industry development, and recruitment of young engineers.

2. Submission of Your Papers
If you want to submit a paper to this conference, please first send an abstract (500-1000 words) to our e-mail box technical.chair@icept.org or icept2007@sjtu.edu.cn (before May 31, 2007). Reported works in the abstract should be original and have not been published in other media or journals. The abstract should contain a clear statement of the purpose of the experiment, experimental results (including data, charts and pictures), conclusions and important references. All of the abstracts should be written in English based on the electronic template we send to you. We only accept electronic submission, which should include a word file and a PDF file simultaneously. Please put your detailed address (electronic mailbox, postal address, telephone and fax numbers) in the submitted abstract. All of the papers accepted by the ICEPT 2007 will be published in an IEEE conference proceeding. Research articles will be accepted and published in “Journal of Shanghai Jiao Tong University (English Edition)”, which is a source journal of Engineering Index (Ei). Corresponding author will be charged for publication in the above journal. In addition, IEEE-CPMT will publish a special section for selected papers based on a peer review process. For more information, please go to our website of http://www.icept.org.

French Chapter Annual Conference/Exhibition, Toulouse, September 25-26, 2007   ^ Top
The organisation of INTERCONEX 2007 in the Ville Rose is now well engaged.

As expected, the favourable intellectual, technological and industrial environment met an exceptional adhesion of the exhibitors. So we are already sure of a first success with all the available booths (52) sold, in April, more than five months before the event.

The “Centre Pierre Baudis” premises allow us to organise the conference in a close vicinity of the exhibition hall. Under the title Packaging et Interconnexion dans les Systèmes Embarqués, the technical programme will be dedicated to new developments as well as industrial experience returns, in the field of packaging for on board equipments. It will be organised in five sessions including a total of 34 papers.

In the morning of Tuesday, September 25, the opening session (four papers) will be dedicated to road maps and prospective R&D presentations. In the afternoon, Session “A” will be entitled “Innovative Sensors, as an interface of Smart Systems”.
This nine papers session is a partnership of IMAPS with GIXEL (the French trade pool for the Interconnection of Electronic Components) and the LAAS (Laboratoire d’Analyse et d’Architecture des Systèmes).
In parallel with the session “A” the session “B” (four papers) will be dedicated to “Experience returns on RoHS and Materials” and the session “C” will offer three papers on “design and Inspection”. In the morning of September 26, the session “D” “On board applications” will be shared in “On board avionics applications” (three papers) and “On board automotive applications” (four papers). Finally, in the session “E”, six papers will be dedicated to hard environment stress applications.

The close vicinity of the conference rooms with the exhibition will help fruitful exchanges between the auditors, the exhibitors and the visitors.

For registration or information:
Please contact Florence Vireton at the IMAPS France office, imaps.france@imapsfrance.org
Phone: 33-(0)1-39 67 17 73    Fax: 33-(0)1-39 02 71 93

Or visit the chapter web site,  www.imapsfrance.org.

Membership Tips

Society Awards 2007 Deadline May 31    ^ Top
Every year IMAPS members are asked to point out the Society’s members who have done such notable work that they deserve the distinction of one of our awards to publicly acknowledge their accomplishments.  We have many deserving members, who have given their time, energy, and expertise to ensure our industry has a robust future; you can make sure they are recognized by nominating them for one of our prestigious awards – but it must start with YOU!  The opportunity is here to let that special member know that you value their dedication and that his/her hard work has not gone unnoticed.  The Society Award nominations are now open.

The 2007 Awards Nominating Committee is actively seeking nominations for these awards: the Daniel D. Hughes, Jr. Memorial Award; the William D. Ashman Achievement Award; the John A. Wagnon Technical Achievement Award; the Outstanding Educator Award; the Sidney J. Stein International Award; the Corporate Recognition Award; and the Fellow of the Society Award.  The Lifetime Achievement Award is also an individual award, but will be awarded only occasionally when a deserving individual is identified and nominated.

Visit http://www.imaps.org/awards/index.htm for details and to nominate that special member. Nominations will be accepted until May 31, 2007.

Oneida Research Services

IMAPS Session at SEMICON WEST 2007
July 18, 2007
San Francisco, CA

Thermal Management
September 24-27, 2007
San Jose, CA

IMAPS 2007 - 40th International Symposium on Microelectronics
November 11-15, 2007
San Jose, CA

*Exhibitors contact abell@imaps.org

Integrated/Embedded Passives
November 15-17, 2007
San Jose, CA

Global Business Council Spring Conference 2008
3/16/2008 - 3/17/2008

Scottsdale/Fountain Hills, AZ

International Conference and Exhibition on Device Packaging
3/17/2008 - 3/20/2008
Scottsdale/Fountain Hills, AZ
*Exhibitors contact abell@imaps.org

CICMT 2008 -- IMAPS/ACerS 4th International Conference and Exhibition on Ceramic Interconnect and Ceramic Microsystems Technologies
April 21-24, 2008
Munich, Germany

*Exhibitors contact abell@imaps.org

^ Top

National Training Center For Microelectronics

 
 
 
 
 
 
 
 
 
 
 
 
 
 

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