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December 18, 2008

Draper Laboratory

Happy Holidays and a Successful New Year from IMAPS!

   IMAPS EVENTS
Button January PDC Lunch and Learn Webinar Series on Package on Package (PoP) Applications, Requirements, Infrastructure and Technologies (read more...)

Button February PDC Lunch and Learn Webinar Series on Introduction to Microelectronics Packaging Technology (read more...)

Button Tabletop Exhibits Now Available for the Advanced Technology Workshop and Tabletop Exhibition on Printed Devices and Applications (read more...)

Button Abstracts Due January 16 for the 2nd Advanced Technology Workshop on Automotive Microelectronics and Packaging (read more...)

   CHAPTER ACTIVITIES (events listed in chronological order)
Bullet Viking Chapter 3rd Annual Holiday Luncheon and Social Event at St. Paul Curling Club on December 29 (read more...)

Bullet Metro Chapter January 14 Technical Meeting on Acquiring Patent / Intellectual Property Protection for Electronic Circuits and Systems (read more...)

Bullet IMAPS France - 4th European ATW on Micropackaging and Thermal Management Technical Program Now Available (read more...)

Bullet IMAPS UK Announces MicroTech 2009 - Call For Papers on Bio-Sensors and MEMS Packaging (read more...)

Bullet INTERCONEX 2009 Technical Abstracts Now Being Accepted (read more...)

Bullet EMPC 2009 - European Microelectronics and Packaging Conference (read more...)

   PRODUCTS AND PUBLICATIONS
IMAPS 2008 Symposium Proceedings Now Available For Purchase On-line (read more...)

AI Technology

IMAPS Events (view full Web Calendar)

January PDC Lunch and Learn Webinar Series on Package on Package (PoP) Applications, Requirements, Infrastructure and Technologies   ^ Top
This three-session on-line Professional Development Course (PDC) webinar series on Package on Package (PoP) Applications, Requirements, Infrastructure and Technologies will be held Tuesday, January 13, Tuesday, January 20, and Tuesday, January 27, 2009. All webinars will be held 12:00 noon - 1:00 pm EST.

Registration:
IMAPS Members: $125 per webinar; 3-course series $250
Non-members: $200 per webinar; 3-course series $500

Registration Deadlines: January 12, January 19 and January 26, 2009
Register On-line

Key Words:
Package on Package, PoP, 3D Packaging, Stacked Packaging, Packaging for hand held devices (meaning cellphones, cameras, USB devices, etc)

Course Scope:
This course will take an in depth view of the applications, market requirements, supply chain infrastructure and technologies associated with the BGA package stacking platform commonly referred to as package on package (PoP).

What you will learn:
This course will help you decide when and how, PoP technology can provide system level semiconductor integration benefits. How you can evaluate and select the optimum PoP technology for you applications by understanding the complex mix of cost, performance and business / logistic benefits PoP provides. Where industry standards, device floor-planning and supply chain infrastructures can reduce the total cost or time to market when implementing a PoP solution. How the PoP platform aligns with industry roadmaps to meet the higher density challenges associated with next generation device integration and system design requirements. What the key PoP design related parameters are and how they relate to package sizing and selection.

PoP Technologies and Infrastructure covered will include:
The top PoP which is typically a memory component using stacked die multi-chip package technology to integrates a combination of memory devices. The associated JEDEC memory interface standards will be highlighted. The bottom PoP which is typically a logic component using advanced high density thin core substrate technology with special design and material properties to enable integration of a high density mobile processor device and support stacking of combination memory top package. Enabling technologies, and JEDEC mechanical design guidelines will be summarized. The PoP infrastructure - including SMT stacking, pre-stacking and joint industry studies for stacking and board level reliability testing will be presented. A section of the course will review real world high volume PoP applications used in multimedia mobile handsets based on industry teardown reports. Quantify the technical and business / logistic factors that make up the total cost of ownership benefits which has been major driver of broad industry adoption of the PoP technology. The course will explore the critical role industry infrastructure development and JEDEC standards have played in the high rates of PoP adoption in mobile multimedia applications.

This on-line PDC is a series of 3 one-hour lectures that can be taken in total or separately depending on the experience level of the student and topics of interest.  Below is a course outline for each session.  Each session is scheduled for 50 minutes of lecture followed by 10 minutes of Q&A.

Session 1 of 3: Tuesday, January 13 -- 12:00-1:00 PM EST

  • An introduction to Package on Package (PoP) terminology
  • Progression of packaging from 1D to 3D
  • Comparison of Stacked die to Stacked Package (PoP) to Package-in-Package (PiP)
  • Discussion of PoP Design Considerations
  • Discussion of PoP JEDEC standardization

Session 2 of 3: Tuesday, January 20 -- 12:00-1:00 PM EST

  • PoP net hierarchy and functional test considerations for design
  • Discussion of warpage and how it affect PoP
  • Review of the various PoP surface mount stacking methods

Session 3 of 3: Tuesday, January 27 -- 12:00-1:00 PM EST

  • Industry generated PoP board level reliability data
  • Future developments in PoP including TMV (Thru Mold Via) and SOP (Solder on Pad)

Register On-line

Thomas Green

Presenter

Moody Dreiza’s current responsibilities are in the field of product management associated with Amkor Technology’s stacked package (PoP) product line.

Moody’s previous experience includes four years in Amkor’s design center supporting CSP and PBGA design and design tool automation.

Moody has earned a Bachelor’s degree in Mechanical Engineering from the University of Manchester Institute of Science and Technology (UMIST) in Manchester, England.

February PDC Lunch and Learn Webinar Series on Introduction to Microelectronics Packaging Technology   ^ Top
This three-session on-line Professional Development Course (PDC) webinar series on Introduction to Microelectronics Packaging Technology will be held Tuesday, February 10, Tuesday, February 17, and Tuesday, February 24, 2009. All webinars will be held 12:00 noon - 1:00 pm EST.

Registration:
IMAPS Members: $125 per webinar; 3-course series $250
Non-members: $200 per webinar; 3-course series $500

Registration Deadlines: February 9, February 16 and February 23, 2009
Register On-line

Key Words
Microelectronics packaging, BEOL, photolithography, MEMS, RFID, backgrinding, wafer sawing, die attach, wire bond, hermetic sealing, solder wave packages, BGA, flip chip, 3D packaging, 3D-IC TSV, SoC, SiP, SOP, SMT, green microelectronics

Program Description
This on-line PDC provides an introduction to microelectronics packaging technology to entry-level engineers and technicians involved in manufacturing, processing, R&D, quality, sales and marketing. No prior knowledge of microelectronics is required. Emphasis will be on a variety of photos and figures to provide the student with not only a solid base in how various microcircuits are made by many materials, processes and equipment, but also what they physically look like. Students will learn basic microelectronic packaging definitions as well as current state of the art terminology of materials, processes and equipment, including various relevant technologies in microelectronics and semiconductor processing.

New developments will be discussed as applied to MEMS, SiP, RFID, Thin Chips/3D/WLP, Thru-Silicon Vias, and Green Technology. An overview of major industry leaders and their new technologies will include Intel's 45nm process, IBM's C4NP, Freescale's RCP, Samsung's TSV, Amkor's SiP & SoP, and others.

This on-line PDC is a series of 3 one-hour lectures that can be taken in total or separately depending on the experience level of the student and topics of interest.  Below is a course outline for each session.  Each session is scheduled for 50 minutes of lecture followed by 10 minutes of Q&A.

Session 1 of 3: Tuesday, February 10 -- 12:00-1:00 PM EST

The multi-billion dollar microelectronics global market reflects the most dynamic and rapidly growing industry in the world and is faced with constantly changing technology and challenges every year. This lead-off session provides an overview of the top companies and application areas along with different perspectives of the microelectronics process, setting our background for reviewing the often-referenced Moore's Law, the classic microelectronics package, the relationship with Nanotechnology and the first part of the packaging process:

  • Design
  • Basic Front End of Line Processes
  • Basic Wafer Processing (masks, photolithography, deposition, etching, doping)
  • Basic Back End of Line Processes (BEOL – dielectric, metallization, wafer probing, backgrinding/thinning, packaging)
  • Micro-Electro-Mechanical Systems (MEMS)
  • Wafer Level Packaging (WLP)
  • Flip Chip Wafer Bumping  

In the second part of this session we’ll examine 1st Level Technologies and Related Packages (Single and Multi-Chip) which include topics on:

  • Active and Passive Devices
  • Popularity of Package Types
  • Hierarchy of Packaging
  • Basic Leaded Solder Wave Packages (SIP, DIP, PGA, DFP, QFP)
  • Basic Leaded and Leadless Surface Mount Technology (SMT) Types (SO, SOIC, DFP, QFP, QFN)
  • Ball Grid Arrays (BGA) and Plastic Over Molded Lead Frames
  • Advanced Packaging (Chip Scale Packaging [CSP], Flip Chip [FC], 3D Packaging, Multi-Chip Substrates and Modules)
  • Overview of Assembly Process

Session 2 of 3: Tuesday, February 17 -- 12:00-1:00 PM EST

This second session in the series will include a more detailed and specific discussion on Assembly Processing and Packaging:

  • Wafer Sawing
  • Die Attach (epoxy, eutectic, silver glass, equipment, epoxy vs. eutectic, epoxy bleed)
  • Wire Bonding (bond types, bond formation, successful bonding, Tape Automated Bonding [TAB], flip chip)
  • Package Sealing (hermeticity, near hermeticity, Chip On Board [COB], glob top, dam and fill)
  • Flip Chip (solder, polymer, stud bump, underfill, equipment)
  • Mid/Low End Packaging
  • High End Packaging
  • 3D Package on Package (PoP)
  • 3D Stacked Die (wire bond)
  • 3D Microsystems (System on Chip [SoC], System in Package [SiP], System On Package [SOP])
  • 3D IC (Thru-Silicon Vias [TSV], why it's popular, basic structure, process, 3D-IC TSV)
  • Packaging Nomenclature Fundamentals
  • Clean Rooms

Session 3 of 3: Tuesday, February 24 -- 12:00-1:00 PM EST

The final session will progress to the 2nd Level and System Level of Packaging which include board assembly and other important system considerations:

  • Surface Mount Technology (SMT) Assembly Line
  • Lead Free Solder Recommendations
  • Tin Whisker Mitigation
  • Rework and Repair
  • Final Assembly, Test and Failure Analysis
  • Quality and Reliability
  • Electro-Static Discharge
  • Safety
  • Green Technology (RoHS, WEEE, REACH)

The second part of this session will provide a review of state of the art innovations of packaging industry leaders:

  • Intel (65 nm processor, Hi-K/Metal Gates, 45 nm processor, Top Suppliers)
  • IBM (Hi-K/Metal Gates, Lo-K dielectric, TSV, Power 65nm processor, ASICs, C4NP)
  • Freescale (Redistributed Chip Package, Package on Package)
  • Samsung (EMC-3D, WSP and TSV)
  • Amkor (Process Steps, Turnkey, Flip Chip, WLP, 3D, MLF, SiP)
  • STATSChipPAC (Turnkey, TSV, PoP)

Students will have access to all the course slides and in addition will receive a complete set of references/web links providing not only the source material but links to additional detailed information on all main topics covered.

Also included is a complimentary copy of a detailed Glossary of Microelectronic Packaging Terms.

Who Should Attend?

No prior knowledge of microelectronics is required since this course is designed for the student who has little initial familiarity with Microelectronics Packaging engineering but would like to relate it to real life, everyday applications. The course uses simple terms for ease of understanding yet includes aspects of advanced packaging for senior engineers new to the field and needing a running start in packaging technology. Ideal for entry level technicians and engineers and also for people in quality assurance, sales, marketing, purchasing, safety, administration and program management.

Register On-line

Thomas Green

Presenter

Phillip Creter has over 30 years of microelectronics packaging experience and is a Life member of IMAPS. He was elected a Fellow of the Society, National Treasurer and President of the New England Chapter (twice). He received a BS in Chemistry with honors from Suffolk University and has published numerous papers, holds a U.S. patent, has made many technical presentations (received Best Paper of Session award IMAPS) and chaired numerous technical sessions for symposia. He is currently a consultant (Creter & Associates) gaining his microelectronics packaging experience at Polymer Flip Chip Corporation, Mini-Systems, GTE and Itek Corporation. His past positions include GTE Microelectronics Center Manager (receiving coveted corporate Lesley Warner Technical Achievement Award), Process Engineering Manager, Process Development Manager, Materials Engineering Manager and Manufacturing Engineer. Phil currently teaches professional development courses at microelectronics events and is an active certified instructor for the Department of Homeland Security.

Tabletop Exhibits Now Available for the Advanced Technology Workshop and Tabletop Exhibition on Printed Devices and Applications   ^ Top
This new Advanced Technology Workshop and Tabletop Exhibition on Printed Devices and Applications is being held February 25-27, 2009, at the International Plaza Resort in Orlando, Florida. For more information, visit www.imaps.org/printed.

The objective of the Printed Devices Workshop is to provide a unique forum that brings together scientists, engineers, manufacturing, academia, and business people from around the world who work in the area of printed electronics as an emerging packaging technology. This workshop enables discussion and presentations on the latest materials, process, design & emerging applications of printed electronics technology.

  • Digital Printing / Deposition Technologies
  • Nanomaterials, inks & epoxies
  • Printed devices – Active and passive
  • Thin & printable battery technology
  • Membrane and capacitive switches
  • Novel die interconnect
  • Paper based, PET & PVC substrate media
  • Printable display & lighting
  • Antennas
  • Design, Simulation and Modeling
  • Applications and new markets
  • Convergence of Graphics & electronics

A limited number of table-top exhibits will be available for companies working in the technical areas listed above. To view information about this exhibition, or to reserve your booth(s), visit www.imaps.org/printed. You may also contact Ann Bell at abell@imaps.org or 202-548-8717 for information about Tabletop exhibits.

Abstracts Due January 16 for the 2nd Advanced Technology Workshop on Automotive Microelectronics and Packaging   ^ Top
The 2nd Annual Advanced Technology Workshop on Automotive Microelectronics and Packaging is now being held May 11-14, 2009, at the Doubletree Hotel in Dearborn, Michigan. For more information, visit www.imaps.org/automotive.

Automotive electronic content continues to rise in vehicles every year. As content rises, microelectronic packaging will continue to play a larger role, as the automobile industry drives for electronics that are smaller in size, lower in cost, higher in content, and more reliable in harsh environments. This Advanced Technology Workshop (ATW) is focused, solely, on advanced developments in automotive electronic packaging. We are looking for presentations on advanced technologies that are pushing the envelope of automotive packaging, in the areas of systems & applications, design, and materials & processes. Your presentation may cover an advanced technology that you have or an advanced technology you need.

Planned Sessions Include:

Systems & Applications

  • Power/Hybrid Modules
  • Powertrain Control
  • Collision Avoidance and Safety
  • X-by-Wire
  • Driver Comfort/Information/Audio Systems
  • Telematics

Design

  • Thermal and Power Management
  • RF/Wireless/mmWave/RADAR/LIDAR/IR
  • Harsh Environment
  • MEMS and Sensors
  • High Performance Interconnects
  • Systems on Chip

Materials & Process

  • Thermal and Power Packaging
  • Sensor and MEMS Packaging
  • Advanced Interconnects, Connectors and Wirebonding
  • Ceramic Substrates and Ceramic Technologies
  • High Density and High Performance Organic Substrates
  • Underfill/Encapsulants and Adhesives
  • Solder Materials, Processes, and Reliability
  • Flip-Chip and Bumping: Processes, Reliability
  • LED Packaging
  • Embedded and Integrated Passives
  • Green Packaging/Compliance with RoHS

Those wishing to make a presentation at the Automotive Workshop, please submit a 250-300 word abstract electronically by January 16, 2009, using the on-line submittal form at: www.imaps.org/abstracts.htm. If you need assistance with the on-line submission form, please email Jackki Morris-Joyner (jmorris@imaps.org) or call 305-382-8433.

All abstracts submitted must represent advanced technology and can be unpublished work. The abstracts should highlight the application area, design, and process or material covered within the automotive industry.

No formal technical paper is required.  A reproduction-ready two- to six-page concise summary with text (figures and graphs included if necessary) will be required for the abstract booklet on April 10, 2009. A post-conference CD containing the full presentation material as supplied by authors will be distributed to all attendees. All speakers are required to pay a reduced registration fee.

Accepted papers may be considered for publication in the IMAPS Journal of Microelectronics and Electronic Packaging.

Chapter Activities (events listed in chronological order)

Viking Chapter 3rd Annual Holiday Luncheon and Social Event at St. Paul Curling Club on December 29    ^ Top

Date: Monday, December 29, 2008
Time:

12:00 - 3:00 pm

Location:
St. Paul Curling Club
470 Selby Ave
St Paul, MN 55102
(651) 224-7408
www.stpaulcurlingclub.org
Register:

$32
(this includes open bar, curling, and lunch)

RSVP by Dec 19th to Char Thomas at REStronics Northland
northlandsales@restronics.com
Phone: 952-941-9135

For more information, visit www.imaps.org/chapters/viking.

An Afternoon of Curling!

The IMAPS Viking Chapter would like to invite you to an afternoon of curling. Curling is a game in which two teams of four players each slide a round stone by means of a gooseneck handle on the top over a 138-ft (42-m) stretch of ice toward a target circle. The object is to deliver the stone closest to the centre (called the house). Each player delivers two stones, which average 40 lbs (18.1 kg) apiece, often applying a curl to the stone's trajectory.

The player's teammates use a broom to sweep the ice ahead of the oncoming stone in order to facilitate a longer slide or to adjust the arc of the curl. Blocking and knocking out an opponent's stones are important strategies of the sport. Curling originated in Scotland in the early 16th century. World championships have been held since 1959 and are usually dominated by Canadians and Scandinavians. In 1998 curling became a medal sport in the Winter Olympic Games.

Please try to wear CLEAN dry tennis shoes. Also, keep in mind that the temperature when we are on the ice is around 42 degrees.

Lunch and beer/drinks will be provided!

Metro Chapter January 14 Technical Meeting on Acquiring Patent / Intellectual Property Protection for Electronic Circuits and Systems    ^ Top

Date: Wednesday, January 14, 2009
Time:

Registration/Networking 4:30-6:00 PM
Dinner Buffet: 6:00-6:45 PM
Presentation: 6:45-8:00 PM

Location:
Holiday Inn Ronkonkoma
3845 Veterans Highway
Ronkonkoma, NY 11779
Ph: 631-585-9500
Register:

Price: Members: $25.00 if Pre-Registered by January 12, 2009
$50.00 After January 12, 2009

Non-Members: $50.00 if Pre-Registered by January 12, 2009
$75.00 After January 12, 2009

Student Members: Free if Pre-Registered by January 12, 2009
$25.00 After January 12, 2009

Pre Registration Email: metroimaps@optonline.net
Phone: Steve Lehnert (631) 379-8239
WEB: www.imaps.org/chapters/metro

Due to the anticipated large turnout, we will be giving preference to members. Please provide your membership number when registering. If you wish to join membership information is available at www.imaps.org.

Acquiring Patent / Intellectual Property Protection
for Electronic Circuits and Systems

Steven Rubin, Counsel
Intellectual Property/Information Technology Practice Group, WolfBlock LLP

Program Info:
Patent protection is the strongest type of intellectual property available. It is also perhaps the most complex. Come and explore the basic requirements for patent protection focusing on issues relating to circuits, systems and signal processing. At this presentation, you will learn, understand and appreciate the four doors that must be passed in order to obtain patent protection in the United States, including:
(1) Statutory subject matter (What types of ideas/inventions should be awarded patent protection?)
(2) Novelty (Is the invention new to the world?)
(3) Non-obviousness (Is the invention obvious in light of prior teachings?)
(4) Written description requirements (Disclosure of the best way known for practicing the invention and some relevant issues regarding defining the scope of the invention)

We will also discuss some recent court decisions specifically ruling on inventions relating to circuit and systems such as: Is a signal patentable? Can you patent a process that includes mental steps? Can you patent a hardware structure that performs a particular function without setting forth an algorithm for performing that function?

Speaker Bio:
Steven Rubin concentrates in technology relating to electronics and computer science and has worked in the fields of software, RF-ID, microlithography, cryptography, search engines, network configuration and architecture, optical communication, electrical signal encoding, networking systems, semiconductor technologies, antennas, electric and electronic circuits, computer architecture, mechanical technologies and methods of doing business. He advises clients throughout all phases of a patent's life from conception by an inventor to enforcement. He assists clients in determining what intellectual property protection is available, and recommended, in light of business objectives and drafts and prosecutes corresponding patent applications. He has managed large patent portfolios, identified potential patent infringement assertions and potential cross-licensing opportunities and provided infringement opinions as needed. He represents clients in patent enforcement and litigation matters domestically and internationally. Mr. Rubin also reviews patent portfolios and pending patent litigation in relation to corporate mergers, acquisitions and investments. Mr. Rubin is the author of many patent-related articles.

IMAPS France - 4th European ATW on Micropackaging and Thermal Management Technical Program Now Available    ^ Top
The French Chapter of IMAPS will hold its 4th European Advanced Technology Workshop on Micropackaging and Thermal Management on February 4-5, 2009, at Mercure Oceanide, Vieux Port, Sud La Rochelle.

The workshop will be dedicated to the thermal management and particularly to convenient cooling solutions for high integration level of equipments. Rising speed of the components leads to increase the power dissipation while miniaturisation and low cost technologies don’t facilitate the mastering of the thermal impedances. In such conditions, the thermal management, as a part of the packaging solutions, is and will continue to be one of the main technological keys for the future progress of the electronic components.

A CD Rom including the presentations will be distributed to the attendees only.

  • Early Registration ends January 15, 2009
  • Final Registration ends on January 25, 2009
  • Formulaire de Convention de formation sur demande

The workshop will feature sessions on:

  • Keynote
  • Cooling Systems
  • Simulation, Modeling and Test
  • Materials
  • Applications

To view the full technical program, reserve exhibit booths, or register for the workshop, visit www.imapsfrance.org or contact Florence Vireton at imaps.france@imapsfrance.org.

Organized by:
International Microelectronics And Packaging Society France
49 rue Lamartine 78035 Versailles
Tel : + 33 (0) 1 39 67 17 73/ Fax : + 33 (0) 1 39 02 71 93 E-mail :

IMAPS UK Announces MicroTech 2009 - Seminar on Bio-Sensors and MEMS Packaging    ^ Top
IMAPS-UK will be holding a key MicroTech Seminar on “Bio-Sensors and MEMS Packaging” scheduled for Tuesday 3rd March 2009 at the Heriot Watt University in Edinburgh.  The Seminar is co-sponsored by IEEE-CPMT-UK&RI. We seek submissions of learned papers of how the challenge of Design, Fabrication or Applications of Bio-sensors or MEMS packaging is being met by researchers and practitioners.

The Program and other information are available at www.imaps.org.uk.

Prof Nihal Sinnadurai
Conference Chair MicroTech 2009

INTERCONEX 2009 Technical Abstracts Now Being Accepted    ^ Top

Date: April 7-8, 2009
Location:

Congress Centre of La Villette
Paris, France

Within INTERCONEX 2009, the technical committee proposes the following topics:

KEYNOTE PAPERS:

  • Packaging & Application of Power LED Devices
  • Packaging and reliability challenges of high pin count circuits

A one day technical workshop on:

  • Microelectronics and packaging for medical and healthcare applications

Technical conferences on the following subjects:

  • Materials improvement (solder, underfill, die attach, thermal interface, ...) and processes (assembly, stacking, packaging,…)
  • Flip-chip (substrates and board technologies),
  • Reliability, thermal management,
  • Advanced Technologies (3 D integration, embedded die, reconstructed wafer, flex,...)
  • Emerging topics (carbon nanotubes, packaging innovation, alternative source integration,…)
  • Modelling, simulation & design, ….
  • Characterization & test,
  • Packaging applications (avionic, telecom, automotive, biomedical, domotic, military,..), and
  • Systems (optic, photonic, harsh environment, …)

We kindly ask you to send us your proposals with one page abstract word size before January 31, 2009. You may submit your abstract via email - imaps.france@imapsfrance.org. For more information, visit www.imapsfrance.org or contact Florence Vireton at +33 (0) 1 39 67 17 73.

EMPC 2009 - European Microelectronics and Packaging Conference    ^ Top
EMPC is Europe’s premier conference planned every two years in a different European country by the local IMAPS chapter, bringing together specialists from industry and academia. The European Microelectronics and Packaging Conference & Exhibition, EMPC 2009, will be held in Rimini, Italy on June 15-18, 2009. EMPC 2009 addresses “everything in electronics between the chip and the system”. The Technical Program Committee of EMPC 2009 invites you to send abstracts of original work describing recent developments in microelettronics technologies.  The Call for Papers, exhibitors details and other information are available at www.empc2009.org.

Products and Publications

IMAPS 2008 Symposium Proceedings Now Available For Purchase On-line   ^ Top
The CD-Rom of Proceedings from the 2008 International Symposium on Microelectronics (IMAPS 2008) is now available for purchase on-line. The Conference was held November 2-6, 2008, at the Rhode Island Convention Center, Providence, Rhode Island, USA. This symposium featured more than 180 papers in 30 sessions addressing 7 technical tracks on: Industry Focused Sessions; Systems/Design; Materials; Reliability; Advanced Technologies; Signal Integrity; and Packaging Processes. The CD-Rom is available for $200 for members and $300 for non-members (shipping additional). For more information or to order on-line, visit http://www.imaps.org/imapsstore/detail.aspx?ID=3327.

 
 

CAD Design Software

Oneida Research Services

PDC Webinar Series on Package on Package (PoP) Applications, Requirements, Infrastructure and Technologies (3 Sessions)
Session 1: January 13, 2009
Session 2: January 20, 2009
Session 3: January 27, 2009

PDC Webinar Series on Introduction to Microelectronics Packaging Technology (3 Sessions)
Session 1: February 10, 2009
Session 2: February 17, 2009
Session 3: February 24, 2009

ATW and Tabletop Exhibition on Printed Devices and Applications
February 25-27, 2009
Orlando, FL

*Exhibitors contact abell@imaps.org

Device Packaging Conference and Exhibition
March 9-12, 2009
Scottsdale/Ftn. Hills, AZ

*Exhibitors contact abell@imaps.org

CICMT 2009 - IMAPS/ACerS 5th International Conference and Exhibition on Ceramic Interconnect and Ceramic Microsystems Technologies
April 20-23, 2009
Denver, CO

*Exhibitors contact abell@imaps.org

ATW on Automotive Microelectronics and Packaging
May 11-14, 2009
Dearborn, MI

^ Top

Compex Corp

 
 
 
 
 
 
 
 
 
 
 
 
 
 

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