IMAPS Home | Join/Renew | Industry Guide | Edit Member Record
February 4, 2009

Draper Laboratory

   IMAPS EVENTS
Button Device Packaging Conference - Early Registration and Hotel Deadlines This Friday, February 6 (read more...)

Button GBC Spring Conference on Supply Chain Development for 3D Packaging - Early Registration and Hotel Deadlines This Friday, February 6 (read more...)

Button Registration Closes Tuesday for PDC Webinar Series on Introduction to Microelectronics Packaging Technology  (read more...)

Button Registration Deadline Next Wednesday, February 11 for the Advanced Technology Workshop and Tabletop Exhibition on Printed Devices and Applications (read more...)

   CHAPTER ACTIVITIES (events listed in chronological order)
Bullet New England Chapter Dinner Meeting Next Wednesday, February 11 (read more...)

Bullet IMAPS UK Announces MicroTech 2009 - Call For Papers on Bio-Sensors and MEMS Packaging (read more...)

Bullet Keystone Chapter March 26 Dinner Meeting (read more...)

Bullet Don't Miss INTERCONEX 2009 (read more...)

Bullet International Conference on Electronic Packaging (ICEP 2009) Being Held April 14-16 in Kyoto, Japan (read more...)

Bullet EMPC 2009 - European Microelectronics and Packaging Conference (read more...)

   PRODUCTS AND PUBLICATIONS
Get Published With IMAPS (read more...)

AI Technology

IMAPS Events (view full Web Calendar)

Device Packaging Conference - Early Registration and Hotel Deadlines THIS Friday, February 6   ^ Top
The 5th International Conference and Exhibition on Device Packaging is being held March 9-12, 2009, at the Radisson Fort McDowell Resort in Scottsdale/Fountain Hills, Arizona. For more information, visit www.imaps.org/devicepackaging.

This year’s conference will feature technical sessions across 6 technical tracks, panel discussions, a poster session, 8 professional development courses and a sold-out vendor exhibition and technology showcase. The conference provides a focused forum on the latest technological developments in 6 topic areas related to microelectronic packaging: 3-D Packaging; MEMS; Flip Chip; Wafer Level Packaging; Power LED Devices and Biomedical. Technical presentations in these 6 topic areas cover a full range of issues from new developments and materials through manufacturing and reliability. The professional development courses offered are also focused on these 6 topical areas of microelectronics and offer an additional valuable resource to attendees.

The Global Business Council (GBC) will co-locate its Spring Conference March 8-9, focusing on Supply Chain Development for 3D Packaging. There will be several networking receptions and gatherings throughout the week, including a golf outing, the opening reception, meals, and other social events.

The Device Packaging Conference and Exhibition has nearly doubled in attendance and sold out exhibit space every year since its inception. 2009 is no different - the hall is now sold out!

The Hotel cut-off and early registration deadlines are February 6, 2009. IMAPS cannot guarantee room rates or availability after the 22nd. Registration pricing also increases after February 6.

Visit www.imaps.org/devicepackaging today to learn more about this conference and to register on-line.

GBC Spring Conference on Supply Chain Development for 3D Packaging - Early Registration and Hotel Deadlines THIS Friday, February 6   ^ Top
The Global Business Council (GBC) Spring Conference on Supply Chain Development for 3D Packaging is being held March 8-9, 2009, at the Radisson Fort McDowell Resort in Scottsdale/Fountain Hills, Arizona. This year's conference focuses on Supply Chain Development for 3D Packaging. There will be several networking receptions and gatherings throughout the week, including a golf outing, the opening reception, meals, and other social events.

Sunday March 8, 2009
12:00 Noon -- GBC Golf Outing.
We-ko-pa Golf Course at the Ft. McDowell Radisson - www.wekopa.com 
Tee-time of optional golf outing - Cost is $200 and includes green fees, shuttle from hotel, and lunch.

6:00 PM -- Registration Opens and GBC Welcome Reception (Beverages and Appetizers)

Monday, March 9, 2009
All listed times are approximate.
7:00 AM - 5:00 PM -- Registration
7:00 AM - 8:00 AM -- Continental breakfast

8:00 AM -- Opening Remarks and Keynote Address:

Opening Remarks:
Lee Smith, VP of Business Development, Amkor Technology, Inc.

Keynote address:
Market Demand, Applications and Requirements for 3D Packaging and 3D IC
Jan Vardaman, President, TechSearch International

Session 1: Supply Chain Collaboration - From Research and Development to Commercialization of 3D ICs with through Si Via (TSV) Interconnects

Role of Consortia: 9:00 AM - 10:00 AM

9:00 AM
Benefits of Supply Chain Collaboration: TSV Integrated Solutions and Advancements with EMC3D Consortium for Achieving Cost Effective 3D Integration
Rozalia Beica, Applications Director for 3D Interconnect, Semitool

9:30 AM
3D Integration Technology and the Micro-Electronics Supply Chain, Barriers and Solutions

Eric Beyne, Director, Packaging and Interconnect Center, IMEC

10:00 - 10:15 AM - Break

Perspectives from IC Suppliers: 10:20 AM - 11:50 AM

10:20 AM
TSS/TSV Process Partitioning to Leverage Supplier Capability and to Provide Maximum Sourcing Flexibility
Tom Gregorich, Vice President of Packaging, Qualcomm

10:50 AM
3D Integration – Packaging Innovation through Common Platform Ecosystem
Jean Trewhella, Director of Packaging Research and Development, IBM

11:20 AM
Lessons Learned in Quest to be First/Early Commercial Supplier of 3D IC Product. Obstacles Faced from Lack of 3D IC / TSV Supply Chain Infrastructure
Bob Patti, CTO, Tezzaron Semiconductor

11:50 AM - 12:55 PM - Lunch and Keynote on IC Market

Keynote address:
Poised for Quick Rebound
Bill McClean, President, IC Insights

Session 2: 3D Packaging and TSV Roadmap and Supply Chain/Technology Development Packages

1:00 PM
3D Electronics and System in Package Integration: Where it’s at...Where it’s going...
W. R. “Bill” Bottoms, CEO, NanoNexus

1:30 PM
Key Requirements for 3D Packaging using TSVs
Robert Lanzone, Vice President of Advanced Packaging, Amkor Technology, Inc.

2:00 PM
Materials Requirements and Development Issues for 3D Packaging and TSV
Leo Linehan, Global Advanced Packaging Business Development, Rohm & Haas

2:30 PM
Front End/Back End: Morphing the Manufacturing Model for Tough Times
Jim Walker, Research Vice President, Semiconductor Manufacturing, Gartner Dataquest

3:00 - 3:15 PM - Break

Session 3: Multi Sources of Supply and Lessons Learned from 3D Packaging-Based Products

3:20 PM
3D Packaging Trends in Multimedia Handsets from Teardown Analysis
David Carey, President, Portelligent

3:50 PM
Role of TSVs in Future Packaging
Suresh Golwalkar, Principal Engineer Materials, Intel

4:20 PM
Rolling Out a New Packaging Technology; Benefiting from and Maximizing Supply Chain Opportunities that Span the Chain
Marc Robinson, CTO, Vertical Circuits, Inc.

4:50 PM - Closing Remarks and Adjourn
Greg Caswell, VP of Engineering, Reactive Nano Technologies

5:00 PM - 7:00 PM - Device Packaging Welcome Reception
(GBC Attendees Invited - Beverages and Appetizers)

The Hotel cut-off and early registration deadlines are February 6, 2009. IMAPS cannot guarantee room rates or availability after the 22nd. Registration pricing also increases after February 6.

Visit www.imaps.org/gbc today to learn more about this conference and to register on-line.

The GBC is co-located with the 5th International Conference and Exhibition on Device Packaging which is being held March 9-12, 2009, at the Radisson Fort McDowell Resort in Scottsdale/Fountain Hills, Arizona. For more information, visit www.imaps.org/devicepackaging.

Registration Closes Tuesday for PDC Webinar Series on Introduction to Microelectronics Packaging Technology   ^ Top
This three-session on-line Professional Development Course (PDC) webinar will be held:
Tuesday, February 10, Tuesday, February 17, and Tuesday, February 24, 2009

All webinars will be held 12:00 noon - 1:00 pm EST

Registration:
IMAPS Members: $125 per webinar; 3-course series $250
Non-members: $200 per webinar; 3-course series $500

Registration Deadlines: February 9

Register On-line


Key Words

Microelectronics packaging, BEOL, photolithography, MEMS, RFID, backgrinding, wafer sawing, die attach, wire bond, hermetic sealing, solder wave packages, BGA, flip chip, 3D packaging, 3D-IC TSV, SoC, SiP, SOP, SMT, green microelectronics

Program Description

This on-line PDC provides an introduction to microelectronics packaging technology to entry-level engineers and technicians involved in manufacturing, processing, R&D, quality, sales and marketing. No prior knowledge of microelectronics is required. Emphasis will be on a variety of photos and figures to provide the student with not only a solid base in how various microcircuits are made by many materials, processes and equipment, but also what they physically look like. Students will learn basic microelectronic packaging definitions as well as current state of the art terminology of materials, processes and equipment, including various relevant technologies in microelectronics and semiconductor processing.

New developments will be discussed as applied to MEMS, SiP, RFID, Thin Chips/3D/WLP, Thru-Silicon Vias, and Green Technology. An overview of major industry leaders and their new technologies will include Intel's 45nm process, IBM's C4NP, Freescale's RCP, Samsung's TSV, Amkor's SiP & SoP, and others.

This on-line PDC is a series of 3 one-hour lectures that can be taken in total or separately depending on the experience level of the student and topics of interest.  Below is a course outline for each session.  Each session is scheduled for 50 minutes of lecture followed by 10 minutes of Q&A.

Session 1 of 3: Tuesday, February 10 -- 12:00-1:00 PM EST

The multi-billion dollar microelectronics global market reflects the most dynamic and rapidly growing industry in the world and is faced with constantly changing technology and challenges every year. This lead-off session provides an overview of the top companies and application areas along with different perspectives of the microelectronics process, setting our background for reviewing the often-referenced Moore's Law, the classic microelectronics package, the relationship with Nanotechnology and the first part of the packaging process:

  • Design
  • Basic Front End of Line Processes
  • Basic Wafer Processing (masks, photolithography, deposition, etching, doping)
  • Basic Back End of Line Processes (BEOL – dielectric, metallization, wafer probing, backgrinding/thinning, packaging)
  • Micro-Electro-Mechanical Systems (MEMS)
  • Wafer Level Packaging (WLP)
  • Flip Chip Wafer Bumping  

In the second part of this session we’ll examine 1st Level Technologies and Related Packages (Single and Multi-Chip) which include topics on:

  • Active and Passive Devices
  • Popularity of Package Types
  • Hierarchy of Packaging
  • Basic Leaded Solder Wave Packages (SIP, DIP, PGA, DFP, QFP)
  • Basic Leaded and Leadless Surface Mount Technology (SMT) Types (SO, SOIC, DFP, QFP, QFN)
  • Ball Grid Arrays (BGA) and Plastic Over Molded Lead Frames
  • Advanced Packaging (Chip Scale Packaging [CSP], Flip Chip [FC], 3D Packaging, Multi-Chip Substrates and Modules)
  • Overview of Assembly Process

Session 2 of 3: Tuesday, February 17 -- 12:00-1:00 PM EST

This second session in the series will include a more detailed and specific discussion on Assembly Processing and Packaging:

  • Wafer Sawing
  • Die Attach (epoxy, eutectic, silver glass, equipment, epoxy vs. eutectic, epoxy bleed)
  • Wire Bonding (bond types, bond formation, successful bonding, Tape Automated Bonding [TAB], flip chip)
  • Package Sealing (hermeticity, near hermeticity, Chip On Board [COB], glob top, dam and fill)
  • Flip Chip (solder, polymer, stud bump, underfill, equipment)
  • Mid/Low End Packaging
  • High End Packaging
  • 3D Package on Package (PoP)
  • 3D Stacked Die (wire bond)
  • 3D Microsystems (System on Chip [SoC], System in Package [SiP], System On Package [SOP])
  • 3D IC (Thru-Silicon Vias [TSV], why it's popular, basic structure, process, 3D-IC TSV)
  • Packaging Nomenclature Fundamentals
  • Clean Rooms

Session 3 of 3: Tuesday, February 24 -- 12:00-1:00 PM EST

The final session will progress to the 2nd Level and System Level of Packaging which include board assembly and other important system considerations:

  • Surface Mount Technology (SMT) Assembly Line
  • Lead Free Solder Recommendations
  • Tin Whisker Mitigation
  • Rework and Repair
  • Final Assembly, Test and Failure Analysis
  • Quality and Reliability
  • Electro-Static Discharge
  • Safety
  • Green Technology (RoHS, WEEE, REACH)

The second part of this session will provide a review of state of the art innovations of packaging industry leaders:

  • Intel (65 nm processor, Hi-K/Metal Gates, 45 nm processor, Top Suppliers)
  • IBM (Hi-K/Metal Gates, Lo-K dielectric, TSV, Power 65nm processor, ASICs, C4NP)
  • Freescale (Redistributed Chip Package, Package on Package)
  • Samsung (EMC-3D, WSP and TSV)
  • Amkor (Process Steps, Turnkey, Flip Chip, WLP, 3D, MLF, SiP)
  • STATSChipPAC (Turnkey, TSV, PoP)

Students will have access to all the course slides and in addition will receive a complete set of references/web links providing not only the source material but links to additional detailed information on all main topics covered.

Also included is a complimentary copy of a detailed Glossary of Microelectronic Packaging Terms.

Who Should Attend?

No prior knowledge of microelectronics is required since this course is designed for the student who has little initial familiarity with Microelectronics Packaging engineering but would like to relate it to real life, everyday applications. The course uses simple terms for ease of understanding yet includes aspects of advanced packaging for senior engineers new to the field and needing a running start in packaging technology. Ideal for entry level technicians and engineers and also for people in quality assurance, sales, marketing, purchasing, safety, administration and program management.

Thomas Green

Presenter

Phillip Creter has over 30 years of microelectronics packaging experience and is a Life member of IMAPS. He was elected a Fellow of the Society, National Treasurer and President of the New England Chapter (twice). He received a BS in Chemistry with honors from Suffolk University and has published numerous papers, holds a U.S. patent, has made many technical presentations (received Best Paper of Session award IMAPS) and chaired numerous technical sessions for symposia. He is currently a consultant (Creter & Associates) gaining his microelectronics packaging experience at Polymer Flip Chip Corporation, Mini-Systems, GTE and Itek Corporation. His past positions include GTE Microelectronics Center Manager (receiving coveted corporate Lesley Warner Technical Achievement Award), Process Engineering Manager, Process Development Manager, Materials Engineering Manager and Manufacturing Engineer. Phil currently teaches professional development courses at microelectronics events and is an active certified instructor for the Department of Homeland Security.

Register On-line For This PDC Webinar

Registration Deadline Next Wednesday, February 11 for the Advanced Technology Workshop and Tabletop Exhibition on Printed Devices and Applications   ^ Top
This new Advanced Technology Workshop and Tabletop Exhibition on Printed Devices and Applications is being held February 25-27, 2009, at the International Plaza Resort in Orlando, Florida. The technical program, exhibitor information, registration forms and other information can be found on-line at www.imaps.org/printed.

Early registration pricing ends on February 11. All prices increase after the 11th.

This workshop will feature five technical sessions on: Industry Convergence and Technology Transformation; Materials: Substrates, Inks & Epoxies; Digital Printing & Deposition Technology; Printed Devices - Active & Passive; and The New Design and Application Paradigm. Dr. Jennifer Ricklin of the DARPA Strategic Technology Office will deliver a lunch keynote presentation on Thursday. The technical program will also include a university poster session as well as poster presentations from local high school students.

A limited number of table-top exhibits will be available for companies working in the technical areas listed above. To view information about this exhibition, or to reserve your booth(s), visit www.imaps.org/printed. You may also contact Ann Bell at abell@imaps.org or 202-548-8717 for information about Tabletop exhibits.

IMAPS has also negotiated Walt Disney Theme Parks Discounted Tickets (Deadline: February 25, 2009). For advance purchase of specially priced Disney Meeting/Convention Theme Park tickets, please visit: http://www.disneyconventionear.com/IMPS.

 

Chapter Activities (events listed in chronological order)

New England Chapter Dinner Meeting Next Wednesday, February 11    ^ Top
The New England chapter sections of IMAPS and ACerS will hold a Joint Technical Meeting featuring Mr. Minh Le, Manager of Technical Staff at Evergreen Solar Corporation who will present on "String Ribbon Wafer Process Technology". The meeting will begin at 5:30 PM Wednesday February 11 at the Marriott Courtyard in Marlborough MA. Please see details on the IMAPS NE website www.imapsne.org.

IMAPS UK Announces MicroTech 2009 - Seminar on Bio-Sensors and MEMS Packaging    ^ Top
IMAPS-UK will be holding a key MicroTech Seminar on “Bio-Sensors and MEMS Packaging” scheduled for Tuesday 3rd March 2009 at the Heriot Watt University in Edinburgh.  The Seminar is co-sponsored by IEEE-CPMT-UK&RI. We seek submissions of learned papers of how the challenge of Design, Fabrication or Applications of Bio-sensors or MEMS packaging is being met by researchers and practitioners.

The Program and other information are available at www.imaps.org.uk.

Prof Nihal Sinnadurai
Conference Chair MicroTech 2009

Keystone Chapter March 26 Dinner Meeting    ^ Top

Date: March 26, 2009
Time: 4:30 - 8:15 pm
Location:

Holiday Inn and Conference Center
432 Pennsylvania Avenue
Ft. Washington, PA 19034

Directions: http://www.fwholiday.com/location.php

Registration:

These valuable presentations and dinner are complimentary by registering by March 20 with Greg Chesmar at GregChes@aol.com or 215-822-0510.

Program:

4:30    Keystone Chapter Leadership Meeting
            Please attend if you would like to benefit by organizing & presenting at future events.

5:30    Happy Hour – Cash Bar
            Build connections with local peers.

6:15    Buffet Dinner 
            A brief chapter business meeting will be held during the dinner hour.

7:15    First Speaker:  Daniel Quain
           Director, Mission Success and Product Assurance, Cobham Defense Systems
            “Manufacturing Trends for Low Volume, High Complexity Microelectronic                              Assemblies and Subsystems”

(Abstract: A discussion of industry trends in the manufacturing and packaging of microelectronic assemblies for high reliability defense applications.)

7:45    Second Speaker:   Matthew Gruber  
           Manager, Cabinets & Electronics Packaging, Lockheed Martin – MS2
           “Non-Hermetic Packaging of RF Multi-Chip Modules”

(Abstract: The packaging of RF multi-chip modules for military applications traditionally employs the use of hermetic, ceramic-based substrates. Although these packaging schemes have proven to be highly robust in a variety of environments, they also carry a significantly higher cost than non-hermetic alternatives. In order to take advantage of the significant cost opportunities available, a multi-chip module was developed using Monolithic Microwave Integrated Circuits (MMICs) in plastic over-molded QFN packages. The completed assembly was tested and performed almost as well as a ceramic chip and wire module using the same chipset, for less than 25% of the packaging cost.).

Don't Miss INTERCONEX 2009    ^ Top

Date: April 7-8, 2009
Location:

Congress Centre of La Villette
Paris, France

Within INTERCONEX 2009, the technical committee is organizing the technical program on the following topics:

KEYNOTE PAPERS:

  • Packaging & Application of Power LED Devices
  • Packaging and reliability challenges of high pin count circuits

A one day technical workshop on:

  • Microelectronics and packaging for medical and healthcare applications

Technical conferences on the following subjects:

  • Materials improvement (solder, underfill, die attach, thermal interface, ...) and processes (assembly, stacking, packaging,…)
  • Flip-chip (substrates and board technologies),
  • Reliability, thermal management,
  • Advanced Technologies (3 D integration, embedded die, reconstructed wafer, flex,...)
  • Emerging topics (carbon nanotubes, packaging innovation, alternative source integration,…)
  • Modelling, simulation & design, ….
  • Characterization & test,
  • Packaging applications (avionic, telecom, automotive, biomedical, domotic, military,..), and
  • Systems (optic, photonic, harsh environment, …)

The deadline for abstracts has passed and the organizers are now creating the technical program. For more information, visit www.imapsfrance.org or contact Florence Vireton at +33 (0) 1 39 67 17 73.

International Conference on Electronic Packaging (ICEP 2009) Being Held April 14-16 in Kyoto, Japan    ^ Top

Date: April 14-16, 2009
Location:

Kyoto International Conference Center
Kyoto, Japan

The technical committee is preparing the program on the following topics:

Packaging

Advanced Packaging, Area Array Packages, SiP, SiP/3D-SiP, PoP, Wafer Level Packaging, VLSI Packaging, Stacked Structure, LCD Module Packaging, MCM

Substrates/Materials

Lamination, Printing, Dispensing, Spraying, Transfer Techniques, Underfilling, Potting, Fine Pitch, Interposer, Solder, Conductive Paste, Built-up Substrates, EPD/EAD Technology, Lead Free

Design/Evaluation/Simulation

Reliability and Testing, Modeling, Simulation, Thermal Management, High Speed Board Design, High frequency Devices, EMI, EMC, High Power

Manufacturing/Process

Flip Chip Technology, Manufacturing, Plating, Inkjet Technologies, Process Control, Equipment, Thin Film Technologies

Interconnection

Low Temperature Adhesion, Soldering, Adhesion, Self-assembly, Bump Formation

Optoelectronics

Devices, Fibers, Waveguides, Design, SSC, WDM, QD, Interface, OE/EO, LEDs

Nano technologies

Materials, Devices, Process, Design, Application

MEMS

MEMS devices, Process

RF/RFID

Devices design, Process, System

Organic semiconductors

Materials, Devices, Application

Trend/Education Aspects

Industrial Trend, Economic Analyses

Energy/Environmental Aspects

PV, Natural Resources, Regulation

Application

LCD, Display, Batteries, Fuel Cells, Lighting, Storage, High Power Modules

Other subject matter relating to electronics packaging

For more information, please visit www.jiep.or.jp/icep.

EMPC 2009 - European Microelectronics and Packaging Conference    ^ Top
EMPC is Europe’s premier conference planned every two years in a different European country by the local IMAPS chapter, bringing together specialists from industry and academia. The European Microelectronics and Packaging Conference & Exhibition, EMPC 2009, will be held in Rimini, Italy on June 15-18, 2009. EMPC 2009 addresses “everything in electronics between the chip and the system”. The Technical Program Committee of EMPC 2009 invites you to send abstracts of original work describing recent developments in microelettronics technologies.  The Call for Papers, exhibitors details and other information are available at www.empc2009.org.

Products and Publications

Get Published With IMAPS   ^ Top
We invite you to submit your technical manuscript(s) for peer review for an upcoming issue of the Journal of Microelectronics and Electronic Packaging (JMEP).

The IMAPS Journal is a prestigious, refereed, and archival publication distributed to a qualified audience worldwide comprised of IMAPS members, educational institutions, and corporate libraries. Focused solely on microelectronics topics and the electronic packaging of these technologies, JMEP contains only papers relevant to your business and industry.

Complete information regarding this publication may be found on the IMAPS website at www.imaps.org/jmep; however, the key points are:

• With such a technically focused publication, you can get to print much faster with JMEP – 2-4 months on average from submission to publication.
• All submissions must be in electronic format, and should be submitted via E-Mail to jmep@imaps.org.
• Papers should preferably be formatted and submitted in Microsoft Word.
• Tables, graphs, and photographs should be submitted at the end of the file and need not be embedded in the text.
• Photographs and other illustrations should preferably be submitted as high resolution files
• The Transfer of Copyright form must be filled out on the IMAPS website.        http://www.imaps.org/jmep/copyright.pdf.

Authors of papers that have been printed in other IMAPS publications or presented at IMAPS workshops are invited to submit updated and/or expanded versions of their papers for possible publication in the Journal.

Please send all submissions, comments, or questions to jmep@imaps.org or feel free to contact me at the phone/e-mail below.

 
 

CAD Design Software

Oneida Research Services

PDC Webinar Series on Wire Bonding (2 Sessions)
Session 2: February 5, 2009

PDC Webinar Series on Introduction to Microelectronics Packaging Technology (3 Sessions)
Session 1: February 10, 2009
Session 2: February 17, 2009
Session 3: February 24, 2009

ATW and Tabletop Exhibition on Printed Devices and Applications
February 25-27, 2009
Orlando, FL

*Exhibitors contact abell@imaps.org

Device Packaging Conference and Exhibition
March 9-12, 2009
Scottsdale/Ftn. Hills, AZ

*Exhibitors contact abell@imaps.org

PDC Webinar Series on Lead-free Electronics – Technology, Manufacturing & Reliability (2 Sessions)
Session 1: March 18, 2009
Session 2: March 25, 2009

CICMT 2009 - IMAPS/ACerS 5th International Conference and Exhibition on Ceramic Interconnect and Ceramic Microsystems Technologies
April 20-23, 2009
Denver, CO

*Exhibitors contact abell@imaps.org

TW on Wire Bonding
July 13, 2009
San Francisco, CA
Parallel to the Adhesives workshop with one admission fee

TW on Adhesives, Encapsulants, Molding
July 13, 2009
San Francisco, CA

Parallel to the Wire Bonding workshop with one admission fee

IMAPS 2009 - San Jose
November 1-5, 2009
San Jose, CA

*Exhibitors contact abell@imaps.org

TW and Tabletop Exhibition on Intelligent Uses of Precious Metals in Microelectronics
November 5-6, 2009
San Jose, CA

*Exhibitors contact abell@imaps.org

^ Top

Compex Corp

 
 
 
 
 
 
 
 
 
 
 
 
 
 

View the Electronic Bulletin Archives